Allow texturing from GART

Unfortunately NV_CONTEXT_SURFACES_2D on most cards (probably only PCIE cards
work actually, but that's not confirmed) rejects a GART DMA object, so the
usefulness is a bit more limited than I'd hoped.

6 files changed, 42 insertions, 35 deletions

diff --git a/src/nv04_xv_blit.c b/src/nv04_xv_blit.c
index 6a4f4b3..990817c 100644
--- a/src/nv04_xv_blit.c
+++ b/src/nv04_xv_blit.c
@@ -87,7 +87,7 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
         if (!NVAccelGetCtxSurf2DFormatFromPixmap(ppix, &dst_format))
 		return BadImplementation;
 
-	if (MARK_RING(chan, 64, 3))
+	if (MARK_RING(chan, 64, 4))
 		return BadImplementation;
 
         BEGIN_RING(chan, surf2d, NV04_CONTEXT_SURFACES_2D_FORMAT, 4);
@@ -150,6 +150,10 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
                 OUT_RING  (chan, src_format);
         }
 
+
+	BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE, 1);
+	OUT_RELOCo(chan, src, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
+			      NOUVEAU_BO_RD);
         while (nbox--) {
                 BEGIN_RING(chan, rect, NV04_GDI_RECTANGLE_TEXT_COLOR1_A, 1);
                 OUT_RING  (chan, 0);
@@ -167,8 +171,8 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
                 BEGIN_RING(chan, sifm, NV04_SCALED_IMAGE_FROM_MEMORY_SIZE, 4);
                 OUT_RING  (chan, (height << 16) | width);
                 OUT_RING  (chan, src_pitch);
-		if (OUT_RELOCl(chan, src, src_offset,
-			       NOUVEAU_BO_VRAM | NOUVEAU_BO_RD)) {
+		if (OUT_RELOCl(chan, src, src_offset, NOUVEAU_BO_VRAM |
+			       NOUVEAU_BO_GART | NOUVEAU_BO_RD)) {
 			MARK_UNDO(chan);
 			return BadImplementation;
 		}
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 9ccca8f..7b70239 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -375,6 +375,7 @@ setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap)
 	struct nouveau_grobj *celsius = pNv->Nv3D;
 	struct nouveau_bo *bo = nouveau_pixmap_bo(pixmap);
 	unsigned delta = nouveau_pixmap_offset(pixmap);
+	unsigned tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
 	long w = pict->pDrawable->width,
 	     h = pict->pDrawable->height;
 	unsigned int txfmt =
@@ -383,10 +384,10 @@ setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap)
 		log2i(w) << 20 | log2i(h) << 16 |
 		1 << 12 | /* lod == 1 */
 		get_tex_format(pict) |
-		0x51 /* UNK */;
+		0x50 /* UNK */;
 
 	BEGIN_RING(chan, celsius, NV10TCL_TX_OFFSET(unit), 1);
-	if (OUT_RELOCl(chan, bo, delta, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD))
+	if (OUT_RELOCl(chan, bo, delta, tex_reloc))
 		return FALSE;
 
 	if (pict->repeat == RepeatNone) {
@@ -406,7 +407,9 @@ setup_texture(NVPtr pNv, int unit, PicturePtr pict, PixmapPtr pixmap)
 	}
 
 	BEGIN_RING(chan, celsius, NV10TCL_TX_FORMAT(unit), 1 );
-	OUT_RING  (chan, txfmt);
+	if (OUT_RELOCd(chan, bo, txfmt, tex_reloc | NOUVEAU_BO_OR,
+		       NV10TCL_TX_FORMAT_DMA0, NV10TCL_TX_FORMAT_DMA1))
+		return FALSE;
 
 	BEGIN_RING(chan, celsius, NV10TCL_TX_ENABLE(unit), 1 );
 	OUT_RING  (chan, NV10TCL_TX_ENABLE_ENABLE);
@@ -587,7 +590,7 @@ NV10EXAPrepareComposite(int op,
 	NVPtr pNv = NVPTR(pScrn);
 	struct nouveau_channel *chan = pNv->chan;
 
-	if (MARK_RING(chan, 128, 3))
+	if (MARK_RING(chan, 128, 5))
 		return FALSE;
 
 	pNv->alu = op;
diff --git a/src/nv30_exa.c b/src/nv30_exa.c
index 4c25ebc..6350828 100644
--- a/src/nv30_exa.c
+++ b/src/nv30_exa.c
@@ -308,6 +308,7 @@ NV30EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
 	unsigned delta = nouveau_pixmap_offset(pPix);
 	nv_pict_texture_format_t *fmt;
 	uint32_t card_filter, card_repeat;
+	uint32_t tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
 	NV30EXA_STATE;
 
 	fmt = NV30_GetPictTextureFormat(pPict->format);
@@ -322,17 +323,16 @@ NV30EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
 		card_filter = 1;
 
 	BEGIN_RING(chan, rankine, NV34TCL_TX_OFFSET(unit), 8);
-	if (OUT_RELOCl(chan, bo, delta, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD))
+	if (OUT_RELOCl(chan, bo, delta, tex_reloc) ||
+	    OUT_RELOCd(chan, bo, NV34TCL_TX_FORMAT_DIMS_2D | (1 << 16) | 8 |
+		       (fmt->card_fmt << NV34TCL_TX_FORMAT_FORMAT_SHIFT) |
+		       (log2i(pPix->drawable.width) <<
+			NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT) |
+		       (log2i(pPix->drawable.height) <<
+			NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT),
+		       tex_reloc | NOUVEAU_BO_OR,
+		       NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1))
 		return FALSE;
-
-	OUT_RING  (chan, NV34TCL_TX_FORMAT_DIMS_2D |
-			(fmt->card_fmt << NV34TCL_TX_FORMAT_FORMAT_SHIFT) |
-			(1 << 16) |
-			(log2i(pPix->drawable.width)  << NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT) |
-			(log2i(pPix->drawable.height) << NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT) |
-			8 |
-			NV34TCL_TX_FORMAT_DMA0);
-
 	OUT_RING  (chan, (card_repeat << NV34TCL_TX_WRAP_S_SHIFT) |
 			(card_repeat << NV34TCL_TX_WRAP_T_SHIFT) |
 			(card_repeat << NV34TCL_TX_WRAP_R_SHIFT));
@@ -478,7 +478,7 @@ NV30EXAPrepareComposite(int op, PicturePtr psPict,
 	int fpid = NV30EXA_FPID_PASS_COL0;
 	NV30EXA_STATE;
 
-	if (MARK_RING(chan, 128, 1 + 1 + 2))
+	if (MARK_RING(chan, 128, 1 + 1 + 4))
 		return FALSE;
 
 	blend = NV30_GetPictOpRec(op);
diff --git a/src/nv30_xv_tex.c b/src/nv30_xv_tex.c
index f5f2346..2d90e8b 100644
--- a/src/nv30_xv_tex.c
+++ b/src/nv30_xv_tex.c
@@ -133,7 +133,7 @@ NV30VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 	NVPtr pNv = NVPTR(pScrn);
 	struct nouveau_channel *chan = pNv->chan;
 	struct nouveau_grobj *rankine = pNv->Nv3D;
-
+	uint32_t tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
 	uint32_t card_fmt = 0;
 	uint32_t card_swz = 0;
 
@@ -157,7 +157,7 @@ NV30VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 	}
 
 	BEGIN_RING(chan, rankine, NV34TCL_TX_OFFSET(unit), 8);
-	if (OUT_RELOCl(chan, src, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD))
+	if (OUT_RELOCl(chan, src, offset, tex_reloc))
 		return FALSE;
 
 	if (unit == 0) {
@@ -167,9 +167,8 @@ NV30VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 				NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT) |
 			       (log2i(height) <<
 				NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT) |
-			       8 /* no idea */,
-			       NOUVEAU_BO_VRAM | NOUVEAU_BO_RD,
-			       NV34TCL_TX_FORMAT_DMA0, 0))
+			       8 /* no idea */, tex_reloc | NOUVEAU_BO_OR,
+			       NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1))
 			return FALSE;
 		OUT_RING  (chan, NV34TCL_TX_WRAP_S_REPEAT |
 				 NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE |
@@ -181,9 +180,8 @@ NV30VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 				NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT) |
 			       (log2i(height) <<
 				NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT) |
-			       8 /* no idea */,
-			       NOUVEAU_BO_VRAM | NOUVEAU_BO_RD,
-			       NV34TCL_TX_FORMAT_DMA0, 0))
+			       8 /* no idea */, tex_reloc | NOUVEAU_BO_OR,
+			       NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1))
 			return FALSE;
 		OUT_RING  (chan, NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE |
 				 NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE |
diff --git a/src/nv40_exa.c b/src/nv40_exa.c
index b5d7c04..03efce4 100644
--- a/src/nv40_exa.c
+++ b/src/nv40_exa.c
@@ -240,6 +240,7 @@ NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
 	struct nouveau_grobj *curie = pNv->Nv3D;
 	struct nouveau_bo *bo = nouveau_pixmap_bo(pPix);
 	unsigned delta = nouveau_pixmap_offset(pPix);
+	unsigned tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
 	nv_pict_texture_format_t *fmt;
 	NV40EXA_STATE;
 
@@ -248,13 +249,12 @@ NV40EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
 		return FALSE;
 
 	BEGIN_RING(chan, curie, NV40TCL_TEX_OFFSET(unit), 8);
-	if (OUT_RELOCl(chan, bo, delta, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
-					NOUVEAU_BO_RD) ||
+	if (OUT_RELOCl(chan, bo, delta, tex_reloc) ||
 	    OUT_RELOCd(chan, bo, fmt->card_fmt | NV40TCL_TEX_FORMAT_LINEAR |
 		       NV40TCL_TEX_FORMAT_DIMS_2D | 0x8000 |
 		       NV40TCL_TEX_FORMAT_NO_BORDER |
 		       (1 << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT),
-		       NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD,
+		       tex_reloc | NOUVEAU_BO_OR,
 		       NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1))
 		return FALSE;
 
diff --git a/src/nv40_xv_tex.c b/src/nv40_xv_tex.c
index b9afb9e..463b178 100644
--- a/src/nv40_xv_tex.c
+++ b/src/nv40_xv_tex.c
@@ -135,7 +135,7 @@ NV40VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 	NVPtr pNv = NVPTR(pScrn);
 	struct nouveau_channel *chan = pNv->chan;
 	struct nouveau_grobj *curie = pNv->Nv3D;
-
+	uint32_t tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
 	uint32_t card_fmt = 0;
 	uint32_t card_swz = 0;
 
@@ -159,15 +159,16 @@ NV40VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 	}
 
 	BEGIN_RING(chan, curie, NV40TCL_TEX_OFFSET(unit), 8);
-	if (OUT_RELOCl(chan, src, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD))
+	if (OUT_RELOCl(chan, src, offset, tex_reloc))
 		return FALSE;
 	if (unit==0) {
 		if (OUT_RELOCd(chan, src, card_fmt | 0x8000 |
 			       NV40TCL_TEX_FORMAT_DIMS_1D |
 			       NV40TCL_TEX_FORMAT_NO_BORDER |
 			       (1 << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT),
-			       NOUVEAU_BO_VRAM | NOUVEAU_BO_RD,
-			       NV40TCL_TEX_FORMAT_DMA0, 0))
+			       tex_reloc | NOUVEAU_BO_OR,
+			       NV40TCL_TEX_FORMAT_DMA0,
+			       NV40TCL_TEX_FORMAT_DMA1))
 			return FALSE;
 		OUT_RING  (chan, NV40TCL_TEX_WRAP_S_REPEAT |
 				 NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE |
@@ -179,8 +180,9 @@ NV40VideoTexture(ScrnInfoPtr pScrn, struct nouveau_bo *src, int offset,
 			       NV40TCL_TEX_FORMAT_DIMS_2D |
 			       NV40TCL_TEX_FORMAT_NO_BORDER |
 			       (1 << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT),
-			       NOUVEAU_BO_VRAM | NOUVEAU_BO_RD,
-			       NV40TCL_TEX_FORMAT_DMA0, 0))
+			       tex_reloc | NOUVEAU_BO_OR,
+			       NV40TCL_TEX_FORMAT_DMA0,
+			       NV40TCL_TEX_FORMAT_DMA1))
 			return FALSE;
 		OUT_RING  (chan, NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE |
 				 NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE |