diff options
| author | Dave Airlie <airlied@airlied-rhel5.(none)> | 2010-11-12 09:25:16 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@airlied-rhel5.(none)> | 2010-11-12 09:25:16 +1000 |
| commit | 5fd76e460967b4c413ec543d1de155549850c5d2 (patch) | |
| tree | ef941472057adc1443877f87dbb5118512d3fa6c | |
| parent | 1cd298c66ab1628bcdf95496836426b544a662ab (diff) | |
evergreen: add more regs to all dumps
| -rw-r--r-- | avivotool.c | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/avivotool.c b/avivotool.c index dbe2b79..2bc770e 100644 --- a/avivotool.c +++ b/avivotool.c @@ -935,6 +935,7 @@ static uint32_t eg_offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET, EVERGREEN_CRTC #define EG_GET_MODE_REG(index, reg) GET_REG((reg) + eg_offsets[(index)]) void eg_cmd_regs(const char *type) { + int show_all = (strcmp(type, "all") == 0); int show_grphs = 0; int i; uint32_t tmp, tmp1; @@ -995,6 +996,7 @@ void eg_cmd_regs(const char *type) EG_GET_MODE_REG(i, EVERGREEN_GRPH_Y_END)); } + printf("\n"); for (i = 0; i < EG_NUM_OFFSETS; i++) { tmp = EG_GET_MODE_REG(i, EVERGREEN_CUR_CONTROL); if (!(tmp & 0x1)) @@ -1023,6 +1025,64 @@ void eg_cmd_regs(const char *type) printf("DACB: en:%08x source:%08x\n", tmp, GET_REG(EVERGREEN_DACB_BASE + AVIVO_DAC_SOURCE_SELECT_OFFSET)); } printf("\n"); + + if (show_all) { + for (i = 0x6250 ; i < 0x626c; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x6400 ; i < 0x641c; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x6420 ; i < 0x647c; i+=4) + SHOW_UNKNOWN_REG(i); + SHOW_UNKNOWN_REG(0x6590); + SHOW_UNKNOWN_REG(0x65b4); + SHOW_UNKNOWN_REG(0x65cc); + + for (i = 0x6660 ; i <= 0x66dc; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x6800 ; i <= 0x6840; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x6998 ; i <= 0x69e0; i+=4) + SHOW_UNKNOWN_REG(i); + + for (i = 0x6a00 ; i < 0x6a1c; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x6b00 ; i < 0x6b1c; i+=4) + SHOW_UNKNOWN_REG(i); + /* 6d00, 6d04 appear to change randomly */ + for (i = 0x6d08 ; i < 0x6d80; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x6df0 ; i < 0x6e7c; i+=4) + SHOW_UNKNOWN_REG(i); + + + for (i = 0x6fac ; i <= 0x7014; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x79f0 ; i < 0x7a78; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x7bac ; i <= 0x7c14; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x107ac ; i <= 0x10814; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x113ac ; i <= 0x11414; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x11fac ; i <= 0x12014; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x12bac ; i <= 0x12c14; i+=4) + SHOW_UNKNOWN_REG(i); + + for (i = 0x71f0 ; i <= 0x7220; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x7df0 ; i <= 0x7e20; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x109f0 ; i <= 0x10a20; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x115f0 ; i <= 0x11620; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x121f0 ; i <= 0x12220; i+=4) + SHOW_UNKNOWN_REG(i); + for (i = 0x12df0 ; i <= 0x12e20; i+=4) + SHOW_UNKNOWN_REG(i); + } } void radeon_cmd_regs(const char *type) |