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authorBen Widawsky <ben@bwidawsk.net>2012-04-25 13:33:17 -0700
committerBen Widawsky <ben@bwidawsk.net>2012-04-25 13:33:17 -0700
commit4d053f97db7759c51c2299b401e166b09efad87e (patch)
tree3ec64aea976e3269924165d72e2fcb18418a2ac2
parentbb40c7e8df2183449e6e252556b9c176d516caeb (diff)
chipset updates
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
-rwxr-xr-xlib/intel_chipset.h29
1 files changed, 27 insertions, 2 deletions
diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index 668bf598..bfb19234 100755
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -78,11 +78,18 @@
#define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS 0x0126
#define PCI_CHIP_SANDYBRIDGE_S 0x010A /* server */
-#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* desktop */
-#define PCI_CHIP_IVYBRIDGE_GT2 0x0162
+#define PCI_CHIP_IVYBRIDGE_GT1 0x0152 /* desktop */
+#define PCI_CHIP_IVYBRIDGE_GT2 0x0162
#define PCI_CHIP_IVYBRIDGE_M_GT1 0x0156 /* mobile */
#define PCI_CHIP_IVYBRIDGE_M_GT2 0x0166
#define PCI_CHIP_IVYBRIDGE_S 0x015a /* server */
+#define PCI_CHIP_IVYBRIDGE_S_GT2 0x016a /* server */
+
+#define PCI_CHIP_HASWELL_GT1 0x0402 /* Desktop */
+#define PCI_CHIP_HASWELL_GT2 0x0412
+#define PCI_CHIP_HASWELL_M_GT1 0x0406 /* Mobile */
+#define PCI_CHIP_HASWELL_M_GT2 0x0416
+#define PCI_CHIP_HASWELL_M_ULT_GT2 0x0A16 /* Mobile ULT */
#define IS_MOBILE(devid) (devid == PCI_CHIP_I855_GM || \
devid == PCI_CHIP_I915_GM || \
@@ -151,6 +158,24 @@
devid == PCI_CHIP_IVYBRIDGE_M_GT2 || \
devid == PCI_CHIP_IVYBRIDGE_S)
+#define IS_GEN7(devid) (IS_IVYBRIDGE(devid) || \
+ IS_HASWELL(devid))
+
+#define IS_IVYBRIDGE(dev) (dev == PCI_CHIP_IVYBRIDGE_GT1 || \
+ dev == PCI_CHIP_IVYBRIDGE_GT2 || \
+ dev == PCI_CHIP_IVYBRIDGE_M_GT1 || \
+ dev == PCI_CHIP_IVYBRIDGE_M_GT2 || \
+ dev == PCI_CHIP_IVYBRIDGE_S || \
+ dev == PCI_CHIP_IVYBRIDGE_S_GT2)
+
+#define IS_HSW_GT1(devid) (devid == PCI_CHIP_HASWELL_GT1 || \
+ devid == PCI_CHIP_HASWELL_M_GT1)
+#define IS_HSW_GT2(devid) (devid == PCI_CHIP_HASWELL_GT2 || \
+ devid == PCI_CHIP_HASWELL_M_GT2 || \
+ devid == PCI_CHIP_HASWELL_M_ULT_GT2)
+
+#define IS_HASWELL(devid) (IS_HSW_GT1(devid) || \
+ IS_HSW_GT2(devid))
#define IS_965(devid) (IS_GEN4(devid) || \
IS_GEN5(devid) || \