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2015-04-20i965/gen7_vs_state.cno_intermediate_uniform_constbufferAbdiel Janulgue1-2/+2
2015-04-20i965/brw_wm_surface_state.cAbdiel Janulgue1-3/+1
2015-04-17Experiment: direct state batch pointed to as constant buffer.Abdiel Janulgue2-19/+23
2015-04-16glsl: Temporary C wrapper for glsl_typeAbdiel Janulgue2-0/+46
2015-04-16i965: Enable push constants for UBOsAbdiel Janulgue1-1/+1
2015-04-16i965: Upload UBO surfaces before emitting constant state packetAbdiel Janulgue1-3/+4
2015-04-16i965/vec4: Pack UBO registers right after uniform registersAbdiel Janulgue1-13/+25
2015-04-16i965/vec4: Append ir_binop_ubo_load entries to the gather tableAbdiel Janulgue3-0/+84
2015-04-16i965/vec4: Append uniform entries to the gather tableAbdiel Janulgue2-0/+13
2015-04-16i965/vec4: Include UBO parameter sizes in push constant parametersAbdiel Janulgue2-0/+20
2015-04-16i965/fs: Pack UBO registers right after uniform registersAbdiel Janulgue1-9/+33
2015-04-16i965/fs: Append ir_binop_ubo_load entries to the gather tableAbdiel Janulgue3-0/+92
2015-04-16i965/fs: Append uniform entries to the gather tableAbdiel Janulgue1-1/+16
2015-04-16i965: Assign hw-binding table entries for each ubo block.Abdiel Janulgue2-0/+17
2015-04-16i965: Store gather table information in the program's stage dataAbdiel Janulgue7-0/+34
2015-04-16i965: Allocate space on the gather pool for UBO entriesAbdiel Janulgue1-2/+20
2015-04-16i965: Disable gather push constants for null constantsAbdiel Janulgue2-0/+15
2015-04-16i965: Disable resource streamer in BLORPAbdiel Janulgue1-0/+1
2015-04-16i965: Program the push constants state using the gather tableAbdiel Janulgue5-8/+66
2015-04-16i965: Allocate space on the gather pool for every push constant stateAbdiel Janulgue1-0/+8
2015-04-16i965: Upload uniforms to the constant bufferAbdiel Janulgue4-13/+69
2015-04-16i965: Initialize and partition a 64k constant buffer for uniforms.Abdiel Janulgue3-0/+23
2015-04-16i965: Enable gather push constantsAbdiel Janulgue4-1/+84
2015-04-16i965: Define gather push constants opcodesAbdiel Janulgue1-0/+15
2015-04-15i965: Upload binding tables in hw-generated binding table format.Abdiel Janulgue1-1/+17
2015-04-15i965: Implement interface to edit binding table entriesAbdiel Janulgue2-0/+58
2015-04-15i965: Reset resource streamer pool offsets on batch flushAbdiel Janulgue1-0/+4
2015-04-15i965: Enable hardware-generated binding tables on render path.Abdiel Janulgue5-0/+105
2015-04-15i965: Pass resource streamer enable flags on batchbuffer startAbdiel Janulgue1-1/+6
2015-04-15i965: Define HW-binding table and resource streamer control opcodesAbdiel Janulgue3-0/+28
2014-12-25radeonsi: Don't modify PA_SC_RASTER_CONFIG register value if rb_mask == 0Michel Dänzer1-2/+4
2014-12-24vc4: Optimize CL emits by doing size checks up front.Eric Anholt5-16/+66
2014-12-24vc4: Avoid repeated hindex lookups in the loop over tiles.Eric Anholt2-15/+24
2014-12-24i965: Add missing BRW_NEW_*_PROG_DATA to texture/renderbuffer atoms.Kenneth Graunke1-2/+10
2014-12-24i965: Cache register write capability checks.Kenneth Graunke1-0/+12
2014-12-23freedreno/ir3: split out legalize passRob Clark5-154/+214
2014-12-23freedreno/ir3: ra debugRob Clark3-17/+61
2014-12-23egl/haiku: Clean up SConscript whitespaceAlexander von Gluck IV1-13/+12
2014-12-23egl/dri2: Fix build of dri2 egl driver with SConsAlexander von Gluck IV1-0/+40
2014-12-23egl: Clean up Haiku visual creationAlexander von Gluck IV1-49/+47
2014-12-23egl: Add Haiku code and supportAlexander von Gluck IV10-5/+523
2014-12-23glsl: check if implicitly sized arrays match explicitly sized arrays across t...Timothy Arceri1-1/+20
2014-12-22i965: Use safer pointer arithmetic in gather_oa_results()Chad Versace1-1/+1
2014-12-22i965: Use safer pointer arithmetic in intel_texsubimage_tiled_memcpy()Chad Versace1-3/+4
2014-12-22i965: Fix intel_miptree_map() signature to be more 64-bit safeChad Versace5-10/+24
2014-12-22i965: Remove spurious casts in copy_image_with_memcpy()Chad Versace1-4/+4
2014-12-21radeonsi: force NaNs to 0Marek Olšák1-4/+8
2014-12-21st/nine: fix DBG typo (trivial)David Heidelberg1-1/+1
2014-12-21r300g: implement ARR opcodeDavid Heidelberg4-4/+16
2014-12-20freedreno/a4xx: blend-colorRob Clark1-0/+13
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