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authorAbdiel Janulgue <abdiel.janulgue@linux.intel.com>2015-10-21 18:41:57 +0300
committerAbdiel Janulgue <abdiel.janulgue@linux.intel.com>2015-10-21 18:41:57 +0300
commit08d58cbb8e15e107df9b081a9b3f80f551940086 (patch)
treeb853c247b5d26ea39eda62ece75893f5f0d7a5b2
parent3943e945323864712e22978ca8bcb6662e2b6037 (diff)
working_builtins
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp8
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.cpp7
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_nir.cpp8
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c6
-rw-r--r--src/mesa/drivers/dri/i965/gen6_vs_state.c24
-rw-r--r--src/mesa/drivers/dri/i965/gen7_vs_state.c21
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.c2
8 files changed, 52 insertions, 28 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index ad85adcaf1..84937f989c 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -32,6 +32,8 @@
using namespace brw;
+#define CONT
+
void
fs_visitor::emit_nir_code()
{
@@ -254,7 +256,7 @@ fs_visitor::nir_setup_uniform(nir_variable *var)
stage_prog_data->param[idx] = &storage->storage[i];
printf(" ==update param[%d] i:%d ...\n", idx, i);
-#if 1
+#ifdef CONT
if (i % (storage->type->is_matrix() ? storage->type->matrix_columns :
storage->type->component_slots()) != 0)
continue;
@@ -327,13 +329,15 @@ fs_visitor::nir_setup_builtin_uniform(nir_variable *var)
const gl_constant_value *val =
&prog->Parameters->ParameterValues[index][swiz];
stage_prog_data->param[idx] = val;
+#ifdef CONT
stage_prog_data->builtins[stage_prog_data->nr_builtins++] = val;
components = j;
if (j == 0)
uni_reg = idx;
printf("%s fs Builtin add param[%d] j:%d\n", var->name, idx, j);
+#endif
}
-#if 1
+#ifdef CONT
int gt = this->nr_gather_table++;
this->ubo_gather_table[gt].reg = uni_reg;
this->ubo_gather_table[gt].type = brw_gather_table::BUILTIN_ENTRY;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index f0f51549b1..f9dea5c582 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -611,8 +611,9 @@ vec4_visitor::pack_uniform_registers()
new_chan[src], new_chan[src]);
}
}
-
-#if 1
+#define CONT
+
+#ifdef CONT
struct brw_shader_program *prog = (struct brw_shader_program *) shader_prog;
for (unsigned i = 0; i < this->nr_gather_table; i++) {
if (!uniform_used[i])
@@ -651,7 +652,9 @@ vec4_visitor::pack_uniform_registers()
void
vec4_visitor::generate_gather_table()
{
+#ifdef CONT
return;
+#endif
int num_consts = ALIGN(stage_prog_data->nr_params, 4) / 4;
for (int i = 0; i < num_consts; i++) {
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
index 316cbcf146..687a69412d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
@@ -27,6 +27,8 @@
namespace brw {
+#define CONT
+
void
vec4_visitor::emit_nir_code()
{
@@ -175,15 +177,17 @@ vec4_visitor::nir_setup_uniforms(nir_shader *shader)
int pos = uniforms * 4 + i;
const gl_constant_value *val = &plist->ParameterValues[p][i];
stage_prog_data->param[pos] = val;
+#ifdef CONT
printf(" *Add vec4 builtin ref to param[%d]\n", pos);
stage_prog_data->builtins[stage_prog_data->nr_builtins++] = val;
+#endif
}
for (; i < 4; i++) {
static const gl_constant_value zero = { 0.0 };
stage_prog_data->param[uniforms * 4 + i] = &zero;
}
-#if 1
+#ifdef CONT
int gt = this->nr_gather_table++;
this->ubo_gather_table[gt].reg = uniforms;
this->ubo_gather_table[gt].type = brw_gather_table::BUILTIN_ENTRY;
@@ -249,7 +253,7 @@ vec4_visitor::nir_setup_uniform(nir_variable *var)
stage_prog_data->param[uniforms * 4 + i] = &zero;
}
-#if 1
+#ifdef CONT
assert(uniform_vector_size[uniforms] <= 4);
int p = this->nr_gather_table++;
this->ubo_gather_table[p].reg = uniforms;
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index eb86a5f8c6..606fbc66d3 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -126,8 +126,12 @@ brw_codegen_vs_prog(struct brw_context *brw,
stage_prog_data->nr_image_params = vs->NumImages;
} else {
param_count = vp->program.Base.Parameters->NumParameters * 4;
+#define CONT
+
+#ifdef CONT
stage_prog_data->builtins =
rzalloc_array(NULL, const gl_constant_value *, param_count);
+#endif
}
/* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
* planes as uniforms.
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 251d183c75..1eef40e004 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -216,10 +216,14 @@ brw_codegen_wm_prog(struct brw_context *brw,
} else {
param_count = builtins;
}
-
+
+#define CONT
+
+#ifdef CONT
if (builtins > 0)
prog_data.base.builtins = rzalloc_array(NULL, const gl_constant_value *,
param_count);
+#endif
/* The backend also sometimes adds params for texture size. */
param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index a7cc841acc..e2fc90d3b4 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -89,8 +89,12 @@ gen6_upload_push_constants(struct brw_context *brw,
brw_create_constant_surface(brw, brw->batch.bo,
stage_state->push_const_offset,
size, &surf_offset, false);
+ gen7_edit_hw_binding_table_entry(brw, stage_state->stage,
+ BRW_UNIFORM_GATHER_INDEX_START,
+ surf_offset);
#else
/* builtins */
+ int idx = BRW_UNIFORM_GATHER_INDEX_START;
if (prog_data->nr_builtins > 0) {
printf(" Gen builtin surf\n");
const uint32_t size = prog_data->nr_builtins *
@@ -102,24 +106,23 @@ gen6_upload_push_constants(struct brw_context *brw,
&surf_offset, false);
for (int i = 0; i < prog_data->nr_builtins; i++) {
param[i] = *prog_data->builtins[i];
- }
+ }
+ idx += BRW_BUILTIN_GATHER_INDEX_APPEND;
gen7_edit_hw_binding_table_entry(brw, stage_state->stage,
- BRW_BUILTIN_GATHER_INDEX_APPEND,
- surf_offset);
+ idx, surf_offset);
+
} else {
assert(current != 0);
brw_create_constant_surface(brw, current->bo, 0,
current->bo->size, &surf_offset, false);
- gen7_edit_hw_binding_table_entry(brw, stage_state->stage,
- BRW_UNIFORM_GATHER_INDEX_START,
+ gen7_edit_hw_binding_table_entry(brw, stage_state->stage, idx,
surf_offset);
}
+ printf(" EDITING BT index : %d for surf 0x%x\n",idx, surf_offset);
#endif
}
#ifndef CONT
-
-
STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
/* _NEW_PROGRAM_CONSTANTS
@@ -128,11 +131,9 @@ gen6_upload_push_constants(struct brw_context *brw,
* side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
* wouldn't be set for them.
*/
-#ifndef CONT
for (i = 0; i < prog_data->nr_params; i++) {
param[i] = *prog_data->param[i];
}
-#endif
if (1) {
fprintf(stderr, "%s constants:\n",
_mesa_shader_stage_to_string(stage_state->stage));
@@ -149,7 +150,8 @@ gen6_upload_push_constants(struct brw_context *brw,
fprintf(stderr, "\n");
}
#else
- {
+ if (0) {
+
int i;
int sz = 0;
float* p = 0;
@@ -157,7 +159,7 @@ gen6_upload_push_constants(struct brw_context *brw,
p = current->bo->virtual;
printf(" ---- Uniform %s ----: 0x%x\n",
_mesa_shader_stage_to_string(stage_state->stage), p);
- sz = prog_data->nr_params;
+ sz = 64;
} else {
p = brw->batch.bo->virtual + builtin_offset;
printf(" ---- Builtin %s ----: 0x%x\n",
diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c
index a65cd215f0..3687209dc6 100644
--- a/src/mesa/drivers/dri/i965/gen7_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c
@@ -30,6 +30,8 @@
#include "intel_batchbuffer.h"
#include "glsl/glsl_parser_extras.h"
+#define CONT
+
static void
gen7_submit_gather_table(struct brw_context* brw,
const struct brw_stage_state *stage_state,
@@ -39,21 +41,23 @@ gen7_submit_gather_table(struct brw_context* brw,
uint32_t gather_dwords = 3 + prog_data->nr_gather_table;
/* Ordinary uniforms are assigned to the first constant buffer slot */
- unsigned cb_valid = 0;
+ unsigned cb_valid = 1;
+#ifdef CONT
if (prog_data->nr_builtins > 0)
cb_valid = 1 << BRW_BUILTIN_GATHER_INDEX_APPEND;
else
cb_valid = 0x1;
-
+#endif
/* Assign subsequent constant buffer slots to UBOs if any */
cb_valid |= (prog_data->nr_ubo_params > 0) ?
(2 << (BRW_UBO_GATHER_INDEX_APPEND + prog_data->max_ubo_const_block)) - 1 : 0;
-
- printf(" Gen %s GT for stage_prog: 0x%x | gt: 0x%x | num: %d |cb_valid: 0x%x\n",
+#if 1
+ printf(" Gen %s GT for stage_prog: 0x%x | gt: 0x%x | num: %d |cb_valid: 0x%x\n",
_mesa_shader_stage_to_string(stage_state->stage),
prog_data,
prog_data->gather_table,
prog_data->nr_gather_table, cb_valid);
+#endif
assert(cb_valid < 0xffff);
assert(prog_data->nr_gather_table > 0 && prog_data->nr_gather_table < 128);
@@ -73,16 +77,13 @@ gen7_submit_gather_table(struct brw_context* brw,
int bt_offset = 0;
switch (prog_data->gather_table[i].type) {
case BUILTIN_ENTRY:
- printf(" got builtin\n");
bt_offset = BRW_BUILTIN_GATHER_INDEX_APPEND;
break;
case UBO_ENTRY:
- printf(" got UBO\n");
bt_offset = prog_data->gather_table[i].const_block +
BRW_UBO_GATHER_INDEX_APPEND;
break;
case UNIFORM_ENTRY:
- printf(" got uniform\n");
bt_offset = 0;
break;
};
@@ -93,13 +94,15 @@ gen7_submit_gather_table(struct brw_context* brw,
OUT_BATCH(SET_FIELD(cb_offset, BRW_GATHER_CONST_BUFFER_OFFSET) |
SET_FIELD(prog_data->gather_table[i].channel_mask,
BRW_GATHER_CHANNEL_MASK) | bt_offset);
- printf(" %d|0x%x|%d |uni loc: %d\n",
+#if 1
+ printf(" %d|0x%x|%d |uni loc: %d\n",
cb_offset, prog_data->gather_table[i].channel_mask,
bt_offset,
prog_data->gather_table[i].uniform_location);
+#endif
int loc = prog_data->gather_table[i].uniform_location;
- if (loc > -1)
+ if (loc > -1 && prog != 0)
prog->storage_table[loc].needs_update = true;
}
ADVANCE_BATCH();
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
index 6b67297b5e..0096f869a6 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c
@@ -336,7 +336,7 @@ do_flush_locked(struct brw_context *brw)
if (unlikely(INTEL_DEBUG & DEBUG_BATCH))
do_batch_dump(brw);
-#if 1
+#if 0
printf("------------------------------------------ BATCH RESET -----------------------------\n");
drm_intel_bo* bo = brw->gather_pool.bo;
if (bo) {