1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
|
#ifndef _VBI2C_
#define _VBI2C_
#include "vgatypes.h"
#define IND_CR48_GPIO_REG_I 0x48
#define IND_CR4A_GPIO_REG_III 0x4A
#define IND_SR11_DDC_REG 0x11 // index of DDC register
#define IND_SR1F_POWER_MANAGEMENT 0x1F // index of power management reg
#define INPUT_STATUS_1_COLOR 0x002A // Input Status 1 register read
// port in color mode
/* Jong 08/03/2009; added for I2C */
/*--------------------------------*/
#define I2C_CRT 0
#define I2C_DVI 1
#define I2C_FCNT 2
#define I2C_OPEN 1
#define I2C_CLOSE 0
#define I2C_RETRY_COUNT 10
#define I2C_DEBUG_MSG 0
#define MAX_I2C_CHANNEL 3
#define SEND_ACK 0
#define RECV_ACK 1
#define HIDAT 1
#define LODAT 0
#define HICLK 1
#define LOCLK 0
#define I2C_COMMAND_NULL 0X0000
#define I2C_COMMAND_READ 0X0001
#define I2C_COMMAND_WRITE 0X0002
#define I2C_COMMAND_STATUS 0X0004
#define I2C_COMMAND_RESET 0X0008
/* The following flags are provided on a READ or WRITE command */
#define I2C_FLAGS_START 0X0001 /* START + addx */
#define I2C_FLAGS_STOP 0X0002 /* STOP */
#define I2C_FLAGS_DATACHAINING 0X0004 /* STOP, START + addx */
#define I2C_FLAGS_ACK 0X0010 /* ACKNOWLEDGE (normally set) */
/* The following status flags are returned on completion of the operation */
#define I2C_STATUS_NOERROR 0X0000
#define I2C_STATUS_BUSY 0X0001
#define I2C_STATUS_ERROR 0X0002
#define I2C_MAX_CLOCK_RATE (100*1000) /* Hz */
#define ERROR_INVALID_PARAMETER -1
#define NO_ERROR 0
#define VP_STATUS char
// n'th bit set as 1
#define BIT(n) (1 << (n))
// n bits set as 1 from bit(0) to bit(n-1)
#define BITS(n) ((1 << (n)) - 1)
// Select Large one from a:b
#define LARGE(n) ((1?n) > (0?n) ? (1?n) : (0?n))
// Select Small one from a:b
#define SMALL(n) ((1?n) < (0?n) ? (1?n) : (0?n))
#define MASK(n) ( BITS(LARGE(n)-SMALL(n)+1) << SMALL(n) )
// get bits [a:b]'s binary value
#ifndef GETBITS
#define GETBITS(b,n) ( ((b) & MASK(n)) >> SMALL(n) ) /* Jong@08032009 */
#endif
// set binary value from [a:0] to [c:d]
#define SETBITS(b, n) ( ( (b) << ((1?n) > (0?n) ? (0?n) : (1?n)) ) & MASK(n) )
// move bits value from [a:b] to [c:d]
#define MOVEBITS(b, m, n) ( GETBITS(b, m) << ((1?n) > (0?n) ? (0?n) : (1?n)) )
/*--------------------------------*/
typedef struct _I2CControl {
ULONG Command; /* I2C_COMMAND_* */
uint32_t dwCookie; /* Context identifier returned on Open */
uint8_t Data; /* Data to write, or returned UCHAR */
uint8_t Reserved[3]; /* Filler */
ULONG Flags; /* I2C_FLAGS_* */
ULONG Status; /* I2C_STATUS_* */
ULONG ClockRate; /* Bus clockrate in Hz. */
} I2CControl, *PI2CControl;
typedef struct _I2CContext
{
uint32_t dwI2CPortAcquired; /* port busy between start and stop */
uint32_t dwCookie; /* cookie image for this instance */
uint32_t dwCurCookie; /* cookie of current I2C channel owner */
} I2C_CONTEXT, *PI2C_CONTEXT;
typedef struct _EDID_V1_ {
ULONG ulHeader0;
ULONG ulHeader1;
struct {
UCHAR LoUCHAR;
UCHAR HiUCHAR;
} IDManufactureName;
USHORT IDProductCode;
ULONG IDSerialNumber;
UCHAR WeekOfManufacture;
UCHAR YearOfManufacture;
UCHAR bEDIDVersion; /* should be 1 */
UCHAR bEDIDRevision; /* should be 0~3 */
UCHAR bVideoInput;
UCHAR bMaxHzImageSize; /* cm */
UCHAR bMaxVtImageSize; /* cm */
UCHAR bGamma;
UCHAR bFeatureSupport;
UCHAR bColorCharacteristics[10];
UCHAR bEstablishedTiming[3];
USHORT usStandardTiming[8];
union {
struct {
USHORT usPixelClock;
UCHAR bHzActive;
UCHAR bHzBlank;
UCHAR bHzActiveBlank;
UCHAR bVtActive;
UCHAR bVtBlank;
UCHAR bVtActiveBlank;
UCHAR bHSyncOffset;
UCHAR bHSyncWidth;
UCHAR bVSyncOffsetWidth;
UCHAR bHzVtSyncOffsetWidth;
UCHAR bHzImageSize; /* mm */
UCHAR bVtImageSize; /* mm */
UCHAR bHzVtImageSize; /* mm */
UCHAR bHzBorder;
UCHAR bVtBorder;
UCHAR bFlags;
} DetailedTiming;
struct {
USHORT usReserved0;
UCHAR bReserved1;
UCHAR bTag;
UCHAR bReserved2;
UCHAR bData[13];
} MonitorDescriptor;
} Descriptor[4];
UCHAR bExtensionFlag;
UCHAR bChecksum;
} EDID_V1, *PEDID_V1;
typedef struct _XGI_I2C_CONTROL
{
ULONG I2CDelay; /* 100ns units*/
} XGI_I2C_CONTROL, *PXGI_I2C_CONTROL;
extern char vGetEDIDExtensionBlocks(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, PUCHAR pjBuffer, ULONG ulBufferSize);
extern char vGetEnhancedEDIDBlock(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2C, ULONG ulBlockID, ULONG ulBlockTag, PUCHAR pjBuffer, ULONG ulBufferSize);
extern char I2COpen (PXGI_HW_DEVICE_INFO pHWDE,ULONG ulI2CEnable, ULONG ulChannelID, PI2CControl pI2CControl);
extern char I2CAccess(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN I2CNull( PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN I2CRead(PXGI_HW_DEVICE_INFO pHWDE,PI2CControl pI2CControl);
extern BOOLEAN I2CWrite(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN ResetI2C(PXGI_HW_DEVICE_INFO pHWDE, PI2CControl pI2CControl);
extern BOOLEAN bGetEDID(PXGI_HW_DEVICE_INFO, ULONG , PUCHAR, ULONG);
#endif
|