Add XGI (aka Trident) Volari XP5 supportxf86-video-trident-1_0_1_3

5 files changed, 68 insertions, 5 deletions

diff --git a/ChangeLog b/ChangeLog
index bcb1d76..22f4b2f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2006-01-27  Alan Hourihane  <alanh@fairlite.demon.co.uk>
+
+	* configure.ac:
+	* src/trident.h:
+	* src/trident_dac.c: (TridentInit), (TridentRestore),
+	(TridentSave), (TridentHWCursorInit):
+	* src/trident_driver.c: (TRIDENTPreInit), (TRIDENTModeInit):
+	Add XGI (aka Trident) Volari XP5 support
+
 2005-12-20  Kevin E. Martin  <kem-at-freedesktop-dot-org>
 
 	* configure.ac:
diff --git a/configure.ac b/configure.ac
index e6d1d5f..5b942de 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
 
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-trident],
-        1.0.1.2,
+        1.0.1.3,
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
         xf86-video-trident)
 
diff --git a/src/trident.h b/src/trident.h
index ac4379f..d38cd20 100644
--- a/src/trident.h
+++ b/src/trident.h
@@ -40,6 +40,8 @@
 #include "xf86Pci.h"
 #include "vbe.h"
 
+#define PCI_CHIP_2200		0x2200
+
 typedef struct {
 	unsigned char tridentRegs3x4[0x100];
 	unsigned char tridentRegs3CE[0x100];
@@ -126,6 +128,7 @@ typedef struct {
     CARD32		DrawFlag;
     CARD16		LinePattern;
     RamDacRecPtr	RamDacRec;
+    int			CursorOffset;
     xf86CursorInfoPtr	CursorInfoRec;
     xf86Int10InfoPtr	Int10;
     vbeInfoPtr		pVbe;
@@ -304,7 +307,8 @@ typedef enum {
     CYBERBLADEE4,
     BLADEXP,
     CYBERBLADEXPAI1,
-    CYBERBLADEXP4
+    CYBERBLADEXP4,
+    XP5
 } TRIDENTType;
 
 #define UseMMIO		(pTrident->NoMMIO == FALSE)
@@ -335,6 +339,7 @@ typedef enum {
 			 (pTrident->Chipset == BLADE3D) || \
 			 (pTrident->Chipset == CYBERBLADEXPAI1) || \
 			 (pTrident->Chipset == CYBERBLADEXP4) || \
+			 (pTrident->Chipset == XP5) || \
 			 (pTrident->Chipset == BLADEXP))
 
 /*
diff --git a/src/trident_dac.c b/src/trident_dac.c
index 0924cd3..cf6db4a 100644
--- a/src/trident_dac.c
+++ b/src/trident_dac.c
@@ -499,6 +499,7 @@ TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 
     /* Enable Chipset specific options */
     switch (pTrident->Chipset) {
+	case XP5:
 	case CYBERBLADEXP4:
 	case CYBERBLADEXPAI1:
 	case BLADEXP:
@@ -574,6 +575,7 @@ TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     	    pReg->tridentRegs3x4[PixelBusReg] = 0x29;
 	    pReg->tridentRegsDAC[0x00] = 0xD0;
 	    if (pTrident->Chipset == CYBERBLADEXP4 ||
+	        pTrident->Chipset == XP5 ||
 	        pTrident->Chipset == CYBERBLADEE4) {
     		OUTB(vgaIOBase+ 4, New32);
 		pReg->tridentRegs3x4[New32] = INB(vgaIOBase + 5) & 0x7F;
@@ -582,6 +584,7 @@ TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	case 32:
 	    pReg->tridentRegs3CE[MiscExtFunc] |= 0x02;
 	    if (pTrident->Chipset != CYBERBLADEXP4
+	        && pTrident->Chipset != XP5
 	        && pTrident->Chipset != CYBERBLADEE4
 		&& pTrident->Chipset != CYBERBLADEXPAI1) {
 	        /* Clock Division by 2*/
@@ -592,6 +595,7 @@ TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     	    pReg->tridentRegs3x4[PixelBusReg] = 0x09;
 	    pReg->tridentRegsDAC[0x00] = 0xD0;
 	    if (pTrident->Chipset == CYBERBLADEXP4
+	        || pTrident->Chipset == XP5
 	        || pTrident->Chipset == CYBERBLADEE4
 		|| pTrident->Chipset == CYBERBLADEXPAI1) {
     		OUTB(vgaIOBase+ 4, New32);
@@ -721,7 +725,8 @@ TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
     	OUTB(0x3C5, protect);
     }
  
-    if (pTrident->Chipset == CYBERBLADEXP4)
+    if (pTrident->Chipset == CYBERBLADEXP4 ||
+        pTrident->Chipset == XP5)
     	pReg->tridentRegs3CE[DisplayEngCont] = 0x08;
 
     /* Avoid lockup on Blade3D, PCI Retry is permanently on */
@@ -800,8 +805,10 @@ TridentRestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg)
     if (pTrident->Chipset >= CYBER9385)    OUTW_3x4(Enhancement0);
     if (pTrident->Chipset >= BLADE3D)      OUTW_3x4(RAMDACTiming);
     if (pTrident->Chipset == CYBERBLADEXP4 ||
+        pTrident->Chipset == XP5 ||
         pTrident->Chipset == CYBERBLADEE4) OUTW_3x4(New32);
-    if (pTrident->Chipset == CYBERBLADEXP4) OUTW_3CE(DisplayEngCont);
+    if (pTrident->Chipset == CYBERBLADEXP4 ||
+        pTrident->Chipset == XP5) OUTW_3CE(DisplayEngCont);
     if (pTrident->IsCyber) {
 	CARD8 tmp;
 
@@ -932,8 +939,10 @@ TridentSave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg)
     if (pTrident->Chipset >= CYBER9385)    INB_3x4(Enhancement0);
     if (pTrident->Chipset >= BLADE3D)      INB_3x4(RAMDACTiming);
     if (pTrident->Chipset == CYBERBLADEXP4 ||
+        pTrident->Chipset == XP5 ||
         pTrident->Chipset == CYBERBLADEE4) INB_3x4(New32);
-    if (pTrident->Chipset == CYBERBLADEXP4) INB_3CE(DisplayEngCont);
+    if (pTrident->Chipset == CYBERBLADEXP4 ||
+        pTrident->Chipset == XP5) INB_3CE(DisplayEngCont);
     if (pTrident->IsCyber) {
 	CARD8 tmp;
 	INB_3CE(VertStretch);
@@ -1168,6 +1177,7 @@ TridentHWCursorInit(ScreenPtr pScreen)
 		HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK |
 		HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32 |
                 ((pTrident->Chipset == CYBERBLADEXP4 ||
+                  pTrident->Chipset == XP5 ||
                   pTrident->Chipset == CYBERBLADEE4) ? 
                 HARDWARE_CURSOR_TRUECOLOR_AT_8BPP : 0);
     infoPtr->SetCursorColors = TridentSetCursorColors;
diff --git a/src/trident_driver.c b/src/trident_driver.c
index ae729d1..07690fe 100644
--- a/src/trident_driver.c
+++ b/src/trident_driver.c
@@ -171,6 +171,7 @@ static SymTabRec TRIDENTChipsets[] = {
     { BLADEXP,			"bladeXP" },
     { CYBERBLADEXPAI1,		"cyberbladeXPAi1" },
     { CYBERBLADEXP4,		"cyberbladeXP4" },
+    { XP5,			"XP5" },
     { -1,				NULL }
 };
 
@@ -214,6 +215,7 @@ static PciChipsets TRIDENTPciChipsets[] = {
     { BLADEXP,		PCI_CHIP_9910,	RES_SHARED_VGA },
     { CYBERBLADEXPAI1,	PCI_CHIP_8820,	RES_SHARED_VGA },
     { CYBERBLADEXP4,	PCI_CHIP_2100,	RES_SHARED_VGA },
+    { XP5,		PCI_CHIP_2200,	RES_SHARED_VGA },
     { -1,		-1,		RES_UNDEFINED }
 };
     
@@ -313,6 +315,7 @@ static int ClockLimit[] = {
 	230000,
 	230000,
 	230000,
+	230000,
 };
 
 static int ClockLimit16bpp[] = {
@@ -356,6 +359,7 @@ static int ClockLimit16bpp[] = {
 	230000,
 	230000,
 	230000,
+	230000,
 }; 
 
 static int ClockLimit24bpp[] = {
@@ -399,6 +403,7 @@ static int ClockLimit24bpp[] = {
 	115000,
 	115000,
 	115000,
+	115000,
 };
 
 static int ClockLimit32bpp[] = {
@@ -443,6 +448,7 @@ static int ClockLimit32bpp[] = {
 	115000,
 	115000,
 	115000,
+	115000,
 };
 
 /*
@@ -1999,6 +2005,17 @@ TRIDENTPreInit(ScrnInfoPtr pScrn, int flags)
 	    chipset = "CyberBladeXP4";
 	    pTrident->NewClockCode = TRUE;
 	    pTrident->frequency = NTSC;
+	case XP5:
+    	    pTrident->ddc1Read = Tridentddc1Read;
+	    ramtype = "SGRAM";
+            pTrident->HasSGRAM = TRUE;
+	    pTrident->IsCyber = TRUE;
+	    pTrident->shadowNew = TRUE;
+	    pTrident->NoAccel = TRUE; /* for now */
+	    Support24bpp = TRUE;
+	    chipset = "XP5";
+	    pTrident->NewClockCode = TRUE;
+	    pTrident->frequency = NTSC;
 	    break;
     }
 
@@ -2046,6 +2063,27 @@ TRIDENTPreInit(ScrnInfoPtr pScrn, int flags)
 	pScrn->videoRam = pTrident->pEnt->device->videoRam;
 	from = X_CONFIG;
     } else {
+      if (pTrident->Chipset == XP5) {
+	OUTB(vgaIOBase + 4, 0x60);
+	videoram = INB(vgaIOBase + 5);
+	switch (videoram & 0x7) {
+ 	case 0x00:
+	    pScrn->videoRam = 131072;
+	    break;
+	case 0x01:
+	    pScrn->videoRam = 65536;
+	    break;
+	case 0x02:
+	    pScrn->videoRam = 32768;
+	    break;
+	case 0x03:
+	    pScrn->videoRam = 16384;
+	    break;
+	case 0x04:
+	    pScrn->videoRam = 8192;
+	    break;
+	}
+      } else
       if (pTrident->Chipset == CYBER9525DVD) {
 	pScrn->videoRam = 2560;
       } else
@@ -2582,6 +2620,7 @@ TRIDENTModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode)
 	case BLADEXP:
 	case CYBERBLADEXPAI1:
 	case CYBERBLADEXP4:
+	case XP5:
 	    /* Get ready for MUX mode */
 	    if (pTrident->MUX && 
 		pScrn->bitsPerPixel == 8 &&