Fix spelling/wording issues

Found by using:
    codespell --builtin clear,rare,usage,informal,code,names

Signed-off-by: Alan Coopersmith <alan.coopersmith@oracle.com>

14 files changed, 29 insertions, 29 deletions

diff --git a/src/init301.c b/src/init301.c
index e891037..4df9627 100644
--- a/src/init301.c
+++ b/src/init301.c
@@ -8064,8 +8064,8 @@ SiS_SetCHTVReg(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short
       SiS_SetCH700x(SiS_Pr,0x01,0x28);
 
       /* Set video bandwidth
-            High bandwith Luma composite video filter(S0=1)
-            low bandwith Luma S-video filter (S2-1=00)
+            High bandwidth Luma composite video filter(S0=1)
+            low bandwidth Luma S-video filter (S2-1=00)
 	    disable peak filter in S-video channel (S3=0)
 	    high bandwidth Chroma Filter (S5-4=11)
 	    =00110001=0x31
diff --git a/src/sis.h b/src/sis.h
index 70a961b..9b01449 100644
--- a/src/sis.h
+++ b/src/sis.h
@@ -467,7 +467,7 @@
 #define VB2_LCD162MHZBRIDGE	(VB2_301C  | VB2_307T)
 /* CRT2/LCD over 1280 (overflow bits in Part4) */
 #define VB2_LCDOVER1280BRIDGE	(VB2_301C  | VB2_307T   | VB2_302LV | VB2_302ELV | VB2_307LV)
-/* CRT2/LCD over 1600? Is this really gonna happen, or will there be LCDA only for large panels? */
+/* CRT2/LCD over 1600? Is this really going to happen, or will there be LCDA only for large panels? */
 #define VB2_LCDOVER1600BRIDGE	(VB2_307T  | VB2_307LV)
 /* VGA2 up to 202MHz (1600x1200@75) */
 #define VB2_RAMDAC202MHZBRIDGE	(VB2_301C  | VB2_307T)
@@ -1211,7 +1211,7 @@ typedef struct {
     UShort		SiS_DDC2_Data;
     UShort		SiS_DDC2_Clk;
     Bool		Primary;		/* Display adapter is primary */
-    Bool		VGADecodingEnabled;	/* a0000 memory adress decoding is enabled */
+    Bool		VGADecodingEnabled;	/* a0000 memory address decoding is enabled */
     xf86Int10InfoPtr	pInt;			/* Our int10 */
     int			oldChipset;		/* Type of old chipset */
     int			RealVideoRam;		/* 6326 can only address 4MB, but TQ can be above */
diff --git a/src/sis300_accel.c b/src/sis300_accel.c
index 7176b4f..aaed6ed 100644
--- a/src/sis300_accel.c
+++ b/src/sis300_accel.c
@@ -291,7 +291,7 @@ SiSSubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
 	}
 #endif
 
-	/* Determine egde angles */
+	/* Determine edge angles */
 	if(dxL < 0) { dxL = -dxL; }
 	else { SiSSetupCMDFlag(T_L_X_INC) }
 	if(dxR < 0) { dxR = -dxR; }
@@ -664,7 +664,7 @@ SiSSubsequentScreenToScreenColorExpand(ScrnInfoPtr pScrn,
 	int newsrcx, newsrcy;
 
 	/* srcx and srcy are provided based on a scrnOffset pitch ( = displayWidth * bpp / 8 )
-	 * We recalulate srcx and srcy based on pitch = displayWidth / 8
+	 * We recalculate srcx and srcy based on pitch = displayWidth / 8
 	 */
         newsrcy = ((pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8))) /
 					  (pScrn->displayWidth/8);
diff --git a/src/sis310_accel.c b/src/sis310_accel.c
index 85110d2..0c6f959 100644
--- a/src/sis310_accel.c
+++ b/src/sis310_accel.c
@@ -493,7 +493,7 @@ SiSSubsequentSolidFillTrap(ScrnInfoPtr pScrn, int y, int h,
         xf86DrvMsg(0, X_INFO, "Trap (%d %d %d %d) dxL %d dyL %d eL %d   dxR %d dyR %d eR %d\n",
 		left, right, y, h, dxL, dyL, eL, dxR, dyR, eR);
 
-	/* Determine egde angles */
+	/* Determine edge angles */
 	if(dxL < 0) 	{ dxL = -dxL; }
 	else 		{ SiSSetupCMDFlag(T_L_X_INC) }
 	if(dxR < 0) 	{ dxR = -dxR; }
@@ -1222,7 +1222,7 @@ SiSSubsequentScreenToScreenColorExpand(ScrnInfoPtr pScrn,
 	int newsrcx, newsrcy;
 
 	/* srcx and srcy are provided based on a scrnOffset pitch ( = displayWidth * bpp / 8 )
-	 * We recalulate srcx and srcy based on pitch = displayWidth / 8
+	 * We recalculate srcx and srcy based on pitch = displayWidth / 8
 	 */
         newsrcy = ((pSiS->scrnOffset * srcy) + (srcx * ((pScrn->bitsPerPixel+7)/8))) /
 					  (pScrn->displayWidth/8);
diff --git a/src/sis_accel.h b/src/sis_accel.h
index 99ec5ae..4aec139 100644
--- a/src/sis_accel.h
+++ b/src/sis_accel.h
@@ -165,7 +165,7 @@ const int sisReg32MMIO[] = {
 
 /* Height and width
  * According to SIS 2D Engine Programming Guide
- * height -1, width - 1 independant of Bpp
+ * height -1, width - 1 independent of Bpp
  */
 #define sisSETHEIGHTWIDTH(Height, Width) \
   SIS_MMIO_OUT32(pSiS->IOBase, BR(3), ((((Height) & 0xFFFF) << 16) | ((Width) & 0xFFFF)));
diff --git a/src/sis_dac.c b/src/sis_dac.c
index 04276b6..36db8d8 100644
--- a/src/sis_dac.c
+++ b/src/sis_dac.c
@@ -93,7 +93,7 @@ static void SiS301Restore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301BRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiSLVDSChrontelRestore(ScrnInfoPtr pScrn, SISRegPtr sisReg);
 static void SiS301LoadPalette(ScrnInfoPtr pScrn, int numColors,
-                      int *indicies, LOCO *colors, int myshift);
+                      int *indices, LOCO *colors, int myshift);
 static void SetBlock(CARD16 port, CARD8 from, CARD8 to, CARD8 *DataPtr);
 
 UChar       SiSGetCopyROP(int rop);
@@ -1361,7 +1361,7 @@ SiSMclk(SISPtr pSiS)
  * we return the maximum dotclock used by
  * - either the LCD attached, or
  * - TV
- * For VGA2, we share the bandwith equally.
+ * For VGA2, we share the bandwidth equally.
  */
 static int
 SiSEstimateCRT2Clock(ScrnInfoPtr pScrn, Bool FakeForCRT2)
@@ -1677,7 +1677,7 @@ int SiSMemBandWidth(ScrnInfoPtr pScrn, Bool IsForCRT2)
 /* Load the palette. We do this for all supported color depths
  * in order to support gamma correction. We hereby convert the
  * given colormap to a complete 24bit color palette and enable
- * the correspoding bit in SR7 to enable the 24bit lookup table.
+ * the corresponding bit in SR7 to enable the 24bit lookup table.
  * Gamma correction for CRT2 is only supported on SiS video bridges.
  * There are there 6-bit-RGB values submitted even if bpp is 16 and
  * weight is 565, because SetWeight() sets rgbBits to the maximum
diff --git a/src/sis_dac.h b/src/sis_dac.h
index 18d956d..a4f9c0d 100644
--- a/src/sis_dac.h
+++ b/src/sis_dac.h
@@ -31,7 +31,7 @@
 int  SiS_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div,
 	     		int *out_sbit, int *out_scale);
 void SISDACPreInit(ScrnInfoPtr pScrn);
-void SISLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies,
+void SISLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indices,
 		        LOCO *colors, VisualPtr pVisual);
 void SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD,
                         unsigned int *vclk);
diff --git a/src/sis_dri.c b/src/sis_dri.c
index 5778c51..76fa8b7 100644
--- a/src/sis_dri.c
+++ b/src/sis_dri.c
@@ -209,7 +209,7 @@ SISDRIScreenInit(ScreenPtr pScreen)
 #endif
   pDRIInfo->frameBufferSize = pSIS->FbMapSize;
 
-  /* scrnOffset is being calulated in sis_vga.c */
+  /* scrnOffset is being calculated in sis_vga.c */
   pDRIInfo->frameBufferStride = pSIS->scrnOffset;
 
   pDRIInfo->ddxDrawableTableEntry = SIS_MAX_DRAWABLES;
diff --git a/src/sis_driver.c b/src/sis_driver.c
index 390f887..09e275a 100644
--- a/src/sis_driver.c
+++ b/src/sis_driver.c
@@ -3468,7 +3468,7 @@ SISPreInit(ScrnInfoPtr pScrn, int flags)
      * its PCI resources enabled, leads to X assuming that
      * there are more than one "primary" cards in the system.
      * In this case, X treats ALL cards as "secondary" -
-     * which by no means is desireable. If sisfb is running,
+     * which by no means is desirable. If sisfb is running,
      * we can determine which card really is "primary" (in
      * terms of if it's the one that occupies the A0000 area
      * etc.) in a better way (Linux 2.6.12 or later). See below.
@@ -7789,7 +7789,7 @@ SiSSetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
     if(!(mode = SiSCalcVESAModeIndex(pScrn, pMode))) return FALSE;
 
     mode |= (1 << 15);	/* Don't clear framebuffer */
-    mode |= (1 << 14); 	/* Use linear adressing */
+    mode |= (1 << 14); 	/* Use linear addressing */
 
     if(VBESetVBEMode(pSiS->pVbe, mode, NULL) == FALSE) {
        SISErrorLog(pScrn, "Setting VESA mode 0x%x failed\n",
@@ -8425,7 +8425,7 @@ SISDisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode, int fla
      * the correct PCI bridges before access the hardware. Now we have this
      * hook wrapped by the vga arbiter which should do all the work, in
      * kernels that implement it. For this case we might not want this hack
-     * bellow.
+     * below.
      */
     outSISIDXREG(SISSR,0x05,0x86);
     inSISIDXREG(SISSR,0x05,pmreg);
@@ -10297,7 +10297,7 @@ SiSEnableTurboQueue(ScrnInfoPtr pScrn)
 #endif
 #else
 	      /* For MMIO */
-	      /* Syncronous reset for Command Queue */
+	      /* Synchronous reset for Command Queue */
 	      orSISIDXREG(SISSR, 0x26, 0x01);
 	      /* Set Command Queue Threshold to max value 11111b */
 	      outSISIDXREG(SISSR, 0x27, 0x1F);
@@ -12930,7 +12930,7 @@ SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg)
 		*	This is not entirely accurate; the overlay
 		*	scaler also requires some time, so even though
 		*	the dotclocks are below these values, some
-		*	distortions in the overlay may occure.
+		*	distortions in the overlay may occur.
 		*	Solution: Don't use a 760 with shared memory.
 		*/
 	       if( (pSiS->VBFlags & DISPTYPE_CRT1) &&
@@ -13636,7 +13636,7 @@ SiSValidLCDUserMode(SISPtr pSiS, unsigned int VBFlags, DisplayModePtr mode, Bool
       if(mode->Clock > 130000)  return FALSE;
       if(mode->Clock > 111000) {
          xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING,
-	 	"WARNING: Mode clock beyond video bridge specs (%dMHz). Hardware damage might occure.\n",
+		"WARNING: Mode clock beyond video bridge specs (%dMHz). Hardware damage might occur.\n",
 		mode->Clock / 1000);
       }
       if(mode->HDisplay > 1600) return FALSE;
diff --git a/src/sis_memcpy.c b/src/sis_memcpy.c
index 9d1cb72..d144a02 100644
--- a/src/sis_memcpy.c
+++ b/src/sis_memcpy.c
@@ -576,7 +576,7 @@ static unsigned int taketime(void)	/* get current time (for benchmarking) */
 /* 2. Do we have /proc filesystem or similar for CPU information? */
 /* #define SiS_haveproc			*/
 
-/* 3. Optional: build-in memcpy()	*/
+/* 3. Optional: built-in memcpy()	*/
 /* #define SiS_haveBuiltInMC		*/
 /* static __inline void * builtin_memcpy(void * to, const void * from, int n)
    {
diff --git a/src/sis_opt.c b/src/sis_opt.c
index 3fa12c9..3bb858e 100644
--- a/src/sis_opt.c
+++ b/src/sis_opt.c
@@ -1079,7 +1079,7 @@ SiSOptions(ScrnInfoPtr pScrn)
 	   * In dual head mode, using the hotkey is lethal, so we
 	   * forbid it then in any case.
 	   * However, although the driver disables the hotkey as
-	   * BIOS developers intented to do that, some buggy BIOSes
+	   * BIOS developers intended to do that, some buggy BIOSes
 	   * still cause the machine to freeze. Hence the warning.
 	   */
 	  ival = 0;
@@ -1135,7 +1135,7 @@ SiSOptions(ScrnInfoPtr pScrn)
 
 	  /* CRT2DDCDetection (315/330 series and later only)
 	   * If set to true, this disables CRT2 detection using DDC. This is
-	   * to avoid problems with not entirely DDC compiant LCD panels or
+	   * to avoid problems with not entirely DDC compliant LCD panels or
 	   * VGA monitors connected to the secondary VGA plug. Since LCD and
 	   * VGA share the same DDC channel, it might in some cases be impossible
 	   * to determine if the device is a CRT monitor or a flat panel.
@@ -1175,7 +1175,7 @@ SiSOptions(ScrnInfoPtr pScrn)
 
 	  /* ForceCRT1Type (315/330 series and later only)
 	   * Used for forcing the driver to initialize CRT1 as
-	   * VGA (analog) or LCDA (for simultanious LCD and TV
+	   * VGA (analog) or LCDA (for simultaneous LCD and TV
 	   * display) - on M650/651 and 661 or later with 301C/30xLV only!
 	   */
 	  if(pSiS->VGAEngine == SIS_315_VGA) {
diff --git a/src/sis_setup.c b/src/sis_setup.c
index 562f28d..bb8c6cd 100644
--- a/src/sis_setup.c
+++ b/src/sis_setup.c
@@ -507,9 +507,9 @@ sis315Setup(ScrnInfoPtr pScrn)
 	"",
 	"--unknown--",
 	"",
-	"Asymetric Dual Channel SDR SDRAM",
+	"Asymmetric Dual Channel SDR SDRAM",
 	"",
-	"Asymetric Dual Channel DDR SDRAM",
+	"Asymmetric Dual Channel DDR SDRAM",
 	"",
 	"Dual channel SDR SDRAM",
 	"",
@@ -631,7 +631,7 @@ sis315Setup(ScrnInfoPtr pScrn)
        /* If SINGLE_CHANNEL_2_RANK or DUAL_CHANNEL_1_RANK -> mem * 2 */
        if((config1 == 0x01) || (config1 == 0x03)) pScrn->videoRam <<= 1;
 
-       /* If DDR asymetric -> mem * 1,5 */
+       /* If DDR asymmetric -> mem * 1,5 */
        if(config1 == 0x02) pScrn->videoRam += pScrn->videoRam/2;
 
        xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
diff --git a/src/sis_vga.c b/src/sis_vga.c
index 8b625d2..59d48d5 100644
--- a/src/sis_vga.c
+++ b/src/sis_vga.c
@@ -1236,7 +1236,7 @@ void SISVGAPreInit(ScrnInfoPtr pScrn)
 	      SISSenseChrontel(pScrn, FALSE);
 
 	   } else if(temp1 == 0) {
-	      /* This indicates a communication problem, but it only occures if there
+	      /* This indicates a communication problem, but it only occurs if there
 	       * is no TV attached. So we don't use TV in this case.
 	       */
 	      xf86DrvMsg(pScrn->scrnIndex, X_INFO,
diff --git a/src/sis_video.c b/src/sis_video.c
index 3eeda5e..9f9aada 100644
--- a/src/sis_video.c
+++ b/src/sis_video.c
@@ -3300,7 +3300,7 @@ MIRROR:
     *   when the current scanline is beyond the current
     *   overlay position and below the maximum visible
     *   scanline (vertical screen resolution)
-    * - If a vertical retrace occures during writing the
+    * - If a vertical retrace occurs during writing the
     *   registers, the registers written BEFORE this re-
     *   trace happened, are not being read into the
     *   engine if the trigger is set after the retrace.