conntest: Update PCI ID list.

1 files changed, 66 insertions, 9 deletions

diff --git a/utils/conntest/rhd_conntest.c b/utils/conntest/rhd_conntest.c
index 1c095ed..2097e9a 100644
--- a/utils/conntest/rhd_conntest.c
+++ b/utils/conntest/rhd_conntest.c
@@ -447,6 +447,46 @@ struct RHDDevice {
     { 0x1002, 0x940A, 2, RHD_R600},
     { 0x1002, 0x940B, 2, RHD_R600},
     { 0x1002, 0x940F, 2, RHD_R600},
+    { 0x1002, 0x9440, 2, RHD_RV620},
+    { 0x1002, 0x9441, 2, RHD_RV620},
+    { 0x1002, 0x9442, 2, RHD_RV620},
+    { 0x1002, 0x9444, 2, RHD_RV620},
+    { 0x1002, 0x9446, 2, RHD_RV620},
+    { 0x1002, 0x9447, 2, RHD_RV620},
+    { 0x1002, 0x944A, 2, RHD_RV620},
+    { 0x1002, 0x944B, 2, RHD_RV620},
+    { 0x1002, 0x944C, 2, RHD_RV620},
+    { 0x1002, 0x944E, 2, RHD_RV620},
+    { 0x1002, 0x9450, 2, RHD_RV620},
+    { 0x1002, 0x9456, 2, RHD_RV620},
+    { 0x1002, 0x945A, 2, RHD_RV620},
+    { 0x1002, 0x945B, 2, RHD_RV620},
+    { 0x1002, 0x9460, 2, RHD_RV620},
+    { 0x1002, 0x9462, 2, RHD_RV620},
+    { 0x1002, 0x946A, 2, RHD_RV620},
+    { 0x1002, 0x946B, 2, RHD_RV620},
+    { 0x1002, 0x947A, 2, RHD_RV620},
+    { 0x1002, 0x947B, 2, RHD_RV620},
+    { 0x1002, 0x9480, 2, RHD_RV620},
+    { 0x1002, 0x9487, 2, RHD_RV620},
+    { 0x1002, 0x9488, 2, RHD_RV620},
+    { 0x1002, 0x9489, 2, RHD_RV620},
+    { 0x1002, 0x948F, 2, RHD_RV620},
+    { 0x1002, 0x9490, 2, RHD_RV620},
+    { 0x1002, 0x9491, 2, RHD_RV620},
+    { 0x1002, 0x9495, 2, RHD_RV620},
+    { 0x1002, 0x9498, 2, RHD_RV620},
+    { 0x1002, 0x949C, 2, RHD_RV620},
+    { 0x1002, 0x949E, 2, RHD_RV620},
+    { 0x1002, 0x949F, 2, RHD_RV620},
+    { 0x1002, 0x94A0, 2, RHD_RV620},
+    { 0x1002, 0x94A1, 2, RHD_RV620},
+    { 0x1002, 0x94A3, 2, RHD_RV620},
+    { 0x1002, 0x94B1, 2, RHD_RV620},
+    { 0x1002, 0x94B3, 2, RHD_RV620},
+    { 0x1002, 0x94B4, 2, RHD_RV620},
+    { 0x1002, 0x94B5, 2, RHD_RV620},
+    { 0x1002, 0x94B9, 2, RHD_RV620},
     { 0x1002, 0x94C0, 2, RHD_R600},
     { 0x1002, 0x94C1, 2, RHD_R600},
     { 0x1002, 0x94C3, 2, RHD_R600},
@@ -460,10 +500,26 @@ struct RHDDevice {
     { 0x1002, 0x94CC, 2, RHD_R600},
     { 0x1002, 0x9500, 2, RHD_R600},
     { 0x1002, 0x9501, 2, RHD_R600},
+    { 0x1002, 0x9504, 2, RHD_R600},
     { 0x1002, 0x9505, 2, RHD_R600},
+    { 0x1002, 0x9506, 2, RHD_R600},
     { 0x1002, 0x9507, 2, RHD_R600},
+    { 0x1002, 0x9508, 2, RHD_R600},
+    { 0x1002, 0x9509, 2, RHD_R600},
     { 0x1002, 0x950F, 2, RHD_R600},
     { 0x1002, 0x9511, 2, RHD_R600},
+    { 0x1002, 0x9513, 2, RHD_R600},
+    { 0x1002, 0x9515, 2, RHD_R600},
+    { 0x1002, 0x9517, 2, RHD_R600},
+    { 0x1002, 0x9519, 2, RHD_R600},
+    { 0x1002, 0x9540, 2, RHD_R600},
+    { 0x1002, 0x9541, 2, RHD_R600},
+    { 0x1002, 0x9542, 2, RHD_R600},
+    { 0x1002, 0x954E, 2, RHD_R600},
+    { 0x1002, 0x954F, 2, RHD_R600},
+    { 0x1002, 0x9553, 2, RHD_R600},
+    { 0x1002, 0x9555, 2, RHD_R600},
+    { 0x1002, 0x9557, 2, RHD_R600},
     { 0x1002, 0x9580, 2, RHD_R600},
     { 0x1002, 0x9581, 2, RHD_R600},
     { 0x1002, 0x9583, 2, RHD_R600},
@@ -479,8 +535,10 @@ struct RHDDevice {
     { 0x1002, 0x958F, 2, RHD_R600},
     { 0x1002, 0x9590, 2, RHD_RV620},
     { 0x1002, 0x9591, 2, RHD_RV620},
+    { 0x1002, 0x9592, 2, RHD_RV620},
     { 0x1002, 0x9593, 2, RHD_RV620},
     { 0x1002, 0x9594, 2, RHD_RV620},
+    { 0x1002, 0x9595, 2, RHD_RV620},
     { 0x1002, 0x9596, 2, RHD_RV620},
     { 0x1002, 0x9597, 2, RHD_RV620},
     { 0x1002, 0x9598, 2, RHD_RV620},
@@ -500,15 +558,14 @@ struct RHDDevice {
     { 0x1002, 0x9612, 2, RHD_RV620},
     { 0x1002, 0x9613, 2, RHD_RV620},
     { 0x1002, 0x9614, 2, RHD_RV620},
-    { 0x1002, 0x9440, 2, RHD_RV620},
-    { 0x1002, 0x9441, 2, RHD_RV620},
-    { 0x1002, 0x9442, 2, RHD_RV620},
-    { 0x1002, 0x9444, 2, RHD_RV620},
-    { 0x1002, 0x9446, 2, RHD_RV620},
-    { 0x1002, 0x944E, 2, RHD_RV620},
-    { 0x1002, 0x9456, 2, RHD_RV620},
-    { 0x1002, 0x9590, 2, RHD_RV620},
-    { 0x1002, 0x954F, 2, RHD_RV620},
+    { 0x1002, 0x9615, 2, RHD_RV620},
+    { 0x1002, 0x9616, 2, RHD_RV620},
+    { 0x1002, 0x9710, 2, RHD_RV620},
+    { 0x1002, 0x9711, 2, RHD_RV620},
+    { 0x1002, 0x9711, 2, RHD_RV620},
+    { 0x1002, 0x9712, 2, RHD_RV620},
+    { 0x1002, 0x9713, 2, RHD_RV620},
+    { 0x1002, 0x9714, 2, RHD_RV620},
     { 0, 0, 0, 0 }
 };