summaryrefslogtreecommitdiff
path: root/src
diff options
context:
space:
mode:
authorDave Airlie <airlied@redhat.com>2008-02-27 13:18:57 +1000
committerDave Airlie <airlied@redhat.com>2008-02-27 13:18:57 +1000
commit8c8779a65ff3f017f02b6024a20ba4ceb8c48e4e (patch)
tree561297affd3fd3998855dbbaef811608ea313608 /src
parent6b837746d1652150c0ed4d61442a975cf687f624 (diff)
i128: pciaccess conversion
Diffstat (limited to 'src')
-rw-r--r--src/i128.h4
-rw-r--r--src/i128_driver.c102
-rw-r--r--src/i128dga.c2
-rw-r--r--src/i128pcirename.h122
4 files changed, 199 insertions, 31 deletions
diff --git a/src/i128.h b/src/i128.h
index 24d53b8..428539c 100644
--- a/src/i128.h
+++ b/src/i128.h
@@ -12,6 +12,8 @@
#ifndef I128_H
#define I128_H
+#include "i128pcirename.h"
+
#include "compiler.h"
#include "xaa.h"
#include "exa.h"
@@ -35,7 +37,9 @@ struct source_format {
typedef struct {
EntityInfoPtr pEnt;
pciVideoPtr PciInfo;
+#ifndef XSERVER_LIBPCIACCESS
PCITAG PciTag;
+#endif
xf86AccessRec Access;
int Chipset;
int ChipRev;
diff --git a/src/i128_driver.c b/src/i128_driver.c
index 99356da..f2800e2 100644
--- a/src/i128_driver.c
+++ b/src/i128_driver.c
@@ -386,6 +386,7 @@ I128Probe(DriverPtr drv, int flags)
* All of the cards this driver supports are PCI, so the "probing" just
* amounts to checking the PCI data that the server has already collected.
*/
+#ifndef XSERVER_LIBPCIACCESS
if (xf86GetPciVideoInfo() == NULL) {
/*
* We won't let anything in the config file override finding no
@@ -393,6 +394,7 @@ I128Probe(DriverPtr drv, int flags)
*/
return FALSE;
}
+#endif
numUsed = xf86MatchPciInstances(I128_NAME, PCI_VENDOR_NUMNINE,
I128Chipsets, I128PciChipsets, devSections,
@@ -569,8 +571,10 @@ I128PreInit(ScrnInfoPtr pScrn, int flags)
/* Find the PCI info for this screen */
pI128->PciInfo = xf86GetPciInfoForEntity(pI128->pEnt->index);
+#ifndef XSERVER_LIBPCIACCESS
pI128->PciTag = pciTag(pI128->PciInfo->bus, pI128->PciInfo->device,
pI128->PciInfo->func);
+#endif
pI128->Primary = xf86IsPrimaryPci(pI128->PciInfo);
@@ -717,9 +721,9 @@ I128PreInit(ScrnInfoPtr pScrn, int flags)
* Set the Chipset and ChipRev.
*/
from = X_PROBED;
- pI128->Chipset = pI128->PciInfo->chipType;
+ pI128->Chipset = PCI_DEV_DEVICE_ID(pI128->PciInfo);
pScrn->chipset = (char *)xf86TokenToString(I128Chipsets, pI128->Chipset);
- pI128->ChipRev = pI128->PciInfo->chipRev;
+ pI128->ChipRev = PCI_DEV_REVISION(pI128->PciInfo);
/*
* This shouldn't happen because such problems should be caught in
@@ -737,15 +741,15 @@ I128PreInit(ScrnInfoPtr pScrn, int flags)
}
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset: \"%s\"\n", pScrn->chipset);
- if (pI128->PciInfo->subsysVendor == 0x105D)
+ if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x105D)
xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Number Nine\"\n");
- else if (pI128->PciInfo->subsysVendor == 0x10F0)
+ else if (PCI_SUB_VENDOR_ID(pI128->PciInfo) == 0x10F0)
xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"Peritek\"\n");
else
xf86DrvMsg(pScrn->scrnIndex, from, "Subsystem Vendor: \"%x\"\n",
- pI128->PciInfo->subsysVendor);
+ PCI_SUB_VENDOR_ID(pI128->PciInfo));
- iobase = (pI128->PciInfo->ioBase[5] & 0xFFFFFF00) + hwp->PIOOffset;
+ iobase = (PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00) + hwp->PIOOffset;
pI128->RegRec.iobase = iobase;
pI128->io.rbase_g = inl(iobase) & 0xFFFFFF00;
@@ -789,9 +793,18 @@ I128PreInit(ScrnInfoPtr pScrn, int flags)
else
pI128->MemoryType = I128_MEMORY_WRAM;
} else if (pI128->Chipset == PCI_CHIP_I128_2) {
+#ifndef XSERVER_LIBPCIACCESS
if (((((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command & 0x03)
- == 0x03) && (pI128->PciInfo->subsysCard == 0x08))
+ == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08))
pI128->MemoryType = I128_MEMORY_DRAM;
+#else
+ {
+ unsigned short temp;
+ pci_device_cfg_read_u16(pI128->PciInfo, &temp, 0x4);
+ if ((temp & 0x03 == 0x03) && (PCI_SUB_DEVICE_ID(pI128->PciInfo) == 0x08))
+ pI128->MemoryType = I128_MEMORY_DRAM;
+ }
+#endif
}
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Memory type %s\n",
@@ -806,10 +819,10 @@ I128PreInit(ScrnInfoPtr pScrn, int flags)
outl(pI128->RegRec.iobase + 0x20, pI128->io.config2);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Linear framebuffer at 0x%lX\n",
- (unsigned long)pI128->PciInfo->memBase[0]);
+ (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM));
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "MMIO registers at 0x%lX\n",
- (unsigned long)pI128->PciInfo->ioBase[5]);
+ (unsigned long)PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO));
if (xf86RegisterResources(pI128->pEnt->index, NULL, ResExclusive)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1288,7 +1301,7 @@ I128CountRam(ScrnInfoPtr pScrn)
switch(pI128->Chipset) {
case PCI_CHIP_I128_T2R4:
/* Use the subsystem ID to determine the memory size */
- switch ((pI128->PciInfo->subsysCard) & 0x0007) {
+ switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0x0007) {
case 0x00: /* 4MB card */
SizeFound = 4 * 1024; break;
case 0x01: /* 8MB card */
@@ -1310,7 +1323,7 @@ I128CountRam(ScrnInfoPtr pScrn)
}
break;
case PCI_CHIP_I128_T2R:
- switch ((pI128->PciInfo->subsysCard) & 0xFFF7) {
+ switch ((PCI_SUB_DEVICE_ID(pI128->PciInfo)) & 0xFFF7) {
case 0x00: /* 4MB card, no daughtercard */
SizeFound = 4 * 1024; break;
case 0x01: /* 4MB card, 4MB daughtercard */
@@ -1360,22 +1373,49 @@ I128MapMem(ScrnInfoPtr pScrn)
/*
* Map IO registers to virtual address space
*/
-
+#ifndef XSERVER_LIBPCIACCESS
pI128->mem.mw0_ad = (unsigned char *)xf86MapPciMem(pScrn->scrnIndex,
VIDMEM_FRAMEBUFFER,
pI128->PciTag,
pI128->PciInfo->memBase[0] & 0xFFC00000,
pI128->MemorySize*1024);
+#else
+ {
+ void** result = (void**)&pI128->mem.mw0_ad;
+ int err = pci_device_map_range(pI128->PciInfo,
+ PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xffc00000,
+ pI128->MemorySize * 1024,
+ PCI_DEV_MAP_FLAG_WRITABLE |
+ PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+ result);
+ if (err)
+ return FALSE;
+ }
+#endif
+
if (pI128->mem.mw0_ad == NULL)
return FALSE;
pI128->MemoryPtr = pI128->mem.mw0_ad;
+#ifndef XSERVER_LIBPCIACCESS
pI128->mem.rbase_g = (CARD32 *)xf86MapPciMem(pScrn->scrnIndex,
VIDMEM_MMIO | VIDMEM_MMIO_32BIT,
pI128->PciTag,
pI128->PciInfo->memBase[4] & 0xFFFF0000,
64*1024);
+#else
+ {
+ void** result = (void**)&pI128->mem.rbase_g;
+ int err = pci_device_map_range(pI128->PciInfo,
+ PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xffff0000,
+ 64 * 1024,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ result);
+ if (err)
+ return FALSE;
+ }
+#endif
if (pI128->mem.rbase_g == NULL)
return FALSE;
@@ -2069,38 +2109,39 @@ I128DumpBaseRegisters(ScrnInfoPtr pScrn)
" PCI Registers\n");
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" MW0_AD 0x%08lx addr 0x%08lx %spre-fetchable\n",
- pI128->PciInfo->memBase[0],
- pI128->PciInfo->memBase[0] & 0xFFC00000,
- pI128->PciInfo->memBase[0] & 0x8 ? "" : "not-");
+ PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM),
+ PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0xFFC00000,
+ PCI_REGION_BASE(pI128->PciInfo, 0, REGION_MEM) & 0x8 ? "" : "not-");
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" MW1_AD 0x%08lx addr 0x%08lx %spre-fetchable\n",
- pI128->PciInfo->memBase[1],
- pI128->PciInfo->memBase[1] & 0xFFC00000,
- pI128->PciInfo->memBase[1] & 0x8 ? "" : "not-");
+ PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM),
+ PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0xFFC00000,
+ PCI_REGION_BASE(pI128->PciInfo, 1, REGION_MEM) & 0x8 ? "" : "not-");
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" XYW_AD(A) 0x%08lx addr 0x%08lx\n",
- pI128->PciInfo->memBase[2],
- pI128->PciInfo->memBase[2] & 0xFFC00000);
+ PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM),
+ PCI_REGION_BASE(pI128->PciInfo, 2, REGION_MEM) & 0xFFC00000);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" XYW_AD(B) 0x%08lx addr 0x%08lx\n",
- pI128->PciInfo->memBase[3],
- pI128->PciInfo->memBase[3] & 0xFFC00000);
+ PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM),
+ PCI_REGION_BASE(pI128->PciInfo, 3, REGION_MEM) & 0xFFC00000);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" RBASE_G 0x%08lx addr 0x%08lx\n",
- pI128->PciInfo->memBase[4],
- pI128->PciInfo->memBase[4] & 0xFFFF0000);
+ PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM),
+ PCI_REGION_BASE(pI128->PciInfo, 4, REGION_MEM) & 0xFFFF0000);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" IO 0x%08lx addr 0x%08lx\n",
- pI128->PciInfo->ioBase[5],
- pI128->PciInfo->ioBase[5] & 0xFFFFFF00);
+ PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO),
+ PCI_REGION_BASE(pI128->PciInfo, 5, REGION_IO) & 0xFFFFFF00);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" SSC 0x%08x addr 0x%08x\n",
- pI128->PciInfo->subsysCard,
- pI128->PciInfo->subsysCard & 0xFFFFFF00);
+ PCI_SUB_DEVICE_ID(pI128->PciInfo),
+ PCI_SUB_DEVICE_ID(pI128->PciInfo) & 0xFFFFFF00);
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" SSV 0x%08x addr 0x%08x\n",
- pI128->PciInfo->subsysVendor,
- pI128->PciInfo->subsysVendor & 0xFFFFFF00);
+ PCI_SUB_VENDOR_ID(pI128->PciInfo),
+ PCI_SUB_VENDOR_ID(pI128->PciInfo) & 0xFFFFFF00);
+#ifndef XSERVER_LIBPCIACCESS
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" RBASE_E 0x%08lx addr 0x%08lx %sdecode-enabled\n\n",
pI128->PciInfo->biosBase,
@@ -2111,6 +2152,7 @@ I128DumpBaseRegisters(ScrnInfoPtr pScrn)
" PCICMDST 0x%08x 0x%08x\n",
((pciConfigPtr)pI128->PciInfo->thisCard)->pci_command,
((pciConfigPtr)pI128->PciInfo->thisCard)->pci_status);
+#endif
xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
" IO Mapped Registers\n");
diff --git a/src/i128dga.c b/src/i128dga.c
index 1ceae5f..d6ce301 100644
--- a/src/i128dga.c
+++ b/src/i128dga.c
@@ -266,7 +266,7 @@ I128_OpenFramebuffer(
int *flags
){
I128Ptr pI128 = I128PTR(pScrn);
- unsigned long FbAddress = pI128->PciInfo->memBase[0] & 0xFFC00000;
+ unsigned long FbAddress = PCI_REGION_BASE(pI128->PciInfo, 0, MEM_REGION) & 0xFFC00000;
*name = NULL; /* no special device */
*mem = (unsigned char*)FbAddress;
diff --git a/src/i128pcirename.h b/src/i128pcirename.h
new file mode 100644
index 0000000..f0f5cf8
--- /dev/null
+++ b/src/i128pcirename.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright 2007 George Sapountzis
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+/**
+ * Macros for porting drivers from legacy xfree86 PCI code to the pciaccess
+ * library. The main purpose being to facilitate source code compatibility.
+ */
+
+#ifndef CIRPCIRENAME_H
+#define CIRPCIRENAME_H
+
+enum region_type {
+ REGION_MEM,
+ REGION_IO
+};
+
+#ifndef XSERVER_LIBPCIACCESS
+
+/* pciVideoPtr */
+#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor)
+#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->chipType)
+#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->chipRev)
+
+#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subsysVendor)
+#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subsysCard)
+
+#define PCI_DEV_TAG(_pcidev) pciTag((_pcidev)->bus, \
+ (_pcidev)->device, \
+ (_pcidev)->func)
+#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus)
+#define PCI_DEV_DEV(_pcidev) ((_pcidev)->device)
+#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func)
+
+/* pciConfigPtr */
+#define PCI_CFG_TAG(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->tag)
+#define PCI_CFG_BUS(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->busnum)
+#define PCI_CFG_DEV(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->devnum)
+#define PCI_CFG_FUNC(_pcidev) (((pciConfigPtr)(_pcidev)->thisCard)->funcnum)
+
+/* region addr: xfree86 uses different fields for memory regions and I/O ports */
+#define PCI_REGION_BASE(_pcidev, _b, _type) \
+ (((_type) == REGION_MEM) ? (_pcidev)->memBase[(_b)] \
+ : (_pcidev)->ioBase[(_b)])
+
+/* region size: xfree86 uses the log2 of the region size,
+ * but with zero meaning no region, not size of one XXX */
+#define PCI_REGION_SIZE(_pcidev, _b) \
+ (((_pcidev)->size[(_b)] > 0) ? (1 << (_pcidev)->size[(_b)]) : 0)
+
+/* read/write PCI configuration space */
+#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
+ *(_value_ptr) = pciReadByte(PCI_CFG_TAG(_pcidev), (_offset))
+
+#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
+ *(_value_ptr) = pciReadLong(PCI_CFG_TAG(_pcidev), (_offset))
+
+#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
+ pciWriteLong(PCI_CFG_TAG(_pcidev), (_offset), (_value))
+
+#else /* XSERVER_LIBPCIACCESS */
+
+typedef struct pci_device *pciVideoPtr;
+
+#define PCI_DEV_VENDOR_ID(_pcidev) ((_pcidev)->vendor_id)
+#define PCI_DEV_DEVICE_ID(_pcidev) ((_pcidev)->device_id)
+#define PCI_DEV_REVISION(_pcidev) ((_pcidev)->revision)
+
+#define PCI_SUB_VENDOR_ID(_pcidev) ((_pcidev)->subvendor_id)
+#define PCI_SUB_DEVICE_ID(_pcidev) ((_pcidev)->subdevice_id)
+
+/* pci-rework functions take a 'pci_device' parameter instead of a tag */
+#define PCI_DEV_TAG(_pcidev) (_pcidev)
+
+/* PCI_DEV macros, typically used in printf's, add domain ? XXX */
+#define PCI_DEV_BUS(_pcidev) ((_pcidev)->bus)
+#define PCI_DEV_DEV(_pcidev) ((_pcidev)->dev)
+#define PCI_DEV_FUNC(_pcidev) ((_pcidev)->func)
+
+/* pci-rework functions take a 'pci_device' parameter instead of a tag */
+#define PCI_CFG_TAG(_pcidev) (_pcidev)
+
+/* PCI_CFG macros, typically used in DRI init, contain the domain */
+#define PCI_CFG_BUS(_pcidev) (((_pcidev)->domain << 8) | \
+ (_pcidev)->bus)
+#define PCI_CFG_DEV(_pcidev) ((_pcidev)->dev)
+#define PCI_CFG_FUNC(_pcidev) ((_pcidev)->func)
+
+#define PCI_REGION_BASE(_pcidev, _b, _type) ((_pcidev)->regions[(_b)].base_addr)
+#define PCI_REGION_SIZE(_pcidev, _b) ((_pcidev)->regions[(_b)].size)
+
+#define PCI_READ_BYTE(_pcidev, _value_ptr, _offset) \
+ pci_device_cfg_read_u8((_pcidev), (_value_ptr), (_offset))
+
+#define PCI_READ_LONG(_pcidev, _value_ptr, _offset) \
+ pci_device_cfg_read_u32((_pcidev), (_value_ptr), (_offset))
+
+#define PCI_WRITE_LONG(_pcidev, _value, _offset) \
+ pci_device_cfg_write_u32((_pcidev), (_value), (_offset))
+
+#endif /* XSERVER_LIBPCIACCESS */
+
+#endif /* CIRPCIRENAME_H */