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authorHomer Hsing <homer.xing@intel.com>2012-10-19 11:18:23 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2012-10-23 09:59:17 +0800
commit7f04876a3196c0aa5021676f0f3345e553145bd4 (patch)
treeded763d180eb2c7534645b0ffe05fef47755c175
parentacd67514e580de53873a37de66e3a5fb3e59ed5c (diff)
Fix Gen7 JMPI compilation
Gen7 JMPI Restrictions in bspec: The JIP data type must be Signed DWord
-rw-r--r--src/brw_structs.h2
-rw-r--r--src/main.c12
2 files changed, 11 insertions, 3 deletions
diff --git a/src/brw_structs.h b/src/brw_structs.h
index cd81e78..d93c39f 100644
--- a/src/brw_structs.h
+++ b/src/brw_structs.h
@@ -1319,7 +1319,7 @@ struct brw_instruction
GLint UIP:16;
} branch_2_offset; /* for Gen6, Gen7 2-offsets branch; for Gen7 1-offset branch */
- GLint JIP; /* used by Gen6 CALL instructions */
+ GLint JIP; /* used by Gen6 CALL instructions; Gen7 JMPI */
struct {
GLuint function:4;
diff --git a/src/main.c b/src/main.c
index b897ad4..ba411a5 100644
--- a/src/main.c
+++ b/src/main.c
@@ -430,8 +430,16 @@ int main(int argc, char **argv)
entry->instruction.bits3.JIP = offset; // for CALL, JMPI
else
entry->instruction.bits1.branch.JIP = offset; // for CASE,ELSE,FORK,IF,WHILE
- } else if(gen_level >= 7)
- entry->instruction.bits3.branch_2_offset.JIP = offset;
+ } else if(gen_level >= 7) {
+ int opcode = entry->instruction.header.opcode;
+ /* Gen7 JMPI Restrictions in bspec:
+ * The JIP data type must be Signed DWord
+ */
+ if(opcode == BRW_OPCODE_JMPI)
+ entry->instruction.bits3.JIP = offset;
+ else
+ entry->instruction.bits3.branch_2_offset.JIP = offset;
+ }
}
}