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authorHans Verkuil <hans.verkuil@cisco.com>2017-08-31 13:41:08 +0200
committerAdam Jackson <ajax@redhat.com>2017-09-07 12:13:31 -0400
commit5c98e1965968f387f9b98602e37d45fa79c4d49b (patch)
tree04fda8eaec4b8be5f5560990d4ef932c9dd3b6b4
parent0f3958e1bd00283e793a5762ebdbc4ff9775a545 (diff)
edid-decode: SVDs in the 4:2:0 Data Block have half the pixclk
SVDs in the 4:2:0 Capability Data Block run at half the normal pixelclock. Take that into consideration when updating the max pixelclock. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
-rw-r--r--edid-decode.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/edid-decode.c b/edid-decode.c
index a3f2340..0ae465f 100644
--- a/edid-decode.c
+++ b/edid-decode.c
@@ -1035,7 +1035,7 @@ static struct {
};
static void
-cea_svd(unsigned char *x, int n)
+cea_svd(unsigned char *x, int n, int for_ycbcr420)
{
int i;
@@ -1062,7 +1062,8 @@ cea_svd(unsigned char *x, int n)
max_vert_freq_hz = max(max_vert_freq_hz, edid_cea_modes[vic - 1].refresh);
min_hor_freq_hz = min(min_hor_freq_hz, edid_cea_modes[vic - 1].hor_freq_hz);
max_hor_freq_hz = max(max_hor_freq_hz, edid_cea_modes[vic - 1].hor_freq_hz);
- max_pixclk_khz = max(max_pixclk_khz, edid_cea_modes[vic - 1].pixclk_khz);
+ max_pixclk_khz = max(max_pixclk_khz,
+ edid_cea_modes[vic - 1].pixclk_khz / (for_ycbcr420 ? 2 : 1));
} else {
mode = "Unknown mode";
}
@@ -1078,7 +1079,7 @@ cea_video_block(unsigned char *x)
{
int length = x[0] & 0x1f;
- cea_svd(x + 1, length);
+ cea_svd(x + 1, length, 0);
}
static void
@@ -1086,7 +1087,7 @@ cea_y420vdb(unsigned char *x)
{
int length = x[0] & 0x1f;
- cea_svd(x + 2, length - 1);
+ cea_svd(x + 2, length - 1, 1);
}
static void