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-/*
- * Copyright 2000-2011 Intel Corporation All Rights Reserved
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-// 18 // Total instruction count
-// 1 // Total kernel count
-
-
-
-// Module name: common.inc
-//
-// Common header file for all Video-Processing kernels
-//
-
-.default_execution_size (16)
-.default_register_type :ub
-
-.reg_count_total 128
-.reg_count_payload 7
-
-//========== Common constants ==========
-
-
-//========== Macros ==========
-
-
-//Fast Jump, For more details see "Set_Layer_N.asm"
-
-
-//========== Defines ====================
-
-//========== Static Parameters (Common To All) ==========
-//r1
-
-
-//r2
-
- // e.g. byte0 byte1 byte2
- // YUYV 0 1 3
- // YVYU 0 3 1
-
-//Color Pipe (IECP) parameters
-
-
-//ByteCopy
-
-
-//r4
-
- // e.g. byte0 byte1 byte2
- // YUYV 0 1 3
- // YVYU 0 3 1
-
-
-//========== Inline parameters (Common To All) ===========
-
-
-//============== Binding Index Table===========
-//Common between DNDI and DNUV
-
-
-//================= Common Message Descriptor =====
-// Message descriptor for thread spawning
-// Message Descriptors
-// = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later)
-// 0000,0000,0000
-// 0001(Spawn a root thread),0001 (Root thread spawn thread)
-// = 0x02000011
-// Thread Spawner Message Descriptor
-
-
-// Message descriptor for atomic operation add
-// Message Descriptors
-// = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later)
-// 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add)
-// 0000,0000 (Binding table index, added later)
-// = 0x02000011
-
-// Atomic Operation Add Message Descriptor
-
-
-// Message descriptor for dataport media write
- // Message Descriptors
- // = 000 0001 (min message len 1 - add later) 00000 (resp len 0)
- // 1 (header present 1) 0 1010 (media block write) 000000
- // 00000000 (binding table index - set later)
- // = 0x020A8000
-
-
-// Message Length defines
-
-
-// Response Length defines
-
-
-// Block Width and Height Size defines
-
-
-// Extended Message Descriptors
-
-
-// Common message descriptors:
-
-
-//===================== Math Function Control ===================================
-
-
-//============ Message Registers ===============
- // buf4 starts from r28
-
-#define MSG_AVS_SAMPLE 0x00000000
-#define MSG_CONVOLE_SAMPLE 0x10000000
-#define MSG_MINMAX_SAMPLE 0x20000000
-#define MSG_MINMAXF_SAMPLE 0x30000000
-#define MSG_ERODE_SAMPLE 0x40000000
-#define MSG_DILATE_SAMPLE 0x50000000
-#define MSG_BOOLCENT_SAMPLE 0x60000000
-#define MSG_CENTROID_SAMPLE 0x70000000
-
-#define MSG_IEF_BYPASS 0x08000000
-#define MSG_IEF_ENABLE 0x00000000
-
-//16x4 or 8x4 or 16x8 or 4x4
-#define MSG_AVS_164 0x00000000
-#define MSG_AVS_84 0x02000000
-#define MSG_AVS_168 0x04000000
-#define MSG_AVS_44 0x06000000
-
-//#define mMSGHDR_EOT r43 // Dummy Message Register for EOT
-
-
-.declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub
-.declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw
-.declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud
-.declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f
-
-//=================== End of thread instruction ===========================
-
-
-//=====================Pointers Used=====================================
-
-
-//=======================================================================
-
-
-//r11-r17
-// Define temp space for any usages
-
-
-// Common Buffers
-
-
-// temp space for rotation
-
-.declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-
-.declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-
-.declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-
-.declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-
-.declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-
-
-// End of common.inc
-
-
-
-
-
-
-//Module name: Set_Layer_N.inc
-
-
-
-
-// Description: Includes all definitions explicit to Fast Composite.
-
-
-
-
-// End of common.inc
-
-
-//========== GRF partition ==========
- // r0 header : r0 (1 GRF)
- // Static parameters : r1 - r6 (6 GRFS)
- // Inline parameters : r7 - r8 (2 GRFs)
- // MSGSRC : r27 (1 GRF)
-//===================================
-
-//Interface:
-//========== Static Parameters (Explicit To Fast Composite) ==========
-//r1
-//CSC Set 0
-
-
-.declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud
-
-//Constant alpha
-
-
-//r2
-
-
-// Gen7 AVS WA
-
-
-// WiDi Definitions
-
-
-//Colorfill
-
-
- // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise.
-
-.declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub
-
-//r3
-//Normalised Ratio of Horizontal step size with main video for all layers
-
-
- //Normalised Ratio of Horizontal step size with main video for all layers becomes
- //Normalised Horizontal step size for all layers in VP_Setup.asm
-
-
-//r4
-//Normalised Vertical step size for all layers
-
-
-//r5
-//Normalised Vertical Frame Origin for all layers
-
-
-//r6
-//Normalised Horizontal Frame Origin for all layers
-
-
-//========== Inline Parameters (Explicit To Fast Composite) ==========
-
-
-//Main video Step X
-
-
-//====================== Binding table (Explicit To Fast Composite)=========================================
-
-
-//Used by Interlaced Scaling Kernels
-
-
-//========== Sampler State Table Index (Explicit To Fast Composite)==========
-//Sampler Index for AVS/IEF messages
-
-
-//Sampler Index for SIMD16 sampler messages
-
-
-//=============================================================================
-
-.declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-.declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-.declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-.declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-.declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-.declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f
-
-.declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-.declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-.declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-.declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-.declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-.declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud
-
-.declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-.declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-.declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-.declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-.declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-.declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
-
-.declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-.declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-.declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-.declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-.declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-.declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
-
-.declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-.declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-.declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-.declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-.declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-.declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub
-
-//Pointer to mask reg
-
-
-//r18
-
-
-//Always keep Cannel Pointers and Offsets in same GRF, so that we can use
-// NODDCLR, NODDCHK flags. -rT
-
-
-.declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF
-
-//r19
-
-
-.declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF
-
-
-//r20
-
-.declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF
-
-//r21
-
-.declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF
-
-//r22
-
-
-//Always keep Cannel Pointers and Offsets in same GRF, so that we can use
-// NODDCLR, NODDCHK flags. -rT
-
-
-//Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as
-//sub registers of same GRF to enable using NODDCLR NODDCHK. -rT
-
-//r23
-
-
-//Lumakey
-
-
-//r24
-
-
-//r25
-
-
-//r26
-
-
-//defines to generate LABELS during compile time.
-
-
-//Used to generate LABELS at compile time.
-
-
-//definitions for Expand Mask
-.declare uwMask_Temp1 Base=r17.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF
-.declare ubMask_Temp1 Base=r17.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF
-.declare udMask_Temp1 Base=r17.0 ElementSize=4 Type=ud // 1 GRF
-.declare uwMask_Temp2 Base=r16.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF
-.declare ubMask_Temp2 Base=r16.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF
-.declare udMask_Temp2 Base=r16.0 ElementSize=4 Type=ud // 1 GRF
-
-.declare uwMask_Temp3 Base=r15.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF
-.declare ubMask_Temp3 Base=r15.0 ElementSize=1 SrcRegion=<16;16,1> Type=ub // 1 GRF
-
-.declare udALPHA_MASK_REG Base=r21.0 ElementSize=4 Type=ud // 1 GRF
-.declare udALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=4 Type=ud // 1 GRF
-
-
-//Initialize mask reg to FFFF
-
- mov (16) uwALPHA_MASK_REG(0)<1> 0xFFFF:uw
-
-
-//Fast jump for -
-//LAYER0: we determine whether layer 0 is to be loaded and processed or not based
-// on block mask in module "Set_Layer_0" and store result in f0.1.
-// This flag is then directly used to while loading buf0-3 and colorfill.
-// (So flag f0.1 should not be changed from Set_Layer_0 till Colorfill)
-//
-//LAYER1-7: For all other layers, we compute whether layer is to be loaded and processed
-// based on block mask in module "Set_Layer_1-7" and store result in SKIP_LAYER
-// variable.
-// While Loading buf 4 and 5, we move SKIP_LAYER to f0.0 every time and use it
-// for Loading.
-// For processing though, we move SKIP_LAYER only once to f0.1 in module
-// "Set_Buf0_Buf4" and use f0.1 for deciding whether layer 1-7 (all 4 sub blocks)
-// is to be processed or not.
-// (So flag f0.1) should not be modififed from module "Set_Buf0_Buf4" till module
-// that processess sub-block 3).
-//
-//None of the above fast jumps, apply to CSC modules. We always perform CSC irrespective of mask.
-//
-//Example: (Without going into finer details)
-// Typical Combined kernel:
-//
-// (let var = decision whether to load/process that layer)
-//
-// Set_Layer_0 //f0.1 <- var
-// ..
-// Set_Layer_1 //f0.1 <- var, SKIP_LAYER <- var
-// ..
-// Load buf 0 //use f0.1
-// Load buf 4 //f0.0 <- SKIP_LAYER
-// Load buf 1 //use f0.1
-// Load buf 5 //f0.0 <- SKIP_LAYER
-// Load buf 2 //use f0.1
-// Load buf 3 //use f0.1
-// ..
-// ..
-// Colorfill
-// ..
-// Set_Buf0_Buf4 //f0.1 <- SKIP_LAYER
-// process0-4 //Use f0.1
-// Load buf 4
-// Set_Buf1_Buf5
-// process1-5
-// Load buf 5
-// ..
-// Set_Layer_2 //f0.1 <-var, SKIP_LAYER <- var
-// ..
-// Set_Buf2_Buf4
-// process2-4
-// Load buf 4
-// Set_Buf3_Buf5
-// process3-5
-// Load buf 5
-// ..
-
-
- and (1) r24.2<1>:ub r2.2<0;1,0>:uw 3:uw
-
-
- //Copy all AVS Payload data
- // Setup Message Payload Header for 1st block of Media Sampler 8x8 (16x4 for IVB+)
- //currently the dx & dy is passed by Constant buffer (zero)
- mov (1) r25.0<1>:f r9.6<0;1,0>:f //NLAS dy
- mov (1) r25.6<1>:f r9.5<0;1,0>:f //NLAS dx
- mov (1) r25.4<1>:f r3.0<0;1,0>:f //Step X
- mov (1) r25.5<1>:f r4.0<0;1,0>:f //Step Y
-
-
- mov (1) r25.2<1>:f r6.0<0;1,0>:f //Orig X
- mov (1) r25.3<1>:f r5.0<0;1,0>:f //Orig Y
-
- mov (1) r25.7<1>:ud 0:ud
- add (1) r25.7<1>:ud r25.7<0;1,0>:ud MSG_AVS_SAMPLE + MSG_AVS_164 + MSG_IEF_BYPASS:ud
-
- //NLAS calculations for 2nd half of blocks of Media Sampler 8x8:
- // X(i) = X0 + dx*i + ddx*i*(i-1)/2 ==> X(8) = X0 + dx*8 +ddx*28
- // dx(i)= dx(0) + ddx*i ==> dx(8)= dx + ddx*8
-
- //OPTIMIZATION: fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY - are sub registers of same GRF. Use NODDCLR NODDCHK. -rT
-
- // Calculating X(8)
- mov (1) acc0.2<1>:f r6.0<0;1,0>:f
- mac (1) acc0.2<1>:f r3.0<0;1,0>:f 8.0:f
- mac (1) r23.2<1>:f r9.5<0;1,0>:f 28.0:f { NoDDClr }
-
- // Calculating Y(4)
- mul (1) r23.1<1>:f r4.0<0;1,0>:f 4.0:f { NoDDClr, NoDDChk } //dY*4
-
- // Calculating dx(8)
- mov (1) acc0.4<1>:f r3.0<0;1,0>:f
- mac (1) r23.4<1>:f r9.5<0;1,0>:f 8.0:f { NoDDClr, NoDDChk }
-
- // Binding Index
- mov (1) r23.5<1>:ud 0:ud { NoDDChk }
-
-
-SKIP_LAYER_L0:
- nop
-
-