Merge remote-tracking branch 'origin/master' into xvmc-devxvmc-dev

37 files changed, 2775 insertions, 701 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..2493356
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,24 @@
+.deps
+.libs
+Makefile
+Makefile.in
+*.la
+*.lo
+openchrome.*
+aclocal.m4
+autom4te.cache
+config.guess
+config.h
+config.h.in
+config.log
+config.status
+config.sub
+configure
+depcomp
+install-sh
+libtool
+ltmain.sh
+missing
+stamp-h1
+ChangeLog
+version.h
diff --git a/ChangeLog b/ChangeLog
index e15f61d..04f0642 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,207 @@
+2011-05-10  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Workaround EXA crash with new libcairo2 (#298)
+
+	* src/via_accel.c: (viaExaPrepareComposite):
+
+2011-05-08  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Fix cursor garbage after suspend/resume for Xserver 1.10 (#405)
+
+	* src/via_video.c: (viaRestoreVideo):
+
+2011-05-04  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Fix XAA displaying issues
+
+	* src/via_accel.c: (viaInitXAA):
+
+2011-01-23  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Enable hardware cursor for VX900
+
+	* src/via_cursor.c: (viaHWCursorInit):
+	* src/via_mode.c: (ViaModeSet):
+
+2010-12-16  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Merge vx900_branch - initial VX900 support
+
+	* src/via_accel.c: (viaFlushPCI), (viaDisableVQ),
+	(viaInitialize2DEngine), (viaAccelSync), (viaPitchHelper),
+	(viaInitXAA):
+	* src/via_bandwidth.c: (ViaSetPrimaryFIFO), (ViaSetSecondaryFIFO):
+	* src/via_bios.h:
+	* src/via_crtc.c: (ViaFirstCRTCSetMode), (ViaSecondCRTCSetMode):
+	* src/via_cursor.c: (viaHWCursorInit), (viaCursorStore),
+	(viaCursorRestore), (viaShowCursor), (viaHideCursor),
+	(viaSetCursorPosition), (viaLoadCursorImage), (viaSetCursorColors):
+	* src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit),
+	(VIALeaveVT), (VIASave), (VIARestore), (ViaMMIOEnable),
+	(ViaMMIODisable), (VIAMapFB), (VIAWriteMode), (VIACloseScreen):
+	* src/via_driver.h:
+	* src/via_id.c:
+	* src/via_id.h:
+	* src/via_mode.c: (ViaDFPDetect), (ViaOutputsDetect),
+	(ViaOutputsSelect), (ViaGetMemoryBandwidth), (ViaSetDotclock),
+	(ViaModeSet):
+	* src/via_mode.h:
+	* src/via_panel.c: (ViaPanelScaleDisable), (ViaPanelPreInit),
+	(ViaPanelGetSizeFromDDC):
+	* src/via_video.c: (DecideOverlaySupport):
+	* src/via_xvmc.c: (ViaInitXVMC):
+
+2010-12-15  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Enable the new mode switch and panel support on K8M800 and VM800 chipsets
+
+	* src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit):
+	* src/via_mode.c: (ViaModeSet):
+
+2010-11-10  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+    Replace the deprecated functions 
+    xalloc/xrealloc/xfree/xcalloc with 
+    malloc/realloc/free/calloc.
+    Refer to "/xserver/include/os.h"
+
+	* src/via_accel.c: (viaSetupCBuffer), (viaTearDownCBuffer),
+	(viaInitExa), (viaExitAccel), (viaFinishInitAccel):
+	* src/via_dga.c: (VIASetupDGAMode):
+	* src/via_dri.c: (VIAInitVisualConfigs), (VIADRIScreenInit),
+	(VIADRICloseScreen):
+	* src/via_driver.c: (VIAFreeRec), (VIAProbe), (VIAPreInit),
+	(VIACloseScreen):
+	* src/via_memcpy.c: (viaVidCopyInit):
+	* src/via_swov.c: (Upd_Video):
+	* src/via_vbe.c: (ViaVbeSetMode):
+	* src/via_video.c: (viaExitVideo), (viaStopVideo),
+	(viaDmaBlitImage):
+	* src/via_xvmc.c: (cleanupViaXvMC), (ViaCleanupXVMC),
+	(ViaXvMCCreateContext), (ViaXvMCCreateSurface),
+	(ViaXvMCCreateSubpicture), (ViaXvMCDestroyContext),
+	(ViaXvMCDestroySurface), (ViaXvMCDestroySubpicture),
+	(viaXvMCInitXv):
+
+2010-10-24  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Siragon ML-6200 laptop support
+
+	* src/via_id.c:
+
+2010-06-24  Jon Nettleton  <jon.nettleton@gmail.com>
+
+	PM800 also uses the CME Engine.  Setup the hqv_cme_regs
+	for it.
+
+	* src/via_swov.c: (VIAVidHWDiffInit):
+
+2010-06-09  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Fix freeze on 64bit system for K8M800 chipset
+
+	* src/via_dri.c: (VIADRIAgpInit):
+
+2010-05-04  Jon Nettleton <jon.nettleton@gmail.com>
+
+	Re-enable the Virtual Queue for the VX800/VX855 chipsets.
+
+	* src/via_accel.c: (viaDisableVQ), (viaInitialize2DEngine):
+
+2010-05-04  Jon Nettleton  <jon.nettleton@gmail.com>
+
+	Disable certain hardware clipping options for the VX855.
+	These cause the 2d engine to become unstable when in
+	16-bit mode.
+
+	* src/via_accel.c: (viaInitXAA):
+
+2010-05-04  Jon Nettleton <jon.nettleton@gmail.com>
+
+	Add an undocumented option which allows certain I2C buses
+	to be probed at startup.  This allows workarounds for custom
+	chipset makers that have used the VX855 I2C buses for other
+	purposes.
+
+	* src/via_bios.h:
+	* src/via_driver.c: (VIASetupDefaultOptions), (VIAPreInit):
+	* src/via_driver.h:
+	* src/via_i2c.c:
+
+2010-05-04  Jon Nettleton  <jon.nettleton@gmail.com>
+
+	Improve 2d performance on chipsets that don't have
+	AGP/PCIe support yet.
+
+	* src/via_accel.c: (viaSetupForScreenToScreenCopy),
+	(viaSetupForSolidFill), (viaSetupForMono8x8PatternFill),
+	(viaSetupForColor8x8PatternFill),
+	(viaSetupForCPUToScreenColorExpandFill),
+	(viaSubsequentScanlineCPUToScreenColorExpandFill),
+	(viaSetupForImageWrite), (viaSubsequentImageWriteRect),
+	(viaSetupForSolidLine), (viaSetupForDashedLine), (viaInitXAA):
+
+2010-05-04  Jon Nettleton <jon.nettleton@gmail.com>
+
+	Put timeouts on our while statements.  These codepaths
+	should be interrupted by a hardware state change, but
+	if something goes wrong they loop forevere.  Let's try
+	and behave a little by putting a timeout on these loops.
+
+	* src/via_swov.c: (viaWaitHQVFlip), (viaWaitHQVFlipClear),
+	(viaWaitHQVDone):
+	* src/via_video.c: (Flip):
+
+2010-05-04  Jon Nettleton <jon.nettleton@gmail.com>
+
+	Add XVideo support for the VX855 Chipset.
+	To support this chipset I have added HWDiff->HQVCmeRegs
+	that allows handling differing register values, and
+	HWDiff->dwNewScaleCtl which allows selection of a
+	new Video scaling engine needed for the VX800/VX855
+	chipsets.
+
+	* src/via.h:
+	* src/via_bandwidth.c: (ViaSetSecondaryFIFO):
+	* src/via_driver.h:
+	* src/via_swov.c: (SaveVideoRegister), (VIAVidHWDiffInit),
+	(viaOverlayHQVCalcZoomWidth), (viaOverlayHQVCalcZoomHeight),
+	(ViaSwovSurfaceCreate), (SetHQVFetch), (Upd_Video):
+	* src/via_swov.h:
+
+2010-04-21  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Replace RegionsEqual with REGION_EQUAL and use 
+        the xf86XVFillKeyHelperDrawable instead of xf86XVFillKeyHelper
+
+	* src/via_video.c: (viaReputImage), (viaPutImage):
+
+2010-03-07  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Fix segfaults with EXA and XV (Ticket #359)
+        Tested on K8M890 and VN800
+
+	* src/via_video.c: (viaReputImage), (viaPutImage):
+
+2010-02-10  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Fix bug with suspend and VT switch on VX800 and 64bit systems
+
+	* src/via_driver.h:
+	* src/via_video.c: (viaResetVideo), (viaSaveVideo),
+	(viaRestoreVideo), (viaExitVideo):
+	* src/via_video.h:
+
+2010-01-24  Bartosz Kosiorek  <gang65@poczta.onet.pl>
+
+	Fix starting address restore and save (initial 64-bit support)
+
+	* src/via_crtc.c: (ViaFirstCRTCSetMode),
+	(ViaFirstCRTCSetStartingAddress):
+	* src/via_dri.c: (VIADRIAgpInit):
+	* src/via_driver.c: (VIASave), (VIARestore):
+	* src/via_driver.h:
+
 2009-12-04  Bartosz Kosiorek  <gang65@poczta.onet.pl>
 
 	Enable new mode switch for VM800 chipsets
diff --git a/Makefile.am b/Makefile.am
index a3c5a91..aa9cf4a 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -19,6 +19,11 @@
 #  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 AUTOMAKE_OPTIONS = foreign
-SUBDIRS = src man libxvmc
+SUBDIRS = src man libxvmc tools
 
 EXTRA_DIST = COPYING NEWS README
+
+ChangeLog:
+	$(CHANGELOG_CMD)
+
+dist-hook: ChangeLog
diff --git a/NEWS b/NEWS
index bae9d2f..a54dde5 100644
--- a/NEWS
+++ b/NEWS
@@ -1,3 +1,76 @@
+openchrome 0.2.905 (10/02/2012)
+-------------------------------
+* New features :
+- VX900 support (Xv not supported yet).
+- VX855 XVideo support.
+
+* Bugfixes and enhancements :
+- More debug information to video decoding.
+- Add secondary FIFO support for K8M890 and P4M890.
+- Check the primary FIFO for VX855.
+- Add panel scale support for CLE266 and KM400.
+- Fix bug with malloc.
+- Enabled new mode switch for PM800 chipset.
+- Add option to enable unaccelerated RandR rotation ("SWRandR").
+- Enable new mode switch for VM800 chipsets.
+- More debug traces to via_video.c.
+- Fix manual and add more comments.
+- Fix start address.
+- Optimization of the hardware accelerated cursor and XAA (K8M890 chipset).
+- Code clean up.
+- Fix bug with suspend and VT switch on VX800 chipset and 64bit systems.
+- Synchronize via_drm.h with drm-2.4.17.
+- Fix segfaults with EXA and XV.
+- Fix build on old kernels.
+- Replace RegionsEqual with REGION_EQUAL and use
+  the xf86XVFillKeyHelperDrawable instead of xf86XVFillKeyHelper.
+- Fix DFP parameter description for the ActiveDevice option.
+- Manpage update and some minor changes.
+- Set colorkey for 2nd_monitor.
+- Add timeouts to HQV while loops.
+- Improve 2d performance on chipsets without AGP/PCIe.
+- Add option I2CDevices.
+- Disable Hardware Clipping for the VX855.
+- Re-Enable the VQ for VX800/VX855.
+- Disable AGP and DMA by default for VX800 and VX855.
+- Fixed freeze on 64bit system for K8M800 chipset.
+- Increase bandwidth to handle 1920x1200 resolution with DDR266.
+- Fix XV crash on PM800 post VX855 rework.
+- Fix several typo in code comments.
+- Update VX855 FIFO.
+- Fix bug with TV out flickering.
+- Replace the deprecated functions with new ones.
+  Refer to "/xserver/include/os.h".
+- Replace remaining xalloc to malloc.
+- Change maximum line pitch and virtual height according to chipset.
+- Update 1024x600 modeline.
+- Add workaround for memory autodetection.
+- Enable new mode switch and panel support on K8M800 and VM800.
+- Fix type in VIASave.
+- Use DRICreatePCIBusID when available to create Bus ID string.
+- Restore video interrupt flag.
+- Fix OpenGL application crash on VX900 chipset.
+- Fix VIA VB8001 Mini-ITX Board (P4M900) support.
+- Add workaround for bad memory detection on some P4M800.
+- Fix resolution detection for OLPC 1.5.
+- Fix Xvideo crash on X.Org server 1.10.
+- Fix XAA displaying issues.
+- Fix cursor garbare after suspend/hibernate/resume on VX855/VX900.
+- Workaround EXA crash with new libcairo2.
+- Handle X server 1.12 (videoabi 12).
+- Add support for I420 Xv surface.
+- Limit video RAM size to 256 MB, PCI BAR can't handle more.
+- Add Harald Welte's registers dump tool.
+
+* New boards :
+- ASRock PV530, ECS P4M800PRO-M2 (V2.0) , FIC CE2A1, FIC PTM800Pro LF,
+  Guillemot-Hercules ECafe EC900B, Hewlett Packard DX2020,
+  Hewlett Packard t5550 Thin Client, Lenovo ThinkCenter E51 8714,
+  MSI K8M890M2-V, MSI PM8M-V, MSI PM9M-V, OLPC XO 1.5,
+  Semp Informática Notebook IS 1462, Sharp Mebius PC-CS30H, Siragon ML-6200,
+  Twinhead K15V
+
+
 openchrome 0.2.904 (09/10/2009)
 -------------------------------
 * New features :
diff --git a/README b/README
index c94e303..48ad4e5 100644
--- a/README
+++ b/README
@@ -15,6 +15,7 @@ SUPPORTED CHIPSETS :
 - P4M900/VN896 (VT3364)
 - VX800 (VT3353)
 - VX855 (VT3409)
+- VX900 (VT3410)
 
 
 SUPPORTED FEATURES :
@@ -26,13 +27,6 @@ SUPPORTED FEATURES :
 - Hardware MPEG2 acceleration.
 
 
-IMPORTANT NOTE :
-----------------
-- The driver name is now 'openchrome', and this is what you need to use in
-  your xorg.conf now (instead of 'via'). The XvMC libraries have also been
-  renamed, to 'libchromeXvMC.so' and 'libchromeXvMCPro.so'.
-
-
 KNOWN BUGS/LIMITATIONS :
 ------------------------
 * Laptop panel
@@ -64,6 +58,9 @@ KNOWN BUGS/LIMITATIONS :
 - Chrome9 chipsets' family (P4M900, K8M890, VX800, VX855) currently doesn't
   support neither AGP DMA nor 3D acceleration. 
 
+* VX900
+- Xv is not yet supported.
+
 
 Please note that 3D acceleration is provided by Mesa (http://mesa3d.org) and is
 not directly related to openchrome.
diff --git a/configure.ac b/configure.ac
index c94ab4c..d01fd9f 100644
--- a/configure.ac
+++ b/configure.ac
@@ -22,7 +22,7 @@
 
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-openchrome],
-        0.2.904,
+        0.2.905,
         [http://www.openchrome.org/trac/report/1],
         xf86-video-openchrome)
 
@@ -30,6 +30,12 @@ AC_CONFIG_SRCDIR([Makefile.am])
 AM_CONFIG_HEADER([config.h])
 AC_CONFIG_AUX_DIR(.)
 
+# Require X.Org macros 1.8 or later for MAN_SUBSTS set by XORG_MANPAGE_SECTIONS
+m4_ifndef([XORG_MACROS_VERSION],
+          [m4_fatal([must install xorg-macros 1.8 or later before running autoconf/autogen])])
+XORG_MACROS_VERSION(1.8)
+XORG_DEFAULT_OPTIONS
+
 AM_INIT_AUTOMAKE([dist-bzip2])
 
 AM_MAINTAINER_MODE
@@ -62,6 +68,11 @@ AC_ARG_ENABLE(xv-debug, AC_HELP_STRING([--enable-xv-debug],
               [XV_DEBUG="$enableval"],
               [XV_DEBUG=no])
 
+AC_ARG_ENABLE(viaregtool, AC_HELP_STRING([--enable-viaregtool],
+				    [Enable build of registers dumper tool [[default=no]]]),
+              [TOOLS="$enableval"],
+              [TOOLS=no])
+
 # Checks for extensions
 XORG_DRIVER_CHECK_EXT(RANDR, randrproto)
 XORG_DRIVER_CHECK_EXT(RENDER, renderproto)
@@ -157,6 +168,11 @@ if test "$XV_DEBUG" = yes; then
         AC_DEFINE(XV_DEBUG,1,[Enable XVideo debug support])
 fi
 
+AM_CONDITIONAL(TOOLS, test x$TOOLS = xyes)
+if test "$TOOLS" = yes; then
+        AC_DEFINE(TOOLS,1,[Enable build of registers dumper tool])
+fi
+
 AC_SUBST([DRI_CFLAGS])
 AC_SUBST([XORG_CFLAGS])
 AC_SUBST([moduledir])
@@ -179,4 +195,5 @@ AC_OUTPUT([
 	libxvmc/Makefile
 	man/Makefile
 	src/Makefile
+	tools/Makefile
 ])
diff --git a/src/Makefile.am b/src/Makefile.am
index cdc6505..a5a6c6c 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -24,9 +24,9 @@
 # _ladir passes a dummy rpath to libtool so the thing will actually link
 # TODO: -nostdlib/-Bstatic/-lgcc platform magic, not installing the .a, etc.
 
-BUILT_SOURCES = svnversion.h
-EXTRA_DIST = svnversion.h
-CONFIG_CLEAN_FILES= svnversion.h
+BUILT_SOURCES = version.h
+EXTRA_DIST = version.h
+CONFIG_CLEAN_FILES= version.h
 AM_CFLAGS = @XORG_CFLAGS@ @DRI_CFLAGS@
 openchrome_drv_la_LTLIBRARIES = openchrome_drv.la
 openchrome_drv_la_LDFLAGS = -module -avoid-version
@@ -92,21 +92,26 @@ EXTRA_DIST += \
 endif
 
 
-via_driver.lo: svnversion.h
-svnversion.h: $(openchrome_drv_la_SOURCES)
-	@if [ -d .svn ]; then \
-	echo '#define BUILDCOMMENT "(development build, at svn revision '\
-	"`svnversion -nc .. | sed -e s/^[^:]*://`"')"' > $@.tmp; \
-	else \
-	date +'#define BUILDCOMMENT "(development build, compiled on %c)"' \
-	> $@.tmp; \
-	fi
+via_driver.lo: version.h
+version.h: $(openchrome_drv_la_SOURCES)
+	@if [ -d ../.git ]; then \
+	    echo '#define BUILDCOMMENT "(developement build, at revision '\
+        "`git log -1 --pretty=format:%h | head -1`"')"' > $@.tmp; \
+    else \
+        if [ -d .svn ]; then \
+	        echo '#define BUILDCOMMENT "(development build, at revision '\
+	        "`svnversion -nc .. | sed -e s/^[^:]*://`"')"' > $@.tmp; \
+        else \
+	        date +'#define BUILDCOMMENT "(development build, compiled on %c)"' \
+        	> $@.tmp; \
+	    fi; \
+    fi
 
 	@chmod 666 $@.tmp
 	@mv $@.tmp $@
 	@echo "created $@"
 
 dist-hook:
-	rm svnversion.h;
+	rm version.h;
 	echo '#define BUILDCOMMENT "(openchrome '$(VERSION)' release)"' \
-	> svnversion.h
+	> version.h
diff --git a/src/openchrome.man b/src/openchrome.man
index 16061d0..e20b68e 100644
--- a/src/openchrome.man
+++ b/src/openchrome.man
@@ -1,3 +1,4 @@
+.\" Shorthand for double quote that works everywhere,
 .\" also within other double quotes:
 .ds q \N'34'
 .TH OPENCHROME __drivermansuffix__ __vendorversion__
@@ -21,7 +22,7 @@ The
 .B openchrome
 driver supports the following chipsets: CLE266, KM400/KN400/KM400A/P4M800,
 CN400/PM800/PN800/PM880, K8M800, CN700/VM800/P4M800Pro, CX700, P4M890, K8M890,
-P4M900/VN896/CN896, VX800 and VX855.
+P4M900/VN896/CN896, VX800, VX855 and VX900.
 The driver includes 2D acceleration and Xv video overlay extensions.
 Flat panel, TV, and VGA outputs are supported, depending on the hardware
 configuration.
@@ -58,16 +59,18 @@ are supported:
 .BI "Option \*qAccelMethod\*q  \*q" string \*q
 The driver supports "XAA" and "EXA" acceleration methods.  The default
 method is XAA, since EXA is still experimental.  Contrary to XAA, EXA
-implements acceleration for screen uploads and downlads (if DRI is
+implements acceleration for screen uploads and downloads (if DRI is
 enabled) and for the Render/Composite extension.
 .TP
 .BI "Option \*qActiveDevice\*q  \*q" string \*q
 Specifies the active device combination.  Any string containing "CRT",
 "LCD", "DFP", "TV" should be possible. "CRT" represents anything that
-is connected to the VGA port, "LCD" and "DFP" are for laptop panels
-(not TFT screens attached to the VGA port), "TV" is self-explanatory.
+is connected to the VGA port, "LCD" is for laptop panels (not TFT screens
+attached to the VGA port), "DFP" is for screens connected to the DVI port,
+"TV" is self-explanatory.
 The default is to use what is detected.  The driver is currently unable
-to use LCD and TV simultaneously, and will favour the LCD.
+to use LCD and TV simultaneously, and will favour the LCD.  The DVI port is
+not properly probed and needs to be enabled with this option.
 .TP
 .BI "Option \*qAGPMem\*q  \*q" integer \*q
 Sets the amount of AGP memory that is allocated at X server startup.
@@ -80,7 +83,7 @@ EXA scratch area in AGP space, it will be allocated from VRAM.  If there is
 no room for DRI textures, they will be allocated from the DRI part of
 VRAM (see the option "MaxDRIMem").  The default amount of AGP is
 32768 kB.  Note that the AGP aperture set in the BIOS must be able
-to accomodate the amount of AGP memory specified here.  Otherwise no
+to accommodate the amount of AGP memory specified here.  Otherwise no
 AGP memory will be available.  It is safe to set a very large AGP
 aperture in the BIOS.
 .TP
@@ -130,10 +133,10 @@ as possible to the EXA pixmap storage area.
 .TP
 .BI "Option \*qMigrationHeuristic\*q  \*q" string \*q
 Sets the heuristic for EXA pixmap migration.  This is an EXA core
-option, and on Xorg server versions after 1.1.0 this defaults to
-"smart".  The openchrome driver performs best with "greedy", so you
+option, and starting from __xservername__ server version 1.3.0 this defaults to
+"always".  The openchrome driver performs best with "greedy", so you
 should really add this option to your configuration file.  The third
-possibility is "always", which might become more useful in the future.
+possibility is "smart".
 .TP
 .BI "Option \*qNoAccel\*q  \*q" boolean \*q
 Disables the use of hardware acceleration.  Acceleration is enabled
@@ -240,6 +243,6 @@ overscan).  These modes are made available by the driver; modelines
 provided in __xconfigfile__ will be ignored.
 
 .SH "SEE ALSO"
-__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__)
+__xservername__(__appmansuffix__), __xconfigfile__(__filemansuffix__), Xserver(__appmansuffix__), X(__miscmansuffix__), EXA(__filemansuffix__), Xv(__filemansuffix__)
 .SH AUTHORS
 Authors include: ...
diff --git a/src/via.h b/src/via.h
index c961e1a..8421b30 100644
--- a/src/via.h
+++ b/src/via.h
@@ -34,7 +34,7 @@
 
 /* Video Engines */
 #define VIDEO_ENGINE_UNK	0 /* Unknown video engine */
-#define VIDEO_ENGINE_CLE	1 /* CLE First generaion video engine */
+#define VIDEO_ENGINE_CLE	1 /* CLE First generation video engine */
 #define VIDEO_ENGINE_CME	2 /* CME Second generation video engine */
 
 /* Video status flag */
@@ -215,6 +215,9 @@
 #define HQV_DST_STRIDE          0x1F4
 #define HQV_SRC_STRIDE          0x1F8
 
+#define HQV_H_SCALE_CONTROL     0x1B0
+#define HQV_V_SCALE_CONTROL     0x1B4
+
 #define PRO_HQV1_OFFSET         0x1000
 /*
  *  Video command definition
@@ -257,7 +260,7 @@
 #define V1_EXPIRE_NUM_A         0x000a0000
 #define V1_EXPIRE_NUM_F         0x000f0000 /* jason */
 #define V1_FIFO_EXTENDED        0x00200000
-#define V1_ON_CRT               0x00000000
+#define V1_ON_PRI               0x00000000
 #define V1_ON_SND_DISPLAY       0x80000000
 #define V1_FIFO_32V1_32V2       0x00000000
 #define V1_FIFO_48V1_32V2       0x00200000
@@ -515,6 +518,22 @@
 #define HQV_FIFO_STATUS     0x00001000  
 #define HQV_GEN_IRQ         0x00000080
 #define HQV_FIFO_DEPTH_1    0x00010000
+/* for CME engine */
+#define HQV_SW_FLIP_QUEUE_ENABLE    0x00100000
+
+/* for hwDiff->dwNewScaleCtl */
+#define HQV_H_SCALE_ENABLE                 0x80000000
+#define HQV_H_SCALE_UP                     0x00000000  
+#define HQV_H_SCALE_DOWN_FOURTH_TO_1       0x10000000 
+#define HQV_H_SCALE_DOWN_FOURTH_TO_EIGHTH  0x20000000 
+#define HQV_H_SCALE_DOWN_UNDER_EIGHTH      0x30000000 
+
+#define HQV_V_SCALE_ENABLE 0x80000000
+#define HQV_V_SCALE_UP     0x00000000
+#define HQV_V_SCALE_DOWN   0x10000000
+
+/* HQV Default Vodeo Color 0x3B8 */
+#define HQV_FIX_COLOR           0x0643212c
 
 /* HQV_FILTER_CONTROL      0x3E4 */
 #define HQV_H_LOWPASS_2TAP  0x00000001
@@ -575,6 +594,26 @@
 #define HQV_VDEBLOCK_FILTER 0x80000000
 #define HQV_HDEBLOCK_FILTER 0x00008000
 
+/* new added registers for VT3409.For some registers have different meanings 
+ * but the same address,we add postfix _409 to distinguish */
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL1      0x160
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL2      0x164
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL3      0x168
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL4      0x16C
+#define HQV_SRC_DATA_OFFSET_CTRL1_409       0x170 
+#define HQV_SRC_DATA_OFFSET_CTRL2_409       0x174  
+#define HQV_SRC_DATA_OFFSET_CTRL3_409       0x178  
+#define HQV_SRC_DATA_OFFSET_CTRL4_409       0x17C  
+#define HQV_DST_DATA_OFFSET_CTRL1           0x180
+#define HQV_DST_DATA_OFFSET_CTRL2           0x184  
+#define HQV_DST_DATA_OFFSET_CTRL3           0x188  
+#define HQV_DST_DATA_OFFSET_CTRL4           0x18C
+#define HQV_SHARPNESS_DECODER_HANDSHAKE_CTRL_410 0x1A4 
+#define HQV_RESIDUE_PIXEL_FRAME_STARTADDR   0x1BC
+#define HQV_BACKGROUND_DATA_OFFSET          0x1CC
+#define HQV_SUBP_HSCALE_CTRL                0x1E0
+#define HQV_SUBP_VSCALE_CTRL                0x1E8
+
 /* Add new HQV Registers for VT3353: */
 #define HQV_SRC_DATA_OFFSET_CONTROL1        0x180
 #define HQV_SRC_DATA_OFFSET_CONTROL2        0x184
@@ -588,6 +627,7 @@
 #define HQV_COLOR_ADJUSTMENT_CONTROL2       0x1A4
 #define HQV_COLOR_ADJUSTMENT_CONTROL3       0x1A8
 #define HQV_COLOR_ADJUSTMENT_CONTROL5       0x1AC
+#define HQV_DEFAULT_VIDEO_COLOR             0x1B8
 
 #define CHROMA_KEY_LOW          0x00FFFFFF
 #define CHROMA_KEY_HIGH         0x00FFFFFF
diff --git a/src/via_accel.c b/src/via_accel.c
index 6750283..2cd77b3 100644
--- a/src/via_accel.c
+++ b/src/via_accel.c
@@ -193,27 +193,28 @@ viaFlushPCI(ViaCommandBuffer * buf)
                      * for an unacceptable amount of time in VIASETREG while
                      * other high priority interrupts may be pending.
                      */
-		  switch (pVia->Chipset) {
-		  case VIA_VX800:
-		  case VIA_VX855:
-		    while ((VIAGETREG(VIA_REG_STATUS) &
-			    (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5))
-			   && (loop++ < MAXLOOP)) ;
-		    break;
-		  case VIA_K8M890:
-		  case VIA_P4M890:
-		  case VIA_P4M900:
-		    while ((VIAGETREG(VIA_REG_STATUS) &
-			    (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY))
-			   && (loop++ < MAXLOOP)) ;
-		    break;
-		  default:
-		    while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY)
-			   && (loop++ < MAXLOOP)) ;
-		    while ((VIAGETREG(VIA_REG_STATUS) &
-			    (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY))
-			   && (loop++ < MAXLOOP)) ;
-		  }
+					switch (pVia->Chipset) {
+					    case VIA_VX800:
+					    case VIA_VX855:
+					    case VIA_VX900:
+							while ((VIAGETREG(VIA_REG_STATUS) &
+							       (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5))
+									&& (loop++ < MAXLOOP)) ;
+					    break;
+					    case VIA_K8M890:
+					    case VIA_P4M890:
+					    case VIA_P4M900:
+                    		while ((VIAGETREG(VIA_REG_STATUS) &
+                            	   (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY))
+                            		&& (loop++ < MAXLOOP)) ;
+					    break;
+						default:
+                        	while (!(VIAGETREG(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY)
+                                   && (loop++ < MAXLOOP)) ;
+                    		while ((VIAGETREG(VIA_REG_STATUS) &
+                            	   (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY))
+                                   && (loop++ < MAXLOOP)) ;
+                    }
                 }
                 offset = (*bp++ & 0x0FFFFFFF) << 2;
                 value = *bp++;
@@ -287,7 +288,7 @@ viaSetupCBuffer(ScrnInfoPtr pScrn, ViaCommandBuffer * buf, unsigned size)
 
     buf->pScrn = pScrn;
     buf->bufSize = ((size == 0) ? VIA_DMASIZE : size) >> 2;
-    buf->buf = (CARD32 *) xcalloc(buf->bufSize, sizeof(CARD32));
+    buf->buf = (CARD32 *) calloc(buf->bufSize, sizeof(CARD32));
     if (!buf->buf)
         return BadAlloc;
     buf->waitFlags = 0;
@@ -312,7 +313,7 @@ void
 viaTearDownCBuffer(ViaCommandBuffer * buf)
 {
     if (buf && buf->buf)
-        xfree(buf->buf);
+        free(buf->buf);
     buf->buf = NULL;
 }
 
@@ -417,6 +418,9 @@ viaDisableVQ(ScrnInfoPtr pScrn)
     switch (pVia->Chipset) {
         case VIA_K8M890:
         case VIA_P4M900:
+        case VIA_VX800:
+        case VIA_VX855:
+        case VIA_VX900:
             VIASETREG(0x41c, 0x00100000);
             VIASETREG(0x420, 0x74301000);
             break;
@@ -472,16 +476,25 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
         VIASETREG(i, 0x0);
     }
 
-    if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
-        for (i = 0x44; i < 0x5c; i += 4) {
+    if (pVia->Chipset == VIA_VX800 || 
+        pVia->Chipset == VIA_VX855 ||
+        pVia->Chipset == VIA_VX900) {
+        for (i = 0x44; i <= 0x5c; i += 4) {
             VIASETREG(i, 0x0);
         }
     }
 
+    if (pVia->Chipset == VIA_VX900)
+    {
+        /*410 redefine 0x30 34 38*/
+        VIASETREG(0x60, 0x0); /*already useable here*/
+    }
+
     /* Make the VIA_REG() macro magic work */
     switch (pVia->Chipset) {
     case VIA_VX800:
     case VIA_VX855:
+    case VIA_VX900:
         pVia->TwodRegs = via_2d_regs_m1;
         break;
     default:
@@ -492,6 +505,9 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
     switch (pVia->Chipset) {
         case VIA_K8M890:
         case VIA_P4M900:
+        case VIA_VX800:
+        case VIA_VX855:
+        case VIA_VX900:
             viaInitPCIe(pVia);
             break;
         default:
@@ -503,6 +519,9 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
         switch (pVia->Chipset) {
             case VIA_K8M890:
             case VIA_P4M900:
+            case VIA_VX800:
+            case VIA_VX855:
+            case VIA_VX900:
                 viaEnablePCIeVQ(pVia);
                 break;
             default:
@@ -530,6 +549,7 @@ viaAccelSync(ScrnInfoPtr pScrn)
     switch (pVia->Chipset) {
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             while ((VIAGETREG(VIA_REG_STATUS) &
                     (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5))
                    && (loop++ < MAXLOOP)) ;
@@ -582,7 +602,7 @@ viaDisableClipping(ScrnInfoPtr pScrn)
 
 /*
  * This is a small helper to wrap around a PITCH register write
- * to deal with the sublte differences of M1 and old 2D engine
+ * to deal with the subtle differences of M1 and old 2D engine
  */
 static void
 viaPitchHelper(VIAPtr pVia, unsigned dstPitch, unsigned srcPitch)
@@ -590,7 +610,9 @@ viaPitchHelper(VIAPtr pVia, unsigned dstPitch, unsigned srcPitch)
     unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3);
     RING_VARS;
 
-    if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) {
+    if (pVia->Chipset != VIA_VX800 &&
+        pVia->Chipset != VIA_VX855 && 
+        pVia->Chipset != VIA_VX900) {
         val |= VIA_PITCH_ENABLE;
     }
     OUT_RING_H1(VIA_REG(pVia, PITCH), val);
@@ -759,6 +781,7 @@ viaSetupForScreenToScreenCopy(ScrnInfoPtr pScrn, int xdir, int ydir, int rop,
     tdc->cmd = cmd;
     viaAccelTransparentHelper(pVia, (trans_color != -1) ? 0x4000 : 0x0000,
                               trans_color, FALSE);
+    ADVANCE_RING;
 }
 
 static void
@@ -796,6 +819,7 @@ viaSetupForSolidFill(ScrnInfoPtr pScrn, int color, int rop, unsigned planemask)
     tdc->cmd = VIA_GEC_BLT | VIA_GEC_FIXCOLOR_PAT | VIAACCELPATTERNROP(rop);
     tdc->fgColor = color;
     viaAccelTransparentHelper(pVia, 0x00, 0x00, FALSE);
+    ADVANCE_RING;
 }
 
 static void
@@ -852,6 +876,7 @@ viaSetupForMono8x8PatternFill(ScrnInfoPtr pScrn, int pattern0, int pattern1,
     tdc->pattern0 = pattern0;
     tdc->pattern1 = pattern1;
     viaAccelTransparentHelper(pVia, 0x00, 0x00, FALSE);
+    ADVANCE_RING;
 }
 
 static void
@@ -901,6 +926,7 @@ viaSetupForColor8x8PatternFill(ScrnInfoPtr pScrn, int patternx, int patterny,
     tdc->patternAddr = (patternx * pVia->Bpp + patterny * pVia->Bpl);
     viaAccelTransparentHelper(pVia, (trans_color != -1) ? 0x4000 : 0x0000,
                               trans_color, FALSE);
+    ADVANCE_RING;
 }
 
 static void
@@ -962,9 +988,9 @@ viaSetupForCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int fg, int bg,
     tdc->fgColor = fg;
     tdc->bgColor = bg;
 
-    ADVANCE_RING;
-
     viaAccelTransparentHelper(pVia, 0x0, 0x0, FALSE);
+
+    ADVANCE_RING;
 }
 
 static void
@@ -991,7 +1017,7 @@ viaSubsequentScanlineCPUToScreenColorExpandFill(ScrnInfoPtr pScrn, int x,
                        pScrn->fbOffset + sub * pVia->Bpl, tdc->mode,
                        pVia->Bpl, pVia->Bpl, tdc->cmd);
 
-    viaFlushPCI(cb);
+    ADVANCE_RING;
     viaDisableClipping(pScrn);
 }
 
@@ -1005,9 +1031,9 @@ viaSetupForImageWrite(ScrnInfoPtr pScrn, int rop, unsigned planemask,
     RING_VARS;
 
     tdc->cmd = VIA_GEC_BLT | VIA_GEC_SRC_SYS | VIAACCELCOPYROP(rop);
-    ADVANCE_RING;
     viaAccelTransparentHelper(pVia, (trans_color != -1) ? 0x4000 : 0x0000,
                               trans_color, FALSE);
+    ADVANCE_RING;
 }
 
 static void
@@ -1030,7 +1056,7 @@ viaSubsequentImageWriteRect(ScrnInfoPtr pScrn, int x, int y, int w, int h,
                        pScrn->fbOffset + pVia->Bpl * sub, tdc->mode,
                        pVia->Bpl, pVia->Bpl, tdc->cmd);
 
-    viaFlushPCI(cb);
+    ADVANCE_RING;
     viaDisableClipping(pScrn);
 }
 
@@ -1052,6 +1078,7 @@ viaSetupForSolidLine(ScrnInfoPtr pScrn, int color, int rop,
     OUT_RING_H1(VIA_REG(pVia, GEMODE), tdc->mode);
     OUT_RING_H1(VIA_REG(pVia, MONOPAT0), 0xFF);
     OUT_RING_H1(VIA_REG(pVia, MONOPATFGC), tdc->fgColor);
+    ADVANCE_RING;
 }
 
 static void
@@ -1189,6 +1216,7 @@ viaSetupForDashedLine(ScrnInfoPtr pScrn, int fg, int bg, int rop,
     OUT_RING_H1(VIA_REG(pVia, MONOPATFGC), tdc->fgColor);
     OUT_RING_H1(VIA_REG(pVia, MONOPATBGC), tdc->bgColor);
     OUT_RING_H1(VIA_REG(pVia, MONOPAT0), tdc->pattern0);
+    ADVANCE_RING;
 }
 
 static void
@@ -1210,7 +1238,8 @@ viaInitXAA(ScreenPtr pScreen)
 
     /* General acceleration flags. */
     xaaptr->Flags = (PIXMAP_CACHE |
-                     OFFSCREEN_PIXMAPS | LINEAR_FRAMEBUFFER |
+                     OFFSCREEN_PIXMAPS | 
+                     LINEAR_FRAMEBUFFER |
                      MICROSOFT_ZERO_LINE_BIAS | 0);
 
     if (pScrn->bitsPerPixel == 8)
@@ -1218,24 +1247,31 @@ viaInitXAA(ScreenPtr pScreen)
 
     xaaptr->SetClippingRectangle = viaSetClippingRectangle;
     xaaptr->DisableClipping = viaDisableClipping;
-    xaaptr->ClippingFlags = (HARDWARE_CLIP_SOLID_FILL |
-                             HARDWARE_CLIP_SOLID_LINE |
-                             HARDWARE_CLIP_DASHED_LINE |
-                             HARDWARE_CLIP_SCREEN_TO_SCREEN_COPY |
+    xaaptr->ClippingFlags = (HARDWARE_CLIP_SCREEN_TO_SCREEN_COPY |
                              HARDWARE_CLIP_MONO_8x8_FILL |
                              HARDWARE_CLIP_COLOR_8x8_FILL |
                              HARDWARE_CLIP_SCREEN_TO_SCREEN_COLOR_EXPAND | 0);
 
+    if (pVia->Chipset != VIA_VX800 &&
+        pVia->Chipset != VIA_VX855 && 
+        pVia->Chipset != VIA_VX900)
+    	xaaptr->ClippingFlags |= (HARDWARE_CLIP_SOLID_FILL |
+                                  HARDWARE_CLIP_SOLID_LINE |
+                                  HARDWARE_CLIP_DASHED_LINE);
+
     xaaptr->Sync = viaAccelSync;
 
+    /* ScreenToScreen copies */
     xaaptr->SetupForScreenToScreenCopy = viaSetupForScreenToScreenCopy;
     xaaptr->SubsequentScreenToScreenCopy = viaSubsequentScreenToScreenCopy;
     xaaptr->ScreenToScreenCopyFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
 
+    /* Solid filled rectangles */
     xaaptr->SetupForSolidFill = viaSetupForSolidFill;
     xaaptr->SubsequentSolidFillRect = viaSubsequentSolidFillRect;
     xaaptr->SolidFillFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
 
+    /* Mono 8x8 pattern fills */
     xaaptr->SetupForMono8x8PatternFill = viaSetupForMono8x8PatternFill;
     xaaptr->SubsequentMono8x8PatternFillRect =
             viaSubsequentMono8x8PatternFillRect;
@@ -1244,6 +1280,7 @@ viaInitXAA(ScreenPtr pScreen)
                                        HARDWARE_PATTERN_PROGRAMMED_ORIGIN |
                                        BIT_ORDER_IN_BYTE_MSBFIRST | 0);
 
+    /* Color 8x8 pattern fills */
     xaaptr->SetupForColor8x8PatternFill = viaSetupForColor8x8PatternFill;
     xaaptr->SubsequentColor8x8PatternFillRect =
             viaSubsequentColor8x8PatternFillRect;
@@ -1252,12 +1289,14 @@ viaInitXAA(ScreenPtr pScreen)
                                         HARDWARE_PATTERN_PROGRAMMED_BITS |
                                         HARDWARE_PATTERN_PROGRAMMED_ORIGIN | 0);
 
+    /* Solid lines */
     xaaptr->SetupForSolidLine = viaSetupForSolidLine;
     xaaptr->SubsequentSolidTwoPointLine = viaSubsequentSolidTwoPointLine;
     xaaptr->SubsequentSolidHorVertLine = viaSubsequentSolidHorVertLine;
     xaaptr->SolidBresenhamLineErrorTermBits = 14;
     xaaptr->SolidLineFlags = NO_PLANEMASK | ROP_NEEDS_SOURCE;
 
+    /* Dashed line */
     xaaptr->SetupForDashedLine = viaSetupForDashedLine;
     xaaptr->SubsequentDashedTwoPointLine = viaSubsequentDashedTwoPointLine;
     xaaptr->DashPatternMaxLength = 8;
@@ -1266,49 +1305,50 @@ viaInitXAA(ScreenPtr pScreen)
                                LINE_PATTERN_POWER_OF_2_ONLY |
                                LINE_PATTERN_MSBFIRST_LSBJUSTIFIED | 0);
 
+    /* CPU to Screen color expansion */
     xaaptr->ScanlineCPUToScreenColorExpandFillFlags = NO_PLANEMASK |
-            CPU_TRANSFER_PAD_DWORD |
-            SCANLINE_PAD_DWORD |
-            BIT_ORDER_IN_BYTE_MSBFIRST |
-            LEFT_EDGE_CLIPPING | ROP_NEEDS_SOURCE | 0;
+           				 	CPU_TRANSFER_PAD_DWORD |
+						SCANLINE_PAD_DWORD |
+            					BIT_ORDER_IN_BYTE_MSBFIRST |
+            					LEFT_EDGE_CLIPPING | 
+            					ROP_NEEDS_SOURCE | 0;
 
     xaaptr->SetupForScanlineCPUToScreenColorExpandFill =
             viaSetupForCPUToScreenColorExpandFill;
     xaaptr->SubsequentScanlineCPUToScreenColorExpandFill =
             viaSubsequentScanlineCPUToScreenColorExpandFill;
     xaaptr->ColorExpandBase = pVia->BltBase;
-    xaaptr->ColorExpandRange = VIA_MMIO_BLTSIZE;
+    if (pVia->Chipset == VIA_VX800 ||
+        pVia->Chipset == VIA_VX855 ||
+        pVia->Chipset == VIA_VX900)
+        xaaptr->ColorExpandRange = VIA_MMIO_BLTSIZE;
+    else
+        xaaptr->ColorExpandRange = (64 * 1024);
 
+    /* ImageWrite */
     xaaptr->ImageWriteFlags = (NO_PLANEMASK |
                                CPU_TRANSFER_PAD_DWORD |
                                SCANLINE_PAD_DWORD |
                                BIT_ORDER_IN_BYTE_MSBFIRST |
-                               LEFT_EDGE_CLIPPING | ROP_NEEDS_SOURCE | 0);
-                               // SYNC_AFTER_IMAGE_WRITE | 0);
+                               LEFT_EDGE_CLIPPING | 
+			       ROP_NEEDS_SOURCE |
+                               NO_GXCOPY | 0);
 
     /*
      * Most Unichromes are much faster using processor-to-framebuffer writes
      * than when using the 2D engine for this.
-     * test with x11perf -shmput500!
+     * test with "x11perf -shmput500"
+     * Example: K8M890 chipset; with GPU=86.3/sec; without GPU=132.0/sec
+     * TODO Check speed for other chipsets
      */
 
-    switch (pVia->Chipset) {
-        case VIA_K8M800:
-        case VIA_K8M890:
-        case VIA_P4M900:
-        case VIA_VX800:
-        case VIA_VX855:
-            break;
-        default:
-            xaaptr->ImageWriteFlags |= NO_GXCOPY;
-            break;
-    }
-
     xaaptr->SetupForImageWrite = viaSetupForImageWrite;
     xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect;
     xaaptr->ImageWriteBase = pVia->BltBase;
 
-    if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855)
+    if (pVia->Chipset == VIA_VX800 ||
+        pVia->Chipset == VIA_VX855 ||
+        pVia->Chipset == VIA_VX900)
         xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE;
     else
         xaaptr->ImageWriteRange = (64 * 1024);
@@ -2162,6 +2202,13 @@ viaExaPrepareComposite(int op, PicturePtr pSrcPicture,
     Bool isAGP;
     unsigned long offset;
 
+    /* Workaround: EXA crash with new libcairo2 on a VIA VX800 (#298) */
+    /* TODO Add real source only pictures */
+    if (!pSrc) { 
+ 	    ErrorF("pSrc is NULL\n"); 
+ 	    return FALSE; 
+ 	} 
+
     v3d->setDestination(v3d, exaGetPixmapOffset(pDst),
                         exaGetPixmapPitch(pDst), pDstPicture->format);
     v3d->setCompositeOperator(v3d, op);
@@ -2344,7 +2391,7 @@ viaInitExa(ScreenPtr pScreen)
     }
 
     if (!exaDriverInit(pScreen, pExa)) {
-        xfree(pExa);
+        free(pExa);
         return NULL;
     }
 
@@ -2354,7 +2401,7 @@ viaInitExa(ScreenPtr pScreen)
 
 
 /*
- * Acceleration initializatuon function. Sets up offscreen memory disposition,
+ * Acceleration initialization function. Sets up offscreen memory disposition,
  * and initializes engines and acceleration method.
  */
 Bool
@@ -2542,7 +2589,7 @@ viaExitAccel(ScreenPtr pScreen)
             }
         }
         if (pVia->dBounce)
-            xfree(pVia->dBounce);
+            free(pVia->dBounce);
 #endif /* XF86DRI */
         if (pVia->scratchAddr) {
             exaOffscreenFree(pScreen, pVia->scratchFBBuffer);
@@ -2551,7 +2598,7 @@ viaExitAccel(ScreenPtr pScreen)
         if (pVia->exaDriverPtr) {
             exaDriverFini(pScreen);
         }
-        xfree(pVia->exaDriverPtr);
+        free(pVia->exaDriverPtr);
         pVia->exaDriverPtr = NULL;
         return;
     }
@@ -2577,7 +2624,7 @@ viaFinishInitAccel(ScreenPtr pScreen)
 
     if (pVia->directRenderingEnabled && pVia->useEXA) {
 
-        pVia->dBounce = xcalloc(VIA_DMA_DL_SIZE * 2, 1);
+        pVia->dBounce = calloc(VIA_DMA_DL_SIZE * 2, 1);
 
         if (!pVia->IsPCI) {
 
diff --git a/src/via_bandwidth.c b/src/via_bandwidth.c
index 842bc2c..2b413b8 100644
--- a/src/via_bandwidth.c
+++ b/src/via_bandwidth.c
@@ -257,9 +257,18 @@ ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
             break;
         case VIA_VX855:
             hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199  = 0xC7 */
-            /* TODO Formula for SR16 is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
-            hwp->writeSeq(hwp, 0x16, 0x50); /* 320/4   = 80   = 0x50 */
-            hwp->writeSeq(hwp, 0x18, 0x50); /* 320/4   = 80   = 0x50 */
+            /* Formula for {SR16,0,5},{SR16,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
+            hwp->writeSeq(hwp, 0x16, 0x90); /* 320/4   = 80   = 0x50 */
+            /* Formula for {SR18,0,5},{SR18,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
+            hwp->writeSeq(hwp, 0x18, 0x90); /* 320/4   = 80   = 0x50 */
+            hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4   = 40   = 0x28 */
+            break;
+        case VIA_VX900:
+            hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199  = 0xC7 */
+            /* Formula for {SR16,0,5},{SR16,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
+            hwp->writeSeq(hwp, 0x16, 0x90); /* 320/4   = 80   = 0x50 */
+            /* Formula for {SR18,0,5},{SR18,7,7} is: (0x50 & 0x3F) | ((0x50 & 0x40) << 1) = 0x90 */
+            hwp->writeSeq(hwp, 0x18, 0x90); /* 320/4   = 80   = 0x50 */
             hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4   = 40   = 0x28 */
             break;
         default:
@@ -446,8 +455,8 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
             break;
         case VIA_VX800:
             /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 96/8-1 = 0x0B */
-            ViaCrtcMask(hwp, 0x68, 0xA0, 0xF0); 
-            ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
+            ViaCrtcMask(hwp, 0x68, 0xB0, 0xF0); /* ((0x0B & 0x0F) << 4)) = 0xB0 */
+            ViaCrtcMask(hwp, 0x94, 0x00, 0x80); /* ((0x0B & 0x10) << 3)) = 0x00 */
             ViaCrtcMask(hwp, 0x95, 0x00, 0x80);
             /* {CR68,0,3},{CR95,4,6} : 64/4 = 0x10 */
             ViaCrtcMask(hwp, 0x68, 0x04, 0x0F);
@@ -462,6 +471,38 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
                 ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
             break;
         case VIA_VX855:
+            /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 200/8-1 = 24 = 0x18 */
+            ViaCrtcMask(hwp, 0x68, 0x80, 0xF0); /* ((0x18 & 0x0F) << 4)) = 0x80 */
+            ViaCrtcMask(hwp, 0x94, 0x80, 0x80); /* ((0x18 & 0x10) << 3)) = 0x80 */
+            ViaCrtcMask(hwp, 0x95, 0x00, 0x80); /* ((0x18 & 0x20) << 2)) = 0x00 */
+            /* {CR68,0,3},{CR95,4,6} : 160/4 = 0x28 */
+            ViaCrtcMask(hwp, 0x68, 0x08, 0x0F); /* (0x28 & 0x0F) = 0x08 */
+            ViaCrtcMask(hwp, 0x95, 0x20, 0x70); /* (0x28 & 0x70) = 0x20 */
+            /* {CR92,0,3},{CR95,0,2} : 160/4 = 0x28 */
+            ViaCrtcMask(hwp, 0x92, 0x08, 0x08); /* (0x28 & 0x0F) = 0x08 */
+            ViaCrtcMask(hwp, 0x95, 0x02, 0x07); /* ((0x28 & 0x70) >> 4)) = 0x02 */
+            /* {CR94,0,6} : 320/4 = 0x50 */
+            if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
+                ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
+            else
+                ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
+            break;
+        case VIA_VX900:
+            /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 192/8-1 = 23 = 0x17 */
+            ViaCrtcMask(hwp, 0x68, 0x70, 0xF0); /* ((0x17 & 0x0F) << 4)) = 0x70 */
+            ViaCrtcMask(hwp, 0x94, 0x80, 0x80); /* ((0x17 & 0x10) << 3)) = 0x80 */
+            ViaCrtcMask(hwp, 0x95, 0x00, 0x80); /* ((0x17 & 0x20) << 2)) = 0x00 */
+            /* {CR68,0,3},{CR95,4,6} : 160/4 = 0x28 */
+            ViaCrtcMask(hwp, 0x68, 0x08, 0x0F); /* (0x28 & 0x0F) = 0x08 */
+            ViaCrtcMask(hwp, 0x95, 0x20, 0x70); /* (0x28 & 0x70) = 0x20 */
+            /* {CR92,0,3},{CR95,0,2} : 160/4 = 0x28 */
+            ViaCrtcMask(hwp, 0x92, 0x08, 0x08); /* (0x28 & 0x0F) = 0x08 */
+            ViaCrtcMask(hwp, 0x95, 0x02, 0x07); /* ((0x28 & 0x70) >> 4)) = 0x2 */
+            /* {CR94,0,6} : 320/4 = 0x50 */
+            if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
+                ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
+            else
+                ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
             break;
         default:
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: "
diff --git a/src/via_bios.h b/src/via_bios.h
index 06809b9..6d945f7 100644
--- a/src/via_bios.h
+++ b/src/via_bios.h
@@ -82,6 +82,11 @@
 #define	    VIA_DEVICE_TV		    0x04
 #define	    VIA_DEVICE_DFP		    0x08
 
+#define     VIA_I2C_NONE                    0x00
+#define     VIA_I2C_BUS1                    0x01
+#define     VIA_I2C_BUS2                    0x02
+#define     VIA_I2C_BUS3                    0x04
+
 /* System Memory CLK */
 #define VIA_MEM_SDR66   0x00
 #define VIA_MEM_SDR100  0x01
@@ -92,7 +97,9 @@
 #define VIA_MEM_DDR400  0x06
 #define VIA_MEM_DDR533  0x07
 #define VIA_MEM_DDR667  0x08
-#define VIA_MEM_END     0x09
+#define VIA_MEM_DDR800  0x09
+#define VIA_MEM_DDR1066 0x0A
+#define VIA_MEM_END     0x0B
 #define VIA_MEM_NONE    0xFF
 
 /* Digital Output Bus Width */
diff --git a/src/via_crtc.c b/src/via_crtc.c
index 4e2be97..df5ffd7 100644
--- a/src/via_crtc.c
+++ b/src/via_crtc.c
@@ -174,6 +174,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         case VIA_P4M900:
 	case VIA_VX800:
 	case VIA_VX855:
+	case VIA_VX900:
             break;
         default:
             ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
@@ -234,8 +235,8 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
     /* Primary starting address -> 0x00, adjustframe does the rest */
     hwp->writeCrtc(hwp, 0x0C, 0x00);
     hwp->writeCrtc(hwp, 0x0D, 0x00);
-    hwp->writeCrtc(hwp, 0x34, 0x00);
     ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */
+    hwp->writeCrtc(hwp, 0x34, 0x00);
 
     /* vertical sync start : 2047 */
     temp = mode->CrtcVSyncStart;
@@ -278,6 +279,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         case VIA_P4M900:
 	case VIA_VX800:
 	case VIA_VX855:
+	case VIA_VX900:
             break;
         default:
             /* some leftovers */
@@ -314,6 +316,7 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         case VIA_P4M900:
 	case VIA_VX800:
 	case VIA_VX855:
+	case VIA_VX900:
             break;
         default:
             /* some leftovers */
@@ -331,15 +334,20 @@ ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y)
     CARD32 Base;
     CARD32 tmp;
 
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaFirstCRTCSetStartingAddress\n"));
+
     Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
     Base = Base >> 1;
 
     hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
     hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
-    hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
-
+    /* FIXME The proper starting address for CR48 is 0x1F - Bits[28:24] */
     if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev)))
         ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
+    /* CR34 are fire bits. Must be written after CR0C CR0D CR48.  */
+    hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
+
+
 }
 
 void
@@ -434,6 +442,7 @@ ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         case VIA_P4M900:
 	case VIA_VX800:
 	case VIA_VX855:
+	case VIA_VX900:  
             break;
         default:
             ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
@@ -518,6 +527,7 @@ ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
         case VIA_P4M900:
 	case VIA_VX800:
 	case VIA_VX855:
+	case VIA_VX900:
             break;
         default:
             /* some leftovers */
diff --git a/src/via_cursor.c b/src/via_cursor.c
index 9333a18..18d49d5 100644
--- a/src/via_cursor.c
+++ b/src/via_cursor.c
@@ -98,6 +98,7 @@ viaHWCursorInit(ScreenPtr pScreen)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
 			if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
 				pVia->CursorRegControl  = VIA_REG_HI_CONTROL0;
 				pVia->CursorRegBase     = VIA_REG_HI_BASE0;
@@ -145,9 +146,12 @@ viaHWCursorInit(ScreenPtr pScreen)
     infoPtr->ShowCursor = viaShowCursor;
     infoPtr->UseHWCursor = viaUseHWCursor;
 
+    /* ARGB Cursor init */
     infoPtr->UseHWCursorARGB = viaUseHWCursorARGB;
-	if (pVia->CursorARGBSupported)
+    if (pVia->CursorARGBSupported) {
+        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HWCursor ARGB enabled\n"));
     	infoPtr->LoadCursorARGB = viaLoadCursorARGB;
+    }
 
     /* Set cursor location in frame buffer. */
     VIASETREG(VIA_REG_CURSOR_MODE, pVia->cursorOffset);
@@ -166,6 +170,7 @@ viaHWCursorInit(ScreenPtr pScreen)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
 			if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
 				VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF);
 				VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF);
@@ -225,6 +230,7 @@ viaCursorStore(ScrnInfoPtr pScrn)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
 		if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
 	    		pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR);
 	    		pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR);
@@ -265,6 +271,7 @@ viaCursorRestore(ScrnInfoPtr pScrn)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
 		if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
 	    		VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor);
 	    		VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor);
@@ -284,7 +291,7 @@ viaCursorRestore(ScrnInfoPtr pScrn)
 }
 
 /*
- * ARGB Cursor
+ * display the current cursor
  */
 
 void
@@ -298,6 +305,7 @@ viaShowCursor(ScrnInfoPtr pScrn)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
              if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
                  VIASETREG(VIA_REG_HI_CONTROL0, 0x36000005);
              }
@@ -319,13 +327,19 @@ viaShowCursor(ScrnInfoPtr pScrn)
             */
 
             /* Duoview */
-	    if (pVia->CursorPipe)
+	    if (pVia->CursorPipe) {
+                /* Mono Cursor Display Path [bit31]: Secondary */
+                /* FIXME For CLE266 and KM400 try to enable 32x32 cursor size [bit1] */
                 VIASETREG(VIA_REG_ALPHA_CONTROL, 0xF6000005);
-            else
+            } else {
+                /* Mono Cursor Display Path [bit31]: Primary */
                 VIASETREG(VIA_REG_ALPHA_CONTROL, 0x76000005);
+            }
     }
 }
 
+
+/* hide the current cursor */
 void
 viaHideCursor(ScrnInfoPtr pScrn)
 {
@@ -338,6 +352,7 @@ viaHideCursor(ScrnInfoPtr pScrn)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
              if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
                  temp = VIAGETREG(VIA_REG_HI_CONTROL0);
                  VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFA);
@@ -350,10 +365,16 @@ viaHideCursor(ScrnInfoPtr pScrn)
         
         default:
              temp = VIAGETREG(VIA_REG_ALPHA_CONTROL);
+             /* Hardware cursor disable [bit0] */
              VIASETREG(VIA_REG_ALPHA_CONTROL, temp & 0xFFFFFFFA);
     }
 }
 
+/*
+    Set the cursor position to (x,y).  X and/or y may be negative
+    indicating that the cursor image is partially offscreen on
+    the left and/or top edges of the screen.
+*/
 static void
 viaSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
 {
@@ -380,6 +401,7 @@ viaSetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
              if (pVia->pBIOSInfo->FirstCRTC->IsActive) {                
                  VIASETREG(VIA_REG_HI_POS0,    ((x    << 16) | (y    & 0x07ff)));
                  VIASETREG(VIA_REG_HI_OFFSET0, ((xoff << 16) | (yoff & 0x07ff)));
@@ -409,6 +431,15 @@ viaUseHWCursorARGB(ScreenPtr pScreen, CursorPtr pCurs)
             && pCurs->bits->height <= pVia->CursorMaxHeight);
 }
 
+/*
+    If the driver is unable to use a hardware cursor for reasons
+    other than the cursor being larger than the maximum specified
+    in the MaxWidth or MaxHeight field below, it can supply the
+    UseHWCursor function.  If UseHWCursor is provided by the driver,
+    it will be called whenever the cursor shape changes or the video
+    mode changes.  This is useful for when the hardware cursor cannot
+    be used in interlaced or doublescan modes.
+*/
 static Bool
 viaUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
 {
@@ -423,8 +454,11 @@ viaUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs)
             && pCurs->bits->height <= pVia->CursorMaxHeight);
 }
 
+/*
+    Load Mono Cursor Image 
+*/
 static void
-viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *s)
+viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
 {
     VIAPtr pVia = VIAPTR(pScrn);
     CARD32 temp;
@@ -439,7 +473,7 @@ viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *s)
     if (pVia->CursorARGBSupported) {
 #define ARGB_PER_CHUNK	(8 * sizeof (chunk) / 2)
 		for (i = 0; i < (pVia->CursorMaxWidth * pVia->CursorMaxHeight / ARGB_PER_CHUNK); i++) {
-		    chunk = *s++;
+		    chunk = *src++;
 		    for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2)
 			*dst++ = mono_cursor_color[chunk & 3];
 		}
@@ -447,7 +481,7 @@ viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *s)
 		pVia->CursorFG = mono_cursor_color[3];
 		pVia->CursorBG = mono_cursor_color[2];
     } else {
-	memcpy(dst, (CARD8*)s, pVia->CursorSize);
+	memcpy(dst, (CARD8*)src, pVia->CursorSize);
     }
     switch(pVia->Chipset) {
         case VIA_CX700:
@@ -455,6 +489,7 @@ viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *s)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
              if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
                  temp = VIAGETREG(VIA_REG_HI_CONTROL0);
                  VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE);
@@ -471,11 +506,17 @@ viaLoadCursorImage(ScrnInfoPtr pScrn, unsigned char *s)
     }
 }
 
+/*
+    Set the cursor foreground and background colors.  In 8bpp, fg and
+    bg are indices into the current colormap unless the 
+    HARDWARE_CURSOR_TRUECOLOR_AT_8BPP flag is set.  In that case
+    and in all other bpps the fg and bg are in 8-8-8 RGB format.
+*/
+
 static void
 viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
 {
     VIAPtr pVia = VIAPTR(pScrn);
-    CARD32 control = pVia->CursorRegControl;
     CARD32 pixel;
     CARD32 temp;
     CARD32 *dst;
@@ -487,12 +528,10 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
     fg |= 0xff000000;
     bg |= 0xff000000;
 
+    /* Don't recolour the image if we don't have to. */
     if (fg == pVia->CursorFG && bg == pVia->CursorBG)
 	return;
 
-    temp = VIAGETREG(control);
-    VIASETREG(control, temp & 0xFFFFFFFE);
-
     dst = (CARD32*)pVia->cursorMap;
     for (i = 0; i < pVia->CursorMaxWidth * pVia->CursorMaxHeight; i++, dst++)
 	if ((pixel = *dst))
@@ -507,6 +546,7 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
              if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
                  temp = VIAGETREG(VIA_REG_HI_CONTROL0);
                  VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE);
@@ -517,7 +557,8 @@ viaSetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
              }
              break;        
         default:
-             VIASETREG(control, temp);
+             temp = VIAGETREG(VIA_REG_ALPHA_CONTROL);
+             VIASETREG(VIA_REG_ALPHA_CONTROL, temp & 0xFFFFFFFE);
     }
 }
 
diff --git a/src/via_dga.c b/src/via_dga.c
index d15188a..ab12fbb 100644
--- a/src/via_dga.c
+++ b/src/via_dga.c
@@ -89,16 +89,16 @@ VIASetupDGAMode(
         otherPitch = secondPitch ? secondPitch : pMode->HDisplay;
 
         if (pMode->HDisplay != otherPitch) {
-            newmodes = xrealloc(modes, (*num + 2) * sizeof(DGAModeRec));
+            newmodes = realloc(modes, (*num + 2) * sizeof(DGAModeRec));
             oneMore = TRUE;
         }
         else {
-            newmodes = xrealloc(modes, (*num + 1) * sizeof(DGAModeRec));
+            newmodes = realloc(modes, (*num + 1) * sizeof(DGAModeRec));
             oneMore = FALSE;
         }
 
         if (!newmodes) {
-            xfree(modes);
+            free(modes);
             return NULL;
         }
 
diff --git a/src/via_dri.c b/src/via_dri.c
index 4786353..9690327 100644
--- a/src/via_dri.c
+++ b/src/via_dri.c
@@ -187,7 +187,7 @@ VIADRIRingBufferInit(ScrnInfoPtr pScrn)
             return FALSE;
 
         /*
-         * Info frome code-snippet on DRI-DEVEL list; Erdi Chen.
+         * Info from code-snippet on DRI-DEVEL list; Erdi Chen.
          */
 
         switch (pVia->ChipId) {
@@ -267,6 +267,7 @@ VIADRIAgpInit(ScreenPtr pScreen, VIAPtr pVia)
     pVIADRI = pDRIInfo->devPrivate;
     pVia->agpSize = 0;
 
+
     if (drmAgpAcquire(pVia->drmFD) < 0) {
         xf86DrvMsg(pScreen->myNum, X_ERROR, "[drm] drmAgpAcquire failed %d\n",
                    errno);
@@ -431,17 +432,17 @@ VIAInitVisualConfigs(ScreenPtr pScreen)
     if (pScrn->bitsPerPixel == 16 || pScrn->bitsPerPixel == 32) {
         numConfigs = 12;
         if (!(pConfigs = (__GLXvisualConfig *)
-                         xcalloc(sizeof(__GLXvisualConfig), numConfigs)))
+                         calloc(sizeof(__GLXvisualConfig), numConfigs)))
             return FALSE;
         if (!(pVIAConfigs = (VIAConfigPrivPtr)
-                            xcalloc(sizeof(VIAConfigPrivRec), numConfigs))) {
-            xfree(pConfigs);
+                            calloc(sizeof(VIAConfigPrivRec), numConfigs))) {
+            free(pConfigs);
             return FALSE;
         }
         if (!(pVIAConfigPtrs = (VIAConfigPrivPtr *)
-                               xcalloc(sizeof(VIAConfigPrivPtr), numConfigs))) {
-            xfree(pConfigs);
-            xfree(pVIAConfigs);
+                               calloc(sizeof(VIAConfigPrivPtr), numConfigs))) {
+            free(pConfigs);
+            free(pVIAConfigs);
             return FALSE;
         }
         for (i = 0; i < numConfigs; i++)
@@ -593,23 +594,28 @@ VIADRIScreenInit(ScreenPtr pScreen)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             pDRIInfo->clientDriverName = "swrast";
             break;
         default:
             pDRIInfo->clientDriverName = VIAClientDriverName;
             break;
     }
-    pDRIInfo->busIdString = xalloc(64);
-    sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
+    if (xf86LoaderCheckSymbol("DRICreatePCIBusID")) {
+        pDRIInfo->busIdString = DRICreatePCIBusID(pVia->PciInfo);
+    } else {
+        pDRIInfo->busIdString = malloc(64);
+        sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d",
 #ifdef XSERVER_LIBPCIACCESS
-            ((pVia->PciInfo->domain << 8) | pVia->PciInfo->bus),
-            pVia->PciInfo->dev, pVia->PciInfo->func
+                ((pVia->PciInfo->domain << 8) | pVia->PciInfo->bus),
+                pVia->PciInfo->dev, pVia->PciInfo->func
 #else
-            ((pciConfigPtr)pVia->PciInfo->thisCard)->busnum,
-            ((pciConfigPtr)pVia->PciInfo->thisCard)->devnum,
-            ((pciConfigPtr)pVia->PciInfo->thisCard)->funcnum
+                ((pciConfigPtr)pVia->PciInfo->thisCard)->busnum,
+                ((pciConfigPtr)pVia->PciInfo->thisCard)->devnum,
+                ((pciConfigPtr)pVia->PciInfo->thisCard)->funcnum
 #endif
-           );
+               );
+    }
     pDRIInfo->ddxDriverMajorVersion = VIA_DRIDDX_VERSION_MAJOR;
     pDRIInfo->ddxDriverMinorVersion = VIA_DRIDDX_VERSION_MINOR;
     pDRIInfo->ddxDriverPatchVersion = VIA_DRIDDX_VERSION_PATCH;
@@ -646,7 +652,7 @@ VIADRIScreenInit(ScreenPtr pScreen)
     pDRIInfo->SAREASize = SAREA_MAX;
 #endif
 
-    if (!(pVIADRI = (VIADRIPtr) xcalloc(sizeof(VIADRIRec), 1))) {
+    if (!(pVIADRI = (VIADRIPtr) calloc(sizeof(VIADRIRec), 1))) {
         DRIDestroyInfoRec(pVia->pDRIInfo);
         pVia->pDRIInfo = NULL;
         return FALSE;
@@ -665,7 +671,7 @@ VIADRIScreenInit(ScreenPtr pScreen)
     if (!DRIScreenInit(pScreen, pDRIInfo, &pVia->drmFD)) {
         xf86DrvMsg(pScreen->myNum, X_ERROR,
                    "[dri] DRIScreenInit failed.  Disabling DRI.\n");
-        xfree(pDRIInfo->devPrivate);
+        free(pDRIInfo->devPrivate);
         pDRIInfo->devPrivate = NULL;
         DRIDestroyInfoRec(pVia->pDRIInfo);
         pVia->pDRIInfo = NULL;
@@ -748,7 +754,7 @@ VIADRICloseScreen(ScreenPtr pScreen)
     if (pVia->pDRIInfo) {
         if ((pVIADRI = (VIADRIPtr) pVia->pDRIInfo->devPrivate)) {
             VIADRIIrqExit(pScrn, pVIADRI);
-            xfree(pVIADRI);
+            free(pVIADRI);
             pVia->pDRIInfo->devPrivate = NULL;
         }
         DRIDestroyInfoRec(pVia->pDRIInfo);
@@ -756,11 +762,11 @@ VIADRICloseScreen(ScreenPtr pScreen)
     }
 
     if (pVia->pVisualConfigs) {
-        xfree(pVia->pVisualConfigs);
+        free(pVia->pVisualConfigs);
         pVia->pVisualConfigs = NULL;
     }
     if (pVia->pVisualConfigsPriv) {
-        xfree(pVia->pVisualConfigsPriv);
+        free(pVia->pVisualConfigsPriv);
         pVia->pVisualConfigsPriv = NULL;
     }
 }
diff --git a/src/via_driver.c b/src/via_driver.c
index 728dea8..9d3650c 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -39,7 +39,7 @@
 #include <X11/extensions/dpms.h>
 #endif
 
-#include "svnversion.h"
+#include "version.h"
 
 #include "via_driver.h"
 #include "via_video.h"
@@ -143,6 +143,7 @@ static const struct pci_id_match via_device_match[] = {
    VIA_DEVICE_MATCH (PCI_CHIP_VT3327, 0 ),
    VIA_DEVICE_MATCH (PCI_CHIP_VT3353, 0 ),
    VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ),
+   VIA_DEVICE_MATCH (PCI_CHIP_VT3410, 0 ),
     { 0, 0, 0 },
 };
 
@@ -174,12 +175,13 @@ static SymTabRec VIAChipsets[] = {
     {VIA_K8M800,   "K8M800/K8N800"},
     {VIA_PM800,    "PM800/PM880/CN400"},
     {VIA_VM800,    "VM800/P4M800Pro/VN800/CN700"},
-    {VIA_K8M890,   "K8M890/K8N890"},
-    {VIA_P4M900,   "P4M900/VN896/CN896"},
     {VIA_CX700,    "CX700/VX700"},
+    {VIA_K8M890,   "K8M890/K8N890"},
     {VIA_P4M890,   "P4M890"},
+    {VIA_P4M900,   "P4M900/VN896/CN896"},
     {VIA_VX800,    "VX800/VX820"},
     {VIA_VX855,    "VX855/VX875"},
+    {VIA_VX900,    "VX900"},
     {-1,            NULL }
 };
 
@@ -190,12 +192,13 @@ static PciChipsets VIAPciChipsets[] = {
     {VIA_K8M800,   PCI_CHIP_VT3204,    VIA_RES_SHARED},
     {VIA_PM800,    PCI_CHIP_VT3259,    VIA_RES_SHARED},
     {VIA_VM800,    PCI_CHIP_VT3314,    VIA_RES_SHARED},
-    {VIA_K8M890,   PCI_CHIP_VT3336,    VIA_RES_SHARED},
-    {VIA_P4M900,   PCI_CHIP_VT3364,    VIA_RES_SHARED},
     {VIA_CX700,    PCI_CHIP_VT3324,    VIA_RES_SHARED},
+    {VIA_K8M890,   PCI_CHIP_VT3336,    VIA_RES_SHARED},
     {VIA_P4M890,   PCI_CHIP_VT3327,    VIA_RES_SHARED},
+    {VIA_P4M900,   PCI_CHIP_VT3364,    VIA_RES_SHARED},
     {VIA_VX800,    PCI_CHIP_VT3353,    VIA_RES_SHARED},
     {VIA_VX855,    PCI_CHIP_VT3409,    VIA_RES_SHARED},
+    {VIA_VX900,    PCI_CHIP_VT3410,    VIA_RES_SHARED},
     {-1,           -1,                 VIA_RES_UNDEF}
 };
 
@@ -219,6 +222,7 @@ typedef enum
     OPTION_ROTATE,
     OPTION_VIDEORAM,
     OPTION_ACTIVEDEVICE,
+    OPTION_I2CDEVICES,
     OPTION_BUSWIDTH,
     OPTION_CENTER,
     OPTION_PANELSIZE,
@@ -278,6 +282,7 @@ static OptionInfoRec VIAOptions[] = {
     {OPTION_MODE_SWITCH_METHOD,  "ModeSwitchMethod", OPTV_ANYSTR,  {0}, FALSE},
     {OPTION_MAX_DRIMEM,          "MaxDRIMem",        OPTV_INTEGER, {0}, FALSE},
     {OPTION_AGPMEM,              "AGPMem",           OPTV_INTEGER, {0}, FALSE},
+    {OPTION_I2CDEVICES,          "I2CDevices",       OPTV_ANYSTR,  {0}, FALSE},
     {-1,                         NULL,               OPTV_NONE,    {0}, FALSE}
 };
 
@@ -309,6 +314,7 @@ VIASetup(pointer module, pointer opts, int *errmaj, int *errmin)
 {
     static Bool setupDone = FALSE;
 
+    /* Only be loaded once */
     if (!setupDone) {
         setupDone = TRUE;
         xf86AddDriver(&VIA, module,
@@ -341,6 +347,7 @@ VIAGetRec(ScrnInfoPtr pScrn)
     if (pScrn->driverPrivate)
         return TRUE;
 
+    /* allocate VIARec */
     pScrn->driverPrivate = xnfcalloc(sizeof(VIARec), 1);
     VIAPtr pVia = ((VIARec *) (pScrn->driverPrivate));
 
@@ -402,36 +409,36 @@ VIAFreeRec(ScrnInfoPtr pScrn)
 
         if (pBIOSInfo->Panel) {
             if (pBIOSInfo->Panel->NativeMode)
-                xfree(pBIOSInfo->Panel->NativeMode);
+                free(pBIOSInfo->Panel->NativeMode);
             if (pBIOSInfo->Panel->CenteredMode)
-                xfree(pBIOSInfo->Panel->CenteredMode);
-            xfree(pBIOSInfo->Panel);
+                free(pBIOSInfo->Panel->CenteredMode);
+            free(pBIOSInfo->Panel);
         }
 
         if (pBIOSInfo->FirstCRTC)
-            xfree(pBIOSInfo->FirstCRTC);
+            free(pBIOSInfo->FirstCRTC);
         if (pBIOSInfo->SecondCRTC)
-            xfree(pBIOSInfo->SecondCRTC);
+            free(pBIOSInfo->SecondCRTC);
         if (pBIOSInfo->Simultaneous)
-            xfree(pBIOSInfo->Simultaneous);
+            free(pBIOSInfo->Simultaneous);
         if (pBIOSInfo->Lvds)
-            xfree(pBIOSInfo->Lvds);
+            free(pBIOSInfo->Lvds);
     }
 
     if (VIAPTR(pScrn)->pVbe)
         vbeFree(VIAPTR(pScrn)->pVbe);
 
     if (pVia->VideoRegs)
-        xfree(pVia->VideoRegs);
+        free(pVia->VideoRegs);
 
     if (((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev)
         xf86DestroyI2CDevRec((((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->
                               TVI2CDev), TRUE);
-    xfree(((VIARec *) (pScrn->driverPrivate))->pBIOSInfo);
+    free(((VIARec *) (pScrn->driverPrivate))->pBIOSInfo);
 
     VIAUnmapMem(pScrn);
 
-    xfree(pScrn->driverPrivate);
+    free(pScrn->driverPrivate);
     pScrn->driverPrivate = NULL;
 } /* VIAFreeRec */
 
@@ -457,7 +464,6 @@ via_pci_probe(DriverPtr driver, int entity_num,
 {
     ScrnInfoPtr scrn = NULL;
     EntityInfoPtr entity;
-    DevUnion *private;
 
     scrn = xf86ConfigPciEntity(scrn, 0, entity_num, VIAPciChipsets,
                                NULL, NULL, NULL, NULL, NULL);
@@ -515,7 +521,7 @@ VIAProbe(DriverPtr drv, int flags)
                                     numDevSections,
                                     drv,
                                     &usedChips);
-    xfree(devSections);
+    free(devSections);
 
     if (numUsed <= 0)
         return FALSE;
@@ -590,11 +596,11 @@ VIAProbe(DriverPtr drv, int flags)
                 }
                 instance++;
             }
-            xfree(pEnt);
+            free(pEnt);
         }
     }
 
-    xfree(usedChips);
+    free(usedChips);
 
     return foundScreen;
 
@@ -654,6 +660,12 @@ VIAProbeDDC(ScrnInfoPtr pScrn, int index)
     vbeInfoPtr pVbe;
 
     if (xf86LoadSubModule(pScrn, "vbe")) {
+        /* FIXME This line should be replaced with:
+
+           pVbe = VBEExtendedInit(NULL, index, 0);
+
+           for XF86 version > 4.2.99
+        */
         pVbe = VBEInit(NULL, index);
         ConfiguredMonitor = vbeDoEDID(pVbe, NULL);
         vbeFree(pVbe);
@@ -666,7 +678,7 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
     VIAPtr pVia = VIAPTR(pScrn);
     VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
 
-    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetupDefaultOptions\n"));
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetupDefaultOptions - Setting up default chipset options.\n"));
 
     pVia->shadowFB = FALSE;
     pVia->NoAccel = FALSE;
@@ -686,10 +698,14 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
     pVia->maxDriSize = 0;
     pVia->agpMem = AGP_SIZE / 1024;
     pVia->ActiveDevice = 0x00;
+    pVia->I2CDevices = 0x00;
     pVia->VideoEngine = VIDEO_ENGINE_CLE;
 #ifdef HAVE_DEBUG
     pVia->PrintVGARegs = FALSE;
 #endif
+
+    /* Disable vertical interpolation because the size of */
+    /* line buffer (limited to 800) is too small to do interpolation. */
     pVia->swov.maxWInterp = 800;
     pVia->swov.maxHInterp = 600;
     pVia->useLegacyVBE = TRUE;
@@ -712,7 +728,6 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
             break;
         case VIA_K8M800:
             pVia->DRIIrqEnable = FALSE;
-            pVia->UseLegacyModeSwitch = TRUE;
             break;
         case VIA_PM800:
             /* Use new mode switch to resolve many resolution and display bugs (switch to console) */
@@ -722,13 +737,21 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
         case VIA_VM800:
             /* New mode switch resolve bug with gamma set #282 */
             /* and with Xv after hibernate #240                */
-            /* FIXME Add panel support for this chipset        */
+            break;
+        case VIA_CX700:
+            pVia->VideoEngine = VIDEO_ENGINE_CME;
+            pVia->swov.maxWInterp = 1920;
+            pVia->swov.maxHInterp = 1080;
             break;
         case VIA_K8M890:
             pVia->VideoEngine = VIDEO_ENGINE_CME;
             pVia->agpEnable = FALSE;
             pVia->dmaXV = FALSE;
             break;
+        case VIA_P4M890:
+            pVia->VideoEngine = VIDEO_ENGINE_CME;
+            pVia->dmaXV = FALSE;
+            break;
         case VIA_P4M900:
             pVia->VideoEngine = VIDEO_ENGINE_CME;
             pVia->agpEnable = FALSE;
@@ -737,19 +760,12 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
             pVia->dmaXV = FALSE;
             pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0; 
             break;
-        case VIA_CX700:
-            pVia->VideoEngine = VIDEO_ENGINE_CME;
-            pVia->swov.maxWInterp = 1920;
-            pVia->swov.maxHInterp = 1080;
-            break;
-        case VIA_P4M890:
-            pVia->VideoEngine = VIDEO_ENGINE_CME;
-            pVia->dmaXV = FALSE;
-            break;
+
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             pVia->VideoEngine = VIDEO_ENGINE_CME;
-            //pVia->agpEnable = FALSE;
+            pVia->agpEnable = FALSE;
             pVia->dmaXV = FALSE;
             break;
     }
@@ -812,7 +828,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
     pEnt = xf86GetEntityInfo(pScrn->entityList[0]);
 #ifndef XSERVER_LIBPCIACCESS
     if (pEnt->resources) {
-        xfree(pEnt);
+        free(pEnt);
         VIAFreeRec(pScrn);
         return FALSE;
     }
@@ -830,7 +846,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
             pPriv = xf86GetEntityPrivate(pScrn->entityList[0], gVIAEntityIndex);
             pVIAEnt = pPriv->ptr;
             if (pVIAEnt->BypassSecondary) {
-                xfree(pEnt);
+                free(pEnt);
                 VIAFreeRec(pScrn);
                 return FALSE;
             }
@@ -853,6 +869,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
             pVIAEnt->HasSecondary = FALSE;
             pVIAEnt->RestorePrimary = FALSE;
             pVIAEnt->IsSecondaryRestored = FALSE;
+           
         }
     } else {
         pVia->sharedData = xnfcalloc(sizeof(ViaSharedRec), 1);
@@ -871,7 +888,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
      */
 
     if (!xf86SetDepthBpp(pScrn, 0, 0, 0, Support32bppFb)) {
-        xfree(pEnt);
+        free(pEnt);
         VIAFreeRec(pScrn);
         return FALSE;
     } else {
@@ -886,7 +903,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
                 xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                            "Given depth (%d) is not supported by this driver\n",
                            pScrn->depth);
-                xfree(pEnt);
+                free(pEnt);
                 VIAFreeRec(pScrn);
                 return FALSE;
         }
@@ -902,7 +919,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
         rgb zeros = { 0, 0, 0 };
 
         if (!xf86SetWeight(pScrn, zeros, zeros)) {
-            xfree(pEnt);
+            free(pEnt);
             VIAFreeRec(pScrn);
             return FALSE;
         } else {
@@ -919,7 +936,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Given default visual"
                        " (%s) is not supported at depth %d.\n",
                        xf86GetVisualName(pScrn->defaultVisual), pScrn->depth);
-            xfree(pEnt);
+            free(pEnt);
             VIAFreeRec(pScrn);
             return FALSE;
         }
@@ -984,7 +1001,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
 
     xf86DrvMsg(pScrn->scrnIndex, from, "Chipset revision: %d\n", pVia->ChipRev);
 
-    xfree(pEnt);
+    free(pEnt);
 
     /* Detect the amount of installed RAM */
     from = X_PROBED;
@@ -998,6 +1015,12 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
 
     switch (pVia->Chipset) {
         case VIA_CLE266:
+#ifdef XSERVER_LIBPCIACCESS
+            pci_device_cfg_read_u8(bridge, &videoRam, 0xE1);
+#else
+            videoRam = pciReadByte(pciTag(0, 0, 0), 0xE1) & 0x70;
+#endif
+            pScrn->videoRam = (1 << ((videoRam & 0x70) >> 4)) << 10;
         case VIA_KM400:
 #ifdef XSERVER_LIBPCIACCESS
             pci_device_cfg_read_u8(bridge, &videoRam, 0xE1);
@@ -1005,6 +1028,12 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
             videoRam = pciReadByte(pciTag(0, 0, 0), 0xE1) & 0x70;
 #endif
             pScrn->videoRam = (1 << ((videoRam & 0x70) >> 4)) << 10;
+            /* Workaround for #177 (VRAM probing fail on P4M800) */
+            if (pScrn->videoRam < 16384) {
+                xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+                           "Memory size detection failed: using 16 MB.\n");
+                pScrn->videoRam = 16 << 10;
+            }
             break;
         case VIA_PM800:
         case VIA_VM800:
@@ -1022,6 +1051,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
         case VIA_CX700:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
 #ifdef XSERVER_LIBPCIACCESS
             pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1);
 #else
@@ -1051,23 +1081,28 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
             }
     }
 
-    if (from == X_PROBED)
+    /*
+     * PCI BAR are limited to 256 MB.
+     * This limitation will go away with TTM.
+     */
+    if (pScrn->videoRam > (256 << 10)) {
+        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+                   "Cannot use more than 256 MB of VRAM.\n");
+        pScrn->videoRam = (256 << 10);
+    }
+
+    if (from == X_PROBED) {
         xf86DrvMsg(pScrn->scrnIndex, from,
                    "Probed amount of VideoRAM = %d kB\n", pScrn->videoRam);
+    }
 
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-               "Setting up default chipset options.\n");
     if (!VIASetupDefaultOptions(pScrn)) {
         VIAFreeRec(pScrn);
         return FALSE;
     }
 
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Reading config file...\n");
     xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, VIAOptions);
 
-    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-               "Starting to parse config file options...\n");
-
     if (xf86GetOptValInteger(VIAOptions, OPTION_VIDEORAM, &pScrn->videoRam))
         xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
                    "Setting amount of VideoRAM to %d kB\n", pScrn->videoRam);
@@ -1528,6 +1563,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
         }
     }
 
+    /* Initialize the colormap */
     Gamma zeros = { 0.0, 0.0, 0.0 };
     if (!xf86SetGamma(pScrn, zeros)) {
         VIAFreeRec(pScrn);
@@ -1553,6 +1589,17 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
 
     pVia->videoRambytes = pScrn->videoRam << 10;
 
+    /* I2CDevices Option for I2C Initialization */
+    //pVia->I2CDevices = 0x00;
+    if ((s = xf86GetOptValString(VIAOptions, OPTION_I2CDEVICES))) {
+        if (strstr(s, "Bus1"))
+            pVia->I2CDevices |= VIA_I2C_BUS1;
+        if (strstr(s, "Bus2"))
+            pVia->I2CDevices |= VIA_I2C_BUS2;
+        if (strstr(s, "Bus3"))  
+            pVia->I2CDevices |= VIA_I2C_BUS3;
+    }
+
     if (!xf86LoadSubModule(pScrn, "i2c")) {
         VIAFreeRec(pScrn);
         return FALSE;
@@ -1566,10 +1613,13 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
     } else {
 
         if (pVia->pI2CBus1) {
-            pVia->DDC1 = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus1);
+            pVia->DDC1 = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus1, TRUE);
             if (pVia->DDC1) {
                 xf86PrintEDID(pVia->DDC1);
                 xf86SetDDCproperties(pScrn, pVia->DDC1);
+                DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+                    "DDC pI2CBus1 detected a %s\n", DIGITAL(pVia->DDC1->features.input_type) ?
+                    "DFP" : "CRT"));
             }
         }
     }
@@ -1589,16 +1639,6 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
             ViaPanelPreInit(pScrn);
     }
 
-    if (pBIOSInfo->Panel->IsActive &&
-        ((pVia->Chipset == VIA_K8M800) ||
-         (pVia->Chipset == VIA_VM800))) {
-        xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800 and "
-                   "VM800 is currently not supported.\n");
-        xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
-                   "Using VBE to set modes to work around this.\n");
-        pVia->useVBEModes = TRUE;
-    }
-
     pVia->pVbe = NULL;
     if (pVia->useVBEModes) {
         /* VBE doesn't properly initialise int10 itself. */
@@ -1622,6 +1662,7 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
         }
 
     } else {
+        int max_pitch, max_height;
         /* Add own modes. */
         ViaModesAttach(pScrn, pScrn->monitor);
 
@@ -1638,6 +1679,26 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
         clockRanges->interlaceAllowed = TRUE;
         clockRanges->doubleScanAllowed = FALSE;
 
+        switch (pVia->Chipset) {
+            case VIA_CLE266:
+            case VIA_KM400:
+            case VIA_K8M800:
+            case VIA_PM800:
+            case VIA_VM800:
+                max_pitch = 3344;
+                max_height = 2508;
+            case VIA_CX700:
+            case VIA_K8M890:
+            case VIA_P4M890:
+            case VIA_P4M900:
+                max_pitch = 8192/(pScrn->bitsPerPixel >> 3)-1;
+                max_height = max_pitch;
+                break;
+            default:
+                max_pitch = 16384/(pScrn->bitsPerPixel >> 3)-1;
+                max_height = max_pitch;        
+        }
+
         /*
          * xf86ValidateModes will check that the mode HTotal and VTotal values
          * don't exceed the chipset's limit if pScrn->maxHValue and
@@ -1664,10 +1725,10 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags)
                               clockRanges,               /* list of clock ranges */
                               NULL,     /* list of line pitches */
                               256,      /* minimum line pitch */
-                              3344,     /* maximum line pitch */
+                              max_pitch,     /* maximum line pitch */
                               16 * 8,   /* pitch increment (in bits), we just want 16 bytes alignment */
-                              128,      /* min height */
-                              2508,     /* max height */
+                              128,      /* min virtual height */
+                              max_height,     /* maximum virtual height */
                               pScrn->display->virtualX, /* virtual width */
                               pScrn->display->virtualY, /* virtual height */
                               pVia->videoRambytes,      /* apertureSize */
@@ -1861,6 +1922,7 @@ VIALeaveVT(int scrnIndex, int flags)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             break;
         default:
             hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
@@ -1974,7 +2036,9 @@ VIASave(ScrnInfoPtr pScrn)
         Regs->SR17 = hwp->readSeq(hwp, 0x17);
         Regs->SR18 = hwp->readSeq(hwp, 0x18);
         Regs->SR19 = hwp->readSeq(hwp, 0x19);
+        /* PCI Bus Control */
         Regs->SR1A = hwp->readSeq(hwp, 0x1A);
+
         Regs->SR1B = hwp->readSeq(hwp, 0x1B);
         Regs->SR1C = hwp->readSeq(hwp, 0x1C);
         Regs->SR1D = hwp->readSeq(hwp, 0x1D);
@@ -2016,40 +2080,59 @@ VIASave(ScrnInfoPtr pScrn)
                 Regs->SR4C = hwp->readSeq(hwp, 0x4C);
                 break;
         }
-        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-              "Non-Primary Adapter! saving VGA_SR_MODE only !!\n"));
+
+        /* Save Preemptive Arbiter Control Register */
+        Regs->SR4D = hwp->readSeq(hwp, 0x4D);
         DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Crtc...\n"));
 
         Regs->CR13 = hwp->readCrtc(hwp, 0x13);
 
         Regs->CR32 = hwp->readCrtc(hwp, 0x32);
         Regs->CR33 = hwp->readCrtc(hwp, 0x33);
-        Regs->CR34 = hwp->readCrtc(hwp, 0x34);
+
         Regs->CR35 = hwp->readCrtc(hwp, 0x35);
         Regs->CR36 = hwp->readCrtc(hwp, 0x36);
 
+
+
+        /* Starting Address */
+        /* Start Address High */
+        Regs->CR0C = hwp->readCrtc(hwp, 0x0C);
+        /* Start Address Low */
+        Regs->CR0D = hwp->readCrtc(hwp, 0x0D);
+        /* Starting Address Overflow Bits[28:24] */
         Regs->CR48 = hwp->readCrtc(hwp, 0x48);
+        /* CR34 are fire bits. Must be written after CR0C CR0D CR48.  */
+        /* Starting Address Overflow Bits[23:16] */
+        Regs->CR34 = hwp->readCrtc(hwp, 0x34);
+
+
         Regs->CR49 = hwp->readCrtc(hwp, 0x49);
 
         DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TVSave...\n"));
         if (pBIOSInfo->TVI2CDev)
             ViaTVSave(pScrn);
 
-        /* Save LCD control registers. */
+        /* Save LCD control registers (from CR 0x50 to 0x93). */
         for (i = 0; i < 68; i++)
             Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50);
 
         if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
-
-            Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
-            Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
-            Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
-
+            /* LVDS Channel 2 Function Select 0 / DVI Function Select */ 
             Regs->CR97 = hwp->readCrtc(hwp, 0x97);
+            /* LVDS Channel 1 Function Select 0 */
             Regs->CR99 = hwp->readCrtc(hwp, 0x99);
+            /* Digital Video Port 1 Function Select 0 */
             Regs->CR9B = hwp->readCrtc(hwp, 0x9B);
+            /* Power Now Control 4 */
             Regs->CR9F = hwp->readCrtc(hwp, 0x9F);
 
+            /* Horizontal Scaling Initial Value */
+            Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
+            /* Vertical Scaling Initial Value */
+            Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
+            /* Scaling Enable Bit */
+            Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
         }
 
         /* Save TMDS status */
@@ -2057,6 +2140,7 @@ VIASave(ScrnInfoPtr pScrn)
             case VIA_CX700:
             case VIA_VX800:
             case VIA_VX855:
+            case VIA_VX900:
                 Regs->CRD2 = hwp->readCrtc(hwp, 0xD2);
                 break;
         }
@@ -2084,15 +2168,15 @@ VIARestore(ScrnInfoPtr pScrn)
     /* Unlock extended registers. */
     hwp->writeSeq(hwp, 0x10, 0x01);
 
-    /*=* CR6A, CR6B, CR6C must be reset before restore
-         standard vga regs, or system will be hang. *=*/
+    /*=* CR6A, CR6B, CR6C must be reset before restoring
+         standard vga regs, or system will hang. *=*/
     /*=* TODO Check is reset IGA2 channel before disable IGA2 channel
-         is neccesery or it may cause some line garbage. *=*/
+         is necessary or it may cause some line garbage. *=*/
     hwp->writeCrtc(hwp, 0x6A, 0x00);
     hwp->writeCrtc(hwp, 0x6B, 0x00);
     hwp->writeCrtc(hwp, 0x6C, 0x00);
     
-    /* Gamma must disable before restore pallette */
+    /* Gamma must be disabled before restoring palette */
     ViaGammaDisable(pScrn);
 
     if (pBIOSInfo->TVI2CDev)
@@ -2137,11 +2221,19 @@ VIARestore(ScrnInfoPtr pScrn)
     hwp->writeSeq(hwp, 0x45, Regs->SR45);
     hwp->writeSeq(hwp, 0x46, Regs->SR46);
 
+    /* Reset VCK PLL */
+    hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) | 0x02); /* Set SR40[1] to 1 */
+    hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) & 0xFD); /* Set SR40[1] to 0 */
+
     /* ECK Clock Synthesizer: */
     hwp->writeSeq(hwp, 0x47, Regs->SR47);
     hwp->writeSeq(hwp, 0x48, Regs->SR48);
     hwp->writeSeq(hwp, 0x49, Regs->SR49);
 
+    /* Reset ECK PLL */
+    hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) | 0x01); /* Set SR40[0] to 1 */
+    hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) & 0xFE); /* Set SR40[0] to 0 */
+
     switch (pVia->Chipset) {
         case VIA_CLE266:
         case VIA_KM400:
@@ -2151,9 +2243,22 @@ VIARestore(ScrnInfoPtr pScrn)
             hwp->writeSeq(hwp, 0x4A, Regs->SR4A);
             hwp->writeSeq(hwp, 0x4B, Regs->SR4B);
             hwp->writeSeq(hwp, 0x4C, Regs->SR4C);
+
+            /* Reset LCK PLL */
+            hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) | 0x04); /* Set SR40[2] to 1 */
+            hwp->writeSeq(hwp, 0x40, hwp->readSeq(hwp, 0x40) & 0xFB); /* Set SR40[2] to 0 */
             break;
     }
 
+    /* Restore Preemptive Arbiter Control Register
+     * VX800 and VX855 should restore this register too,
+     * but I don't do that for I don't want to affect any
+     * chips now.
+     */
+    if (pVia->Chipset == VIA_VX900) {
+        hwp->writeSeq(hwp, 0x4D, Regs->SR4D);
+    }
+
     /* Reset dotclocks. */
     ViaSeqMask(hwp, 0x40, 0x06, 0x06);
     ViaSeqMask(hwp, 0x40, 0x00, 0x06);
@@ -2166,14 +2271,23 @@ VIARestore(ScrnInfoPtr pScrn)
     hwp->writeCrtc(hwp, 0x32, Regs->CR32);
     /* HSYNCH Adjuster */
     hwp->writeCrtc(hwp, 0x33, Regs->CR33);
-    /* Starting Address Overflow */
-    hwp->writeCrtc(hwp, 0x34, Regs->CR34);
     /* Extended Overflow */
     hwp->writeCrtc(hwp, 0x35, Regs->CR35);
     /*Power Management 3 (Monitor Control) */
     hwp->writeCrtc(hwp, 0x36, Regs->CR36);
 
+    /* Starting Address */
+    /* Start Address High */
+    hwp->writeCrtc(hwp, 0x0C, Regs->CR0C);
+    /* Start Address Low */
+    hwp->writeCrtc(hwp, 0x0D, Regs->CR0D);
+    /* Starting Address Overflow Bits[28:24] */
     hwp->writeCrtc(hwp, 0x48, Regs->CR48);
+    /* CR34 are fire bits. Must be written after CR0C CR0D CR48.  */
+    /* Starting Address Overflow Bits[23:16] */
+    hwp->writeCrtc(hwp, 0x34, Regs->CR34);
+    
+
     hwp->writeCrtc(hwp, 0x49, Regs->CR49);
 
     /* Restore LCD control registers. */
@@ -2199,6 +2313,7 @@ VIARestore(ScrnInfoPtr pScrn)
         case VIA_CX700:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             /* LVDS Control Register */
             hwp->writeCrtc(hwp, 0xD2, Regs->CRD2);
             break;
@@ -2228,6 +2343,7 @@ ViaMMIOEnable(ScrnInfoPtr pScrn)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             ViaSeqMask(hwp, 0x1A, 0x08, 0x08);
             break;
         default:
@@ -2251,6 +2367,7 @@ ViaMMIODisable(ScrnInfoPtr pScrn)
         case VIA_P4M900:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             ViaSeqMask(hwp, 0x1A, 0x00, 0x08);
             break;
         default:
@@ -2367,10 +2484,18 @@ VIAMapFB(ScrnInfoPtr pScrn)
     VIAPtr pVia = VIAPTR(pScrn);
 
 #ifdef XSERVER_LIBPCIACCESS
-    pVia->FrameBufferBase = pVia->PciInfo->regions[0].base_addr;
+    if (pVia->Chipset == VIA_VX900) {
+        pVia->FrameBufferBase = pVia->PciInfo->regions[2].base_addr;
+    } else {
+        pVia->FrameBufferBase = pVia->PciInfo->regions[0].base_addr;
+    }
     int err;
 #else
-    pVia->FrameBufferBase = pVia->PciInfo->memBase[0];
+    if (pVia->Chipset == VIA_VX900) {
+        pVia->FrameBufferBase = pVia->PciInfo->memBase[2];
+    } else {
+        pVia->FrameBufferBase = pVia->PciInfo->memBase[0];
+    }
 #endif
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAMapFB\n"));
@@ -2492,7 +2617,6 @@ static void
 VIALoadRgbLut(ScrnInfoPtr pScrn, int numColors, int *indices, LOCO *colors,
               VisualPtr pVisual)
 {
-    VIAPtr pVia = VIAPTR(pScrn);
     vgaHWPtr hwp = VGAHWPTR(pScrn);
 
     int i, j, index;
@@ -2883,7 +3007,7 @@ VIAInternalScreenInit(int scrnIndex, ScreenPtr pScreen)
 
     if (pVia->shadowFB) {
         pVia->ShadowPitch = BitmapBytePad(pScrn->bitsPerPixel * width);
-        pVia->ShadowPtr = xalloc(pVia->ShadowPitch * shadowHeight);
+        pVia->ShadowPtr = malloc(pVia->ShadowPitch * shadowHeight);
         displayWidth = pVia->ShadowPitch / (pScrn->bitsPerPixel >> 3);
         FBStart = pVia->ShadowPtr;
     } else {
@@ -2919,7 +3043,6 @@ static Bool
 VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
 {
     VIAPtr pVia = VIAPTR(pScrn);
-    VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAWriteMode\n"));
 
@@ -2956,6 +3079,7 @@ VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
                 case VIA_P4M900:
                 case VIA_VX800:
                 case VIA_VX855:
+                case VIA_VX900:
                     /*
                      * Since we are using virtual, we need to adjust
                      * the offset to match the framebuffer alignment.
@@ -3002,6 +3126,7 @@ VIACloseScreen(int scrnIndex, ScreenPtr pScreen)
             case VIA_P4M900:
             case VIA_VX800:
             case VIA_VX855:
+            case VIA_VX900:
                 break;
             default :
                 hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
@@ -3025,11 +3150,11 @@ VIACloseScreen(int scrnIndex, ScreenPtr pScreen)
 
     viaExitAccel(pScreen);
     if (pVia->ShadowPtr) {
-        xfree(pVia->ShadowPtr);
+        free(pVia->ShadowPtr);
         pVia->ShadowPtr = NULL;
     }
     if (pVia->DGAModes) {
-        xfree(pVia->DGAModes);
+        free(pVia->DGAModes);
         pVia->DGAModes = NULL;
     }
 
@@ -3072,9 +3197,7 @@ static void
 VIAAdjustFrame(int scrnIndex, int x, int y, int flags)
 {
     ScrnInfoPtr pScrn = xf86Screens[scrnIndex];
-    vgaHWPtr hwp = VGAHWPTR(pScrn);
     VIAPtr pVia = VIAPTR(pScrn);
-    CARD32 Base;
 
     DEBUG(xf86DrvMsg(scrnIndex, X_INFO, "VIAAdjustFrame %dx%d\n", x, y));
 
@@ -3212,7 +3335,6 @@ VIASwitchMode(int scrnIndex, DisplayModePtr mode, int flags)
 static void
 VIADPMS(ScrnInfoPtr pScrn, int mode, int flags)
 {
-    vgaHWPtr hwp = VGAHWPTR(pScrn);
     VIAPtr pVia = VIAPTR(pScrn);
     VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
 
diff --git a/src/via_driver.h b/src/via_driver.h
index f99e7aa..19950c5 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -104,7 +104,7 @@
 #define DRIVER_NAME     "openchrome"
 #define VERSION_MAJOR   0
 #define VERSION_MINOR   2
-#define PATCHLEVEL      904
+#define PATCHLEVEL      905
 #define VIA_VERSION     ((VERSION_MAJOR<<24) | (VERSION_MINOR<<16) | PATCHLEVEL)
 
 #define VIA_VQ_SIZE             (256 * 1024)
@@ -127,9 +127,10 @@ typedef struct {
     CARD8   SR27, SR28, SR29, SR2A,SR2B,SR2C,SR2D,SR2E;
     CARD8   SR2F, SR30, SR31, SR32,SR33,SR34,SR40,SR41;
     CARD8   SR42, SR43, SR44, SR45,SR46,SR47,SR48,SR49;
-    CARD8   SR4A, SR4B, SR4C;
+    CARD8   SR4A, SR4B, SR4C, SR4D;
 
     /*   extended CRTC registers */
+    CARD8   CR0C, CR0D;
     CARD8   CR13, CR30, CR31, CR32, CR33, CR34, CR35, CR36;
     CARD8   CR37, CR38, CR39, CR3A, CR40, CR41, CR42, CR43;
     CARD8   CR44, CR45, CR46, CR47, CR48, CR49, CR4A;
@@ -142,7 +143,7 @@ typedef struct {
 } VIARegRec, *VIARegPtr;
 
 /*
- * varables that need to be shared among different screens.
+ * variables that need to be shared among different screens.
  */
 typedef struct {
     Bool b3DRegsInitialized;
@@ -285,6 +286,7 @@ typedef struct _VIA {
     Bool                agpDMA;
     Bool                nPOT[VIA_NUM_TEXUNITS];
     const unsigned     *TwodRegs;
+    const unsigned     *HqvCmeRegs;
     ExaDriverPtr        exaDriverPtr;
     ExaOffscreenArea   *exa_scratch;
     unsigned int        exa_scratch_next;
@@ -412,16 +414,18 @@ typedef struct _VIA {
     void                *cursorMap;
     CARD32              cursorOffset;
 
+    CARD8               I2CDevices;	/* Option */
+
 #ifdef HAVE_DEBUG
     Bool                disableXvBWCheck;
     Bool                DumpVGAROM;
     Bool                PrintVGARegs;
     Bool                PrintTVRegs;
     Bool                I2CScan;
+#endif /* HAVE_DEBUG */
     
     Bool                UseLegacyModeSwitch ;
     video_via_regs*     VideoRegs ;
-#endif /* HAVE_DEBUG */
 } VIARec, *VIAPtr;
 
 #define VIAPTR(p) ((VIAPtr)((p)->driverPrivate))
@@ -433,7 +437,7 @@ typedef struct
     Bool HasSecondary;
     Bool BypassSecondary;
     /*These two registers are used to make sure the CRTC2 is
-      retored before CRTC_EXT, otherwise it could lead to blank screen.*/
+      restored before CRTC_EXT, otherwise it could lead to blank screen.*/
     Bool IsSecondaryRestored;
     Bool RestorePrimary;
 
diff --git a/src/via_i2c.c b/src/via_i2c.c
index 80bc5de..2f3cd21 100644
--- a/src/via_i2c.c
+++ b/src/via_i2c.c
@@ -365,9 +365,18 @@ ViaI2CInit(ScrnInfoPtr pScrn)
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaI2CInit\n"));
 
-    pVia->pI2CBus1 = ViaI2CBus1Init(pScrn->scrnIndex);
-    pVia->pI2CBus2 = ViaI2CBus2Init(pScrn->scrnIndex);
-    pVia->pI2CBus3 = ViaI2CBus3Init(pScrn->scrnIndex);
+    if (!pVia->I2CDevices) {
+        pVia->pI2CBus1 = ViaI2CBus1Init(pScrn->scrnIndex);
+        pVia->pI2CBus2 = ViaI2CBus2Init(pScrn->scrnIndex);
+        pVia->pI2CBus3 = ViaI2CBus3Init(pScrn->scrnIndex);
+    } else {
+        if (pVia->I2CDevices & VIA_I2C_BUS1)
+            pVia->pI2CBus1 = ViaI2CBus1Init(pScrn->scrnIndex);
+        if (pVia->I2CDevices & VIA_I2C_BUS2)
+            pVia->pI2CBus2 = ViaI2CBus2Init(pScrn->scrnIndex);
+        if (pVia->I2CDevices & VIA_I2C_BUS3)
+            pVia->pI2CBus3 = ViaI2CBus3Init(pScrn->scrnIndex);
+    }
 
 #ifdef HAVE_DEBUG
     if (pVia->I2CScan) {
diff --git a/src/via_id.c b/src/via_id.c
index 18c0e16..c352535 100644
--- a/src/via_id.c
+++ b/src/via_id.c
@@ -63,6 +63,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"Giga-byte 7VM400(A)M",                  VIA_KM400,   0x1458, 0xD000, VIA_DEVICE_CRT},
     {"MSI KM4(A)M-V",                         VIA_KM400,   0x1462, 0x7061, VIA_DEVICE_CRT}, /* aka "DFI KM400-MLV" */
     {"MSI PM8M2-V",                           VIA_KM400,   0x1462, 0x7071, VIA_DEVICE_CRT},
+    {"MSI PM8M-V",                            VIA_KM400,   0x1462, 0x7104, VIA_DEVICE_CRT},
     {"MSI KM4(A)M-L",                         VIA_KM400,   0x1462, 0x7348, VIA_DEVICE_CRT},
     {"Abit VA-10 (1)",                        VIA_KM400,   0x147B, 0x140B, VIA_DEVICE_CRT},
     {"Abit VA-10 (2)",                        VIA_KM400,   0x147B, 0x140C, VIA_DEVICE_CRT},
@@ -92,6 +93,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"Shuttle FX21",                          VIA_K8M800,  0x1297, 0x3052, VIA_DEVICE_CRT},
     {"Shuttle FX83",                          VIA_K8M800,  0x1297, 0xF683, VIA_DEVICE_CRT | VIA_DEVICE_TV},
     {"Sharp Actius AL27",                     VIA_K8M800,  0x13BD, 0x1044, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Sharp Mebius PC-CS30H",                 VIA_K8M800,  0x13BD, 0x1047, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Sharp PC-AE30J",                        VIA_K8M800,  0x13BD, 0x104B, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Giga-byte GA-K8VM800M",                 VIA_K8M800,  0x1458, 0xD000, VIA_DEVICE_CRT},
     {"MSI K8M Neo-V",                         VIA_K8M800,  0x1462, 0x0320, VIA_DEVICE_CRT},
@@ -114,6 +116,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"Packard Bell Easynote B3 800/B3340",    VIA_K8M800,  0x1631, 0xC009, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Packard Bell Imedia 2097",              VIA_K8M800,  0x1631, 0xD007, VIA_DEVICE_CRT},
     {"Fujitsu-Siemens Amilo K7610",           VIA_K8M800,  0x1734, 0x10B3, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Lenovo ThinkCenter E51 8714",           VIA_K8M800,  0x17AA, 0x1008, VIA_DEVICE_CRT},
     {"ASRock K8Upgrade-VM800",                VIA_K8M800,  0x1849, 0x3108, VIA_DEVICE_CRT},
     {"Axper XP-M8VM800",                      VIA_K8M800,  0x1940, 0xD000, VIA_DEVICE_CRT},
 
@@ -138,8 +141,10 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"Haier A60-440256080BD",                 VIA_VM800,   0x1019, 0x0F79, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"PCChips P23G",                          VIA_VM800,   0x1019, 0x1623, VIA_DEVICE_CRT},
     {"ECS P4M800PRO-M",                       VIA_VM800,   0x1019, 0x2122, VIA_DEVICE_CRT},
+    {"ECS P4M800PRO-M2 (V2.0)",               VIA_VM800,   0x1019, 0x2123, VIA_DEVICE_CRT},
     {"ECS C7VCM",                             VIA_VM800,   0x1019, 0xAA2D, VIA_DEVICE_CRT},
     {"PCChips V21G",                          VIA_VM800,   0x1019, 0xAA51, VIA_DEVICE_CRT},
+    {"Hewlett Packard DX2020",                VIA_VM800,   0x103C, 0x3027, VIA_DEVICE_CRT},
     {"Asustek P5VDC-MX",                      VIA_VM800,   0x1043, 0x3344, VIA_DEVICE_CRT},
     {"Asustek P5VDC-TVM",                     VIA_VM800,   0x1043, 0x81CE, VIA_DEVICE_CRT},
     {"Foxconn P4M800P7MB-RS2H",               VIA_VM800,   0x105B, 0x0CF0, VIA_DEVICE_CRT},
@@ -152,6 +157,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"MSI PM8PM",                             VIA_VM800,   0x1462, 0x7222, VIA_DEVICE_CRT},
     {"Twinhead M6",                           VIA_VM800,   0x14FF, 0xA007, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"RoverBook Partner W500",                VIA_VM800,   0x1509, 0x4330, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"FIC PTM800Pro LF",                      VIA_VM800,   0x1509, 0x601A, VIA_DEVICE_CRT},
     {"Clevo/RoverBook Voyager V511L",         VIA_VM800,   0x1558, 0x0662, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Clevo M5xxS",                           VIA_VM800,   0x1558, 0x5406, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Biostar P4M80-M4 / P4VMA-M",            VIA_VM800,   0x1565, 0x1202, VIA_DEVICE_CRT},
@@ -170,6 +176,7 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"Asustek M2V-MX SE",                     VIA_K8M890,  0x1043, 0x8297, VIA_DEVICE_CRT},
     {"Foxconn K8M890M2MA-RS2H",               VIA_K8M890,  0x105B, 0x0C84, VIA_DEVICE_CRT},
     {"Shuttle FX22V1",                        VIA_K8M890,  0x1297, 0x3080, VIA_DEVICE_CRT},
+    {"MSI K8M890M2-V",                        VIA_K8M890,  0x1462, 0x7139, VIA_DEVICE_CRT},
     {"MSI K9VGM-V",                           VIA_K8M890,  0x1462, 0x7253, VIA_DEVICE_CRT},
     {"Averatec 226x",                         VIA_K8M890,  0x14FF, 0xA002, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Fujitsu/Siemens Amilo La 1703",         VIA_K8M890,  0x1734, 0x10D9, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
@@ -183,12 +190,15 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"Mitac 8515",                            VIA_P4M900,  0x1071, 0x8515, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Medion Notebook MD96483",               VIA_P4M900,  0x1071, 0x8615, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Mitac 8624",                            VIA_P4M900,  0x1071, 0x8624, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
-    {"VIA VT3364 (P4M900)",                   VIA_P4M900,  0x1106, 0x3371, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"VIA VB8001 Mini-ITX Board (P4M900)",    VIA_P4M900,  0x1106, 0x3371, VIA_DEVICE_CRT},
     {"Gigabyte GA-VM900M",                    VIA_P4M900,  0x1458, 0xD000, VIA_DEVICE_CRT},
     {"MSI VR321",                             VIA_P4M900,  0x1462, 0x3355, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"MSI P4M900M / P4M900M2-F/L",            VIA_P4M900,  0x1462, 0x7255, VIA_DEVICE_CRT},
+    {"MSI PM9M-V",                            VIA_P4M900,  0x1462, 0x7364, VIA_DEVICE_CRT},
     {"MSI P4M900M3-L",                        VIA_P4M900,  0x1462, 0x7387, VIA_DEVICE_CRT},
     {"Twinhead H12V",                         VIA_P4M900,  0x14FF, 0xA00F, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Twinhead K15V",                         VIA_P4M900,  0x14FF, 0xA012, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"Semp Informática Notebook IS 1462",     VIA_P4M900,  0x1509, 0x1D41, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Everex NC1501/NC1503",                  VIA_P4M900,  0x1509, 0x1E30, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Clevo M660SE",                          VIA_P4M900,  0x1558, 0x0664, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Clevo M660SR",                          VIA_P4M900,  0x1558, 0x0669, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
@@ -224,9 +234,11 @@ static struct ViaCardIdStruct ViaCardId[] = {
 
     /*** VX800 ***/
     {"VIA Epia M700",                         VIA_VX800,   0x1106, 0x1122, VIA_DEVICE_CRT},
+    {"Siragon ML-6200",                       VIA_VX800,   0x1106, 0x2211, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Guillemot-Hercules ECafe EC900B",       VIA_VX800,   0x1106, 0x3349, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"VIA OpenBook",                          VIA_VX800,   0x1170, 0x0311, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, /* VIA OpenBook eNote VBE8910 */
     {"Samsung NC20",                          VIA_VX800,   0x144d, 0xc04e, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+    {"FIC CE2A1",                             VIA_VX800,   0x1509, 0x3002, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Quanta DreamBook Light IL1",            VIA_VX800,   0x152d, 0x0771, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
     {"Lenovo S12",                            VIA_VX800,   0x17aa, 0x388c, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
 
@@ -234,6 +246,12 @@ static struct ViaCardIdStruct ViaCardId[] = {
     {"VIA VT8562C",                           VIA_VX855,   0x1106, 0x5122, VIA_DEVICE_CRT},
     {"OLPC XO 1.5",                           VIA_VX855,   0x152D, 0x0833, VIA_DEVICE_LCD},
 
+    /*** VX900 ***/
+    {"Foxconn L740",                          VIA_VX900,   0x105B, 0x0CFD, VIA_DEVICE_LCD | VIA_DEVICE_CRT},
+    {"HP T5550 Thin Client",                  VIA_VX900,   0x1106, 0x7122, VIA_DEVICE_CRT},
+    {"ASRock PV530",                          VIA_VX900,   0x1849, 0x7122, VIA_DEVICE_CRT},
+
+
     /* keep this */
     {NULL,                                    VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE}
 };
diff --git a/src/via_id.h b/src/via_id.h
index d941cf2..4db321d 100644
--- a/src/via_id.h
+++ b/src/via_id.h
@@ -39,6 +39,7 @@ enum VIACHIPTAGS {
     VIA_P4M890,
     VIA_VX800,
     VIA_VX855,
+    VIA_VX900,
     VIA_LAST
 };
 
@@ -56,6 +57,7 @@ enum VIACHIPTAGS {
 #define PCI_CHIP_VT3327         0x3343 /* P4M890 */
 #define PCI_CHIP_VT3353         0x1122 /* VX800 */
 #define PCI_CHIP_VT3409         0x5122 /* VX855/VX875 */
+#define PCI_CHIP_VT3410         0x7122 /* VX900 */
 
 /* There is some conflicting information about the two major revisions of
  * the CLE266, often labelled Ax and Cx.  The dividing line seems to be
diff --git a/src/via_lvds.c b/src/via_lvds.c
index 90c089a..03a79b3 100644
--- a/src/via_lvds.c
+++ b/src/via_lvds.c
@@ -42,7 +42,7 @@
             2^13 X 0.0698uSec [1/14.318MHz] = 8192 X 0.0698uSec =572.1uSec
             Timer = Counter x 572 uSec
         2. Note:
-            0.0698 uSec is too small to compute for hardware. So we multify a 
+            0.0698 uSec is too small to compute for hardware. So we multiply a 
             reference value(2^13) to make it big enough to compute for hardware.
         3. Note:
             The meaning of the TD0~TD3 are count of the clock. 
diff --git a/src/via_memcpy.c b/src/via_memcpy.c
index d933ba0..b00584b 100644
--- a/src/via_memcpy.c
+++ b/src/via_memcpy.c
@@ -581,12 +581,12 @@ viaVidCopyInit(char *copyType, ScreenPtr pScreen)
 
     if (VIAAllocLinear(&tmpFbBuffer, pScrn, alignSize + 31))
         return libc_YUV42X;
-    if (NULL == (buf2 = (unsigned char *)xalloc(testSize))) {
+    if (NULL == (buf2 = (unsigned char *)malloc(testSize))) {
         VIAFreeLinear(&tmpFbBuffer);
         return libc_YUV42X;
     }
-    if (NULL == (buf3 = (unsigned char *)xalloc(testSize))) {
-        xfree(buf2);
+    if (NULL == (buf3 = (unsigned char *)malloc(testSize))) {
+        free(buf2);
         VIAFreeLinear(&tmpFbBuffer);
         return libc_YUV42X;
     }
@@ -642,8 +642,8 @@ viaVidCopyInit(char *copyType, ScreenPtr pScreen)
                        curData->mName);
         }
     }
-    xfree(buf3);
-    xfree(buf2);
+    free(buf3);
+    free(buf2);
     VIAFreeLinear(&tmpFbBuffer);
     xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
                "Using %s YUV42X copy for %s.\n",
diff --git a/src/via_mode.c b/src/via_mode.c
index 7b84562..d7bd243 100644
--- a/src/via_mode.c
+++ b/src/via_mode.c
@@ -308,11 +308,14 @@ ViaDFPDetect(ScrnInfoPtr pScrn)
     xf86MonPtr          monPtr = NULL;
 
     if (pVia->pI2CBus2)
-        monPtr = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
+        monPtr = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus2, TRUE);
     
     if (monPtr) {
         xf86PrintEDID(monPtr);
         xf86SetDDCproperties(pScrn, monPtr);
+        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
+                   "DDC pI2CBus2 detected a %s\n", DIGITAL(monPtr->features.input_type) ?
+                   "DFP" : "CRT"));
         return TRUE;
     } else {
         return FALSE;
@@ -380,6 +383,7 @@ ViaOutputsDetect(ScrnInfoPtr pScrn)
         case VIA_CX700:
         case VIA_VX800:
         case VIA_VX855:
+        case VIA_VX900:
             if (ViaDFPDetect(pScrn)) {
                 pBIOSInfo->DfpPresent = TRUE;
                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -514,6 +518,7 @@ ViaOutputsSelect(ScrnInfoPtr pScrn)
                 case VIA_CX700:
                 case VIA_VX800:
                 case VIA_VX855:
+                case VIA_VX900:
                     pVia->pBIOSInfo->Lvds->IsActive = TRUE ;
                     break;
             }
@@ -859,6 +864,9 @@ ViaGetMemoryBandwidth(ScrnInfoPtr pScrn)
         case VIA_MEM_DDR533:
         case VIA_MEM_DDR667:
             return VIA_BW_DDR667;
+        case VIA_MEM_DDR800:
+        case VIA_MEM_DDR1066:
+            return VIA_BW_DDR1066;
         default:
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                        "ViaBandwidthAllowed: Unknown memory type: %d\n", pVia->MemClk);
@@ -999,8 +1007,8 @@ ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase)
         dn  = pll.params.dn;
         dm  = pll.params.dm;
 
-        /* The VX855 does not modify dm/dn, but earlier chipsets do. */
-        if (pVia->Chipset != VIA_VX855) {
+        /* The VX855 and VX900 do not modify dm/dn, but earlier chipsets do. */
+        if ((pVia->Chipset != VIA_VX855) && (pVia->Chipset != VIA_VX900)) {
             dm -= 2;
             dn -= 2;
         }
@@ -1078,7 +1086,7 @@ VIASetLCDMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
             pBIOSInfo->Clock = Table.InitTb.LCDClk_12Bit;
         else {
             pBIOSInfo->Clock = Table.InitTb.VClk_12Bit;
-            /* for some reason still to be defined this is neccessary */
+            /* for some reason still to be defined this is necessary */
             ViaSetSecondaryDotclock(pScrn, Table.InitTb.LCDClk_12Bit);
         }
     } else {
@@ -1708,7 +1716,7 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
         ViaModeSecondCRTC(pScrn, mode);
         ViaSecondDisplayChannelEnable(pScrn);
     }
-
+    
     if (pBIOSInfo->FirstCRTC->IsActive) {
         if (pBIOSInfo->CrtActive) {
             /* CRT on FirstCRTC */
@@ -1734,6 +1742,21 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
         ViaDisplayDisableCRT(pScrn);
     }
 
+    // Enable panel support on VM800, K8M800 and VX900 chipset
+    // See: https://bugs.launchpad.net/openchrome/+bug/186103
+    if (pBIOSInfo->Panel->IsActive &&
+       ((pVia->Chipset == VIA_VM800) ||
+        (pVia->Chipset == VIA_K8M800) || 
+        (pVia->Chipset == VIA_VX900) )) {
+        pBIOSInfo->FirstCRTC->IsActive=TRUE;
+        if (pVia->DDC1) {
+	    pBIOSInfo->SecondCRTC->IsActive=TRUE;
+        } else { 
+            //We need to disable the secondary to properly work XVideo on VX900
+            pBIOSInfo->SecondCRTC->IsActive=FALSE;
+        }
+        ViaModeFirstCRTC(pScrn, mode);
+    }
     if (pBIOSInfo->Simultaneous->IsActive) {
         ViaDisplayEnableSimultaneous(pScrn);
     } else {
diff --git a/src/via_mode.h b/src/via_mode.h
index 826df7f..4df3e23 100644
--- a/src/via_mode.h
+++ b/src/via_mode.h
@@ -32,8 +32,9 @@
  */
 #define VIA_BW_MIN       74000000 /* > 640x480@60Hz@32bpp */
 #define VIA_BW_DDR200   394000000
-#define VIA_BW_DDR400   498000000 /* > 1920x1080@60Hz@32bpp */
+#define VIA_BW_DDR400   553000000 /* > 1920x1200@60Hz@32bpp */
 #define VIA_BW_DDR667   922000000
+#define VIA_BW_DDR1066  922000000
 
 union pllparams {
     struct {
@@ -54,50 +55,50 @@ static struct ViaDotClock {
     CARD16 UniChrome;
     union pllparams UniChromePro;
 } ViaDotClocks[] = {
-    {  25200, 0x513C, /* 0xa79004 */ { 1, 4, 6, 169 } },
-    {  25312, 0xC763, /* 0xc49005 */ { 1, 4, 7, 198 } },
-    {  26591, 0x471A, /* 0xce9005 */ { 1, 4, 7, 208 } },
-    {  31500, 0xC558, /* 0xae9003 */ { 1, 4, 5, 176 } },
-    {  31704, 0x471F, /* 0xaf9002 */ { 1, 4, 4, 177 } },
-    {  32663, 0xC449, /* 0x479000 */ { 1, 4, 2,  73 } },
-    {  33750, 0x4721, /* 0x959002 */ { 1, 4, 4, 151 } },
-    {  35500, 0x5877, /* 0x759001 */ { 1, 4, 3, 119 } },
-    {  36000, 0x5879, /* 0x9f9002 */ { 1, 4, 4, 161 } },
-    {  39822, 0xC459, /* 0x578c02 */ { 1, 3, 4,  89 } },
-    {  40000, 0x515F, /* 0x848c04 */ { 1, 3, 6, 134 } },
-    {  41164, 0x4417, /* 0x2c8c00 */ { 1, 3, 2,  46 } },
-    {  46981, 0x5069, /* 0x678c02 */ { 1, 3, 4, 105 } },
-    {  49500, 0xC353, /* 0xa48c04 */ { 3, 3, 5, 138 } },
-    {  50000, 0xC354, /* 0x368c00 */ { 1, 3, 2,  56 } },
-    {  56300, 0x4F76, /* 0x3d8c00 */ { 1, 3, 2,  63 } },
-    {  57275,      0, /* 0x3e8c00 */ { 1, 3, 5, 157 } }, /* For XO 1.5 no need for a unichrome clock */
-    {  57284, 0x4E70, /* 0x3e8c00 */ { 1, 3, 2,  64 } },
-    {  64995, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } },
-    {  65000, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, /* Slightly unstable on PM800 */
-    {  65028, 0x866D, /* 0x6b8c01 */ { 1, 3, 3, 109 } },
-    {  74480, 0x156E, /* 0x288800 */ { 1, 2, 2,  42 } },
-    {  75000, 0x156E, /* 0x288800 */ { 1, 2, 2,  42 } },
-    {  78800, 0x442C, /* 0x2a8800 */ { 1, 2, 2,  44 } },
-    {  81135, 0x0622, /* 0x428801 */ { 1, 2, 3,  68 } },
-    {  81613, 0x4539, /* 0x708803 */ { 1, 2, 5, 114 } },
-    {  94500, 0x4542, /* 0x4d8801 */ { 1, 2, 3,  79 } },
-    { 108000, 0x0B53, /* 0x778802 */ { 1, 2, 4, 121 } },
-    { 108280, 0x4879, /* 0x778802 */ { 1, 2, 4, 121 } },
-    { 122000, 0x0D6F, /* 0x428800 */ { 1, 2, 2,  68 } },
-    { 122726, 0x073C, /* 0x878802 */ { 1, 2, 4, 137 } },
-    { 135000, 0x0742, /* 0x6f8801 */ { 1, 2, 3, 113 } },
-    { 148500, 0x0853, /* 0x518800 */ { 1, 2, 2,  83 } },
-    { 155800, 0x0857, /* 0x558402 */ { 1, 1, 4,  87 } }, 
-    { 157500, 0x422C, /* 0x2a8400 */ { 1, 1, 2,  44 } },
-    { 161793, 0x4571, /* 0x6f8403 */ { 1, 1, 5, 113 } }, 
-    { 162000, 0x0A71, /* 0x6f8403 */ { 1, 1, 5, 113 } },
-    { 175500, 0x4231, /* 0x2f8400 */ { 1, 1, 2,  49 } },
-    { 189000, 0x0542, /* 0x4d8401 */ { 1, 1, 3,  79 } },
-    { 202500, 0x0763, /* 0x6F8402 */ { 1, 1, 4, 113 } },
-    { 204800, 0x0764, /* 0x548401 */ { 1, 1, 3,  86 } },
-    { 218300, 0x043D, /* 0x3b8400 */ { 1, 1, 2,  61 } },
-    { 229500, 0x0660, /* 0x3e8400 */ { 1, 1, 2,  64 } }, /* Not tested on Pro } */
-    {      0,      0,                { 0, 0, 0,   0 } }
+    {  25200, 0x513C, /* 0xa79004 */ { { 1, 4, 6, 169 } } },
+    {  25312, 0xC763, /* 0xc49005 */ { { 1, 4, 7, 198 } } },
+    {  26591, 0x471A, /* 0xce9005 */ { { 1, 4, 7, 208 } } },
+    {  31500, 0xC558, /* 0xae9003 */ { { 1, 4, 5, 176 } } },
+    {  31704, 0x471F, /* 0xaf9002 */ { { 1, 4, 4, 177 } } },
+    {  32663, 0xC449, /* 0x479000 */ { { 1, 4, 2,  73 } } },
+    {  33750, 0x4721, /* 0x959002 */ { { 1, 4, 4, 151 } } },
+    {  35500, 0x5877, /* 0x759001 */ { { 1, 4, 3, 119 } } },
+    {  36000, 0x5879, /* 0x9f9002 */ { { 1, 4, 4, 161 } } },
+    {  39822, 0xC459, /* 0x578c02 */ { { 1, 3, 4,  89 } } },
+    {  40000, 0x515F, /* 0x848c04 */ { { 1, 3, 6, 134 } } },
+    {  41164, 0x4417, /* 0x2c8c00 */ { { 1, 3, 2,  46 } } },
+    {  46981, 0x5069, /* 0x678c02 */ { { 1, 3, 4, 105 } } },
+    {  49500, 0xC353, /* 0xa48c04 */ { { 3, 3, 5, 138 } } },
+    {  50000, 0xC354, /* 0x368c00 */ { { 1, 3, 2,  56 } } },
+    {  56300, 0x4F76, /* 0x3d8c00 */ { { 1, 3, 2,  63 } } },
+    {  57275,      0, /* 0x3e8c00 */ { { 1, 3, 5, 157 } } }, /* For XO 1.5 no need for a unichrome clock */
+    {  57284, 0x4E70, /* 0x3e8c00 */ { { 1, 3, 2,  64 } } },
+    {  64995, 0x0D3B, /* 0x6b8c01 */ { { 1, 3, 3, 109 } } },
+    {  65000, 0x0D3B, /* 0x6b8c01 */ { { 1, 3, 3, 109 } } }, /* Slightly unstable on PM800 */
+    {  65028, 0x866D, /* 0x6b8c01 */ { { 1, 3, 3, 109 } } },
+    {  74480, 0x156E, /* 0x288800 */ { { 1, 2, 2,  42 } } },
+    {  75000, 0x156E, /* 0x288800 */ { { 1, 2, 2,  42 } } },
+    {  78800, 0x442C, /* 0x2a8800 */ { { 1, 2, 2,  44 } } },
+    {  81135, 0x0622, /* 0x428801 */ { { 1, 2, 3,  68 } } },
+    {  81613, 0x4539, /* 0x708803 */ { { 1, 2, 5, 114 } } },
+    {  94500, 0x4542, /* 0x4d8801 */ { { 1, 2, 3,  79 } } },
+    { 108000, 0x0B53, /* 0x778802 */ { { 1, 2, 4, 121 } } },
+    { 108280, 0x4879, /* 0x778802 */ { { 1, 2, 4, 121 } } },
+    { 122000, 0x0D6F, /* 0x428800 */ { { 1, 2, 2,  68 } } },
+    { 122726, 0x073C, /* 0x878802 */ { { 1, 2, 4, 137 } } },
+    { 135000, 0x0742, /* 0x6f8801 */ { { 1, 2, 3, 113 } } },
+    { 148500, 0x0853, /* 0x518800 */ { { 1, 2, 2,  83 } } },
+    { 155800, 0x0857, /* 0x558402 */ { { 1, 1, 4,  87 } } }, 
+    { 157500, 0x422C, /* 0x2a8400 */ { { 1, 1, 2,  44 } } },
+    { 161793, 0x4571, /* 0x6f8403 */ { { 1, 1, 5, 113 } } }, 
+    { 162000, 0x0A71, /* 0x6f8403 */ { { 1, 1, 5, 113 } } },
+    { 175500, 0x4231, /* 0x2f8400 */ { { 1, 1, 2,  49 } } },
+    { 189000, 0x0542, /* 0x4d8401 */ { { 1, 1, 3,  79 } } },
+    { 202500, 0x0763, /* 0x6F8402 */ { { 1, 1, 4, 113 } } },
+    { 204800, 0x0764, /* 0x548401 */ { { 1, 1, 3,  86 } } },
+    { 218300, 0x043D, /* 0x3b8400 */ { { 1, 1, 2,  61 } } },
+    { 229500, 0x0660, /* 0x3e8400 */ { { 1, 1, 2,  64 } } }, /* Not tested on Pro } */
+    {      0,      0,                { { 0, 0, 0,   0 } } }
 };
 
 /*
@@ -131,7 +132,7 @@ static DisplayModeRec ViaPanelModes[] = {
     { MODEPREFIX("856x480"),    31704,  856,  872,  960, 1064, 0,  480,  480,  483,  497, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
     { MODEPREFIX("1024x512"),   41164, 1024, 1056, 1160, 1296, 0,  512,  512,  515,  531, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
     { MODEPREFIX("1024x576"),   46981, 1024, 1064, 1168, 1312, 0,  576,  576,  579,  597, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
-    { MODEPREFIX("1024x600"),   48960, 1024, 1064, 1168, 1312, 0,  600,  601,  604,  622, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
+    { MODEPREFIX("1024x600"),   48960, 1024, 1048, 1152, 1312, 0,  600,  601,  604,  630, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX },
     { MODEPREFIX("1024x768"),   65028, 1024, 1048, 1184, 1344, 0,  768,  770,  776,  806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX },
     { MODEPREFIX("1152x864"),   81613, 1152, 1216, 1336, 1520, 0,  864,  864,  867,  895, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX },
     { MODEPREFIX("1280x768"),   81135, 1280, 1328, 1440, 1688, 0,  768,  770,  776,  802, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX },
diff --git a/src/via_panel.c b/src/via_panel.c
index 2adc9fa..f6326ed 100644
--- a/src/via_panel.c
+++ b/src/via_panel.c
@@ -45,17 +45,17 @@ static ViaPanelModeRec ViaPanelNativeModes[] = {
     {1280, 768},
     {1280, 1024},
     {1400, 1050},
-    {1600, 1200},   /* 0x6 Resolution 1440x900 */
+    {1600, 1200},   /* 0x6 */
     {1280, 800},    /* 0x7 Resolution 1280x800 (Samsung NC20) */
     {800, 480},     /* 0x8 For Quanta 800x480 */
     {1024, 600},    /* 0x9 Resolution 1024x600 (for HP 2133) */
     {1366, 768},    /* 0xA Resolution 1366x768 */
     {1920, 1080},
     {1920, 1200},
-    {1280, 1024},   /* 0xD Need to be fixed to 1920x1200 */
-    {1440, 900},    /* 0xE Need to be fixed to 640x240 */
+    {1280, 1024},   /* 0xD */
+    {1440, 900},    /* 0xE */
     {1280, 720},    /* 0xF 480x640 */
-    {1200, 900},   /* 0x10 For Panasonic 1280x768 18bit Dual-Channel Panel */
+    {1200, 900},   /* 0x10 For OLPC 1.5 */
     {1360, 768},   /* 0x11 Resolution 1360X768 */
     {1024, 768},   /* 0x12 Resolution 1024x768 */
     {800, 480}     /* 0x13 General 8x4 panel use this setting */
@@ -147,6 +147,9 @@ ViaPanelScaleDisable(ScrnInfoPtr pScrn)
     vgaHWPtr hwp = VGAHWPTR(pScrn);
 
     ViaCrtcMask(hwp, 0x79, 0x00, 0x01);
+    /* Disable VX900 down scaling */
+    if (pVia->Chipset == VIA_VX900)
+        ViaCrtcMask(hwp, 0x89, 0x00, 0x01);
     if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400)
         ViaCrtcMask(hwp, 0xA2, 0x00, 0xC8);
 }
@@ -305,10 +308,7 @@ ViaPanelPreInit(ScrnInfoPtr pScrn)
         Bool ret;
 
         ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height);
-/*
-        if (!ret)
-            ret = ViaPanelGetSizeFromDDCv2(pScrn, &width);
-*/
+
         if (ret) {
             panel->NativeModeIndex = ViaPanelLookUpModeIndex(width, height);
             DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaPanelLookUpModeIndex, Width %d, Height %d, NativeModeIndex%d\n", width, height, panel->NativeModeIndex));
@@ -356,28 +356,28 @@ ViaPanelCenterMode(DisplayModePtr centerMode, DisplayModePtr panelMode,
 
 
 /*
- * Try to interprete EDID ourselves.
+ * Try to interpret EDID ourselves.
  */
 Bool
 ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
                         int *width, int *height)
 {
-    int i, max = 0, vsize;
+    int i, max_hsize = 0, vsize = 0;
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromEDID\n"));
 
     /* !!! Why are we not checking VESA modes? */
 
     /* checking standard timings */
-    for (i = 0; i < 8; i++)
+    for (i = 0; i < STD_TIMINGS; i++)
         if ((pMon->timings2[i].hsize > 256)
-            && (pMon->timings2[i].hsize > max)) {
-            max = pMon->timings2[i].hsize;
+            && (pMon->timings2[i].hsize > max_hsize)) {
+            max_hsize = pMon->timings2[i].hsize;
             vsize = pMon->timings2[i].vsize;
         }
 
-    if (max != 0) {
-        *width = max;
+    if (max_hsize != 0) {
+        *width = max_hsize;
         *height = vsize;
         return TRUE;
     }
@@ -392,14 +392,14 @@ ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
             struct detailed_timings timing = pMon->det_mon[i].section.d_timings;
 
             /* ignore v_active for now */
-            if ((timing.clock > 15000000) && (timing.h_active > max)) {
-                max = timing.h_active;
+            if ((timing.clock > 15000000) && (timing.h_active > max_hsize)) {
+                max_hsize = timing.h_active;
                 vsize = timing.v_active;
             }
         }
 
-    if (max != 0) {
-        *width = max;
+    if (max_hsize != 0) {
+        *width = max_hsize;
         *height = vsize;
         return TRUE;
     }
@@ -409,7 +409,6 @@ ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
 
 Bool
 ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height)
-
 {
     VIAPtr pVia = VIAPTR(pScrn);
     xf86MonPtr pMon;
@@ -419,7 +418,7 @@ ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height)
     if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0))
         return FALSE;
 
-    pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
+    pMon = xf86DoEEDID(pScrn->scrnIndex, pVia->pI2CBus2, TRUE);
     if (!pMon)
         return FALSE;
 
diff --git a/src/via_swov.c b/src/via_swov.c
index 6d37265..44e3232 100644
--- a/src/via_swov.c
+++ b/src/via_swov.c
@@ -65,6 +65,31 @@
 #define IN_VIDEO_DISPLAY     (*((unsigned long volatile *)(pVia->VidMapBase+V_FLAGS))&VBI_STATUS)
 #define VIA_FIRETIMEOUT 40000
 
+enum HQV_CME_Regs {
+        HQV_SDO_CTRL1,
+        HQV_SDO_CTRL2,
+        HQV_SDO_CTRL3,
+        HQV_SDO_CTRL4
+};
+
+/* register offsets for VT3553/VX800 */
+static const unsigned hqv_cme_regs[] = {
+    [HQV_SDO_CTRL1]  = HQV_SRC_DATA_OFFSET_CONTROL1,
+    [HQV_SDO_CTRL2]  = HQV_SRC_DATA_OFFSET_CONTROL2,
+    [HQV_SDO_CTRL3]  = HQV_SRC_DATA_OFFSET_CONTROL3,
+    [HQV_SDO_CTRL4]  = HQV_SRC_DATA_OFFSET_CONTROL4
+};
+
+/* register hqv offsets for new VT3409/VX855 */
+static const unsigned hqv_cme_regs_409[] = {
+    [HQV_SDO_CTRL1]  = HQV_SRC_DATA_OFFSET_CTRL1_409,
+    [HQV_SDO_CTRL2]  = HQV_SRC_DATA_OFFSET_CTRL2_409,
+    [HQV_SDO_CTRL3]  = HQV_SRC_DATA_OFFSET_CTRL3_409,
+    [HQV_SDO_CTRL4]  = HQV_SRC_DATA_OFFSET_CTRL4_409
+};
+
+#define HQV_CME_REG(HWDiff, name) (HWDiff)->HQVCmeRegs[name]
+
 static void
 viaWaitVideoCommandFire(VIAPtr pVia)
 {
@@ -88,6 +113,7 @@ viaWaitHQVFlip(VIAPtr pVia)
 {
     unsigned long proReg = 0;
     CARD32 volatile *pdwState;
+    unsigned count = 50000;
 
     if (pVia->ChipId == PCI_CHIP_VT3259
         && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
@@ -96,10 +122,9 @@ viaWaitHQVFlip(VIAPtr pVia)
     pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
 
     if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
-        // while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ;
-	while (*pdwState & HQV_SUBPIC_FLIP);
+		while (--count && (*pdwState & HQV_SUBPIC_FLIP));
     } else {
-        while (!(*pdwState & HQV_FLIP_STATUS)) ;
+        while (--count && !(*pdwState & HQV_FLIP_STATUS)) ;
     }
 }
 
@@ -109,8 +134,9 @@ viaWaitHQVFlipClear(VIAPtr pVia, unsigned long dwData)
     CARD32 volatile *pdwState =
             (CARD32 volatile *)(pVia->VidMapBase + HQV_CONTROL);
     *pdwState = dwData;
+    unsigned count = 50000;
 
-    while ((*pdwState & HQV_FLIP_STATUS)) {
+    while (--count && (*pdwState & HQV_FLIP_STATUS)) {
         VIDOutD(HQV_CONTROL, *pdwState | HQV_FLIP_STATUS);
     }
 }
@@ -126,6 +152,7 @@ viaWaitHQVDone(VIAPtr pVia)
 {
     CARD32 volatile *pdwState;
     unsigned long proReg = 0;
+    unsigned count = 50000;
 
     if (pVia->ChipId == PCI_CHIP_VT3259
         && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
@@ -133,7 +160,7 @@ viaWaitHQVDone(VIAPtr pVia)
 
     pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
     if (pVia->swov.MPEG_ON) {
-        while ((*pdwState & HQV_SW_FLIP)) ;
+        while (--count && (*pdwState & HQV_SW_FLIP)) ;
     }
 }
 
@@ -179,12 +206,14 @@ ResetVidRegBuffer(VIAPtr pVia)
 static void
 SaveVideoRegister(VIAPtr pVia, CARD32 index, CARD32 data)
 {
+    if (pVia->VidRegCursor >= VIDREG_BUFFER_SIZE) {
+        DBG_DD(ErrorF("SaveVideoRegister: Out of video register space flushing"));
+        FlushVidRegBuffer(pVia);
+        ResetVidRegBuffer(pVia);
+    }
+
     pVia->VidRegBuffer[pVia->VidRegCursor++] = index;
     pVia->VidRegBuffer[pVia->VidRegCursor++] = data;
-
-    if (pVia->VidRegCursor > VIDREG_BUFFER_SIZE) {
-        DBG_DD(ErrorF("SaveVideoRegister: Out of video register space"));
-    }
 }
 
 /*
@@ -224,6 +253,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
                 HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
                 HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
             }
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
             break;
         case VIA_KM400:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -232,6 +262,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
             break;
         case VIA_K8M800:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -240,6 +271,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
             break;
         case VIA_PM800:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -248,6 +280,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs;
             break;
         case VIA_VM800:
         case VIA_P4M900:
@@ -257,6 +291,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs;
             break;
         case VIA_K8M890:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -265,6 +301,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_TRUE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs;
             break;
         case VIA_P4M890:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -273,6 +311,8 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_TRUE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs;
             break;
         case VIA_CX700:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
@@ -281,15 +321,29 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_FALSE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs;
             break;
         case VIA_VX800:
+            HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
+            HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
+            HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
+            HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
+            HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
+            HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_TRUE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs;
+            break;
         case VIA_VX855:
+        case VIA_VX900:
             HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
             HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
             HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
             HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
             HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
             HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+            HWDiff->dwNewScaleCtl = VID_HWDIFF_TRUE;
+            HWDiff->HQVCmeRegs = hqv_cme_regs_409;
             break;
         default:
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -339,6 +393,7 @@ viaOverlayGetV1V3Format(VIAPtr pVia, int vport, /* 1 or 3, as in V1 or V3 */
     if (videoFlag & VIDEO_HQV_INUSE) {
         switch (pVia->swov.SrcFourCC) {
             case FOURCC_YV12:
+            case FOURCC_I420:
             case FOURCC_XVMC:
                 *pHQVCtl |= HQV_YUV420;
                 break;
@@ -368,6 +423,7 @@ viaOverlayGetV1V3Format(VIAPtr pVia, int vport, /* 1 or 3, as in V1 or V3 */
     } else {
         switch (pVia->swov.SrcFourCC) {
             case FOURCC_YV12:
+            case FOURCC_I420:
             case FOURCC_XVMC:
                 if (vport == 1) {
                     *pVidCtl |= V1_YCbCr420;
@@ -450,6 +506,7 @@ viaOverlayGetSrcStartAddress(VIAPtr pVia,
                 break;
 
             case FOURCC_YV12:
+            case FOURCC_I420:
             case FOURCC_XVMC:
 
                 if (videoFlag & VIDEO_HQV_INUSE)
@@ -509,10 +566,12 @@ viaOverlayHQVCalcZoomWidth(VIAPtr pVia,
                            unsigned long *pMiniCtl,
                            unsigned long *pHQVfilterCtl,
                            unsigned long *pHQVminiCtl,
+                           unsigned long *pHQVscaleCtlH,
                            unsigned long *pHQVzoomflag)
 {
     unsigned long tmp, sw1, d, falign, mdiv;
     Bool zoom_ok = TRUE;
+    VIAHWDiff *hwDiff = &pVia->HWDiff;
 
     CARD32 HQVfilter[5] = { HQV_H_FILTER_DEFAULT, HQV_H_TAP4_121,
         HQV_H_TAP4_121, HQV_H_TAP8_12221, HQV_H_TAP8_12221
@@ -525,24 +584,57 @@ viaOverlayHQVCalcZoomWidth(VIAPtr pVia,
     if (srcWidth == dstWidth) { /* No zoom */
         *pHQVfilterCtl |= HQV_H_FILTER_DEFAULT;
     } else if (srcWidth < dstWidth) { /* Zoom in */
-
-        tmp = srcWidth * 0x800 / dstWidth;
-        *pZoomCtl = ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
-        *pMiniCtl |= V1_X_INTERPOLY;
-        zoom_ok = !(tmp > 0x7ff);
-
-        *pHQVzoomflag = 1;
-        *pHQVfilterCtl |= HQV_H_FILTER_DEFAULT;
-
+			*pZoomCtl &= 0x0000FFFF;
+	        tmp = srcWidth * 0x800 / dstWidth;
+	        *pZoomCtl |= ((tmp & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
+	        *pMiniCtl |= V1_X_INTERPOLY;
+	        zoom_ok = !(tmp > 0x7ff);
+
+	        *pHQVzoomflag = 1;
+	        *pHQVfilterCtl |= HQV_H_FILTER_DEFAULT;
     } else { /* srcWidth > dstWidth - Zoom out */
+		if (hwDiff->dwNewScaleCtl) {
+            if (srcWidth > (dstWidth << 3)) {
+                /*<1/8*/
+                /*FIXME!*/
+                if (dstWidth <= 32) {
+                    dstWidth = 33;
+                }
+                if (srcWidth > (dstWidth << 5)) {
+                    tmp = 1 * 0x1000 / 31;
+                } else {
+                    tmp = (dstWidth * 0x1000) / srcWidth;
+                }
+
+                *pHQVscaleCtlH = HQV_H_SCALE_DOWN_UNDER_EIGHTH;
+            } else if (srcWidth == (dstWidth << 3)) {
+                /*1/8*/
+                tmp = ((dstWidth - 1) * 0x1000) / srcWidth;
+                *pHQVscaleCtlH = HQV_H_SCALE_DOWN_UNDER_EIGHTH;
+            } else if (srcWidth > (dstWidth << 2)) {
+                /*1/4 -1/8 zoom-out*/
+                tmp = (srcWidth * 0x1000) / dstWidth;
+                *pHQVscaleCtlH = HQV_H_SCALE_DOWN_FOURTH_TO_EIGHTH;
+            } else {
+                /*1-1/4 zoom-out*/
+                /*setting :src/(destination+0.5)*/
+                tmp = (srcWidth * 0x2000) / ((dstWidth << 1) + 1);
+                *pHQVscaleCtlH = HQV_H_SCALE_DOWN_FOURTH_TO_1;
+            }
 
-        /* HQV rounding patch, instead of:
-         * //tmp = dstWidth*0x0800 / srcWidth; */
-        tmp = dstWidth * 0x800 * 0x400 / srcWidth;
-        tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
+            /*rounding to nearest interger*/
+            tmp += (((tmp * 0x1000) & 0xfff) > 1) ? 1 : 0;
+            *pHQVscaleCtlH |= (tmp & 0x7fff) | HQV_H_SCALE_ENABLE;
+		} else {
+	        /* HQV rounding patch, instead of:
+	         * //tmp = dstWidth*0x0800 / srcWidth; */
+	        tmp = dstWidth * 0x800 * 0x400 / srcWidth;
+	        tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
 
-        *pHQVminiCtl = (tmp & 0x7ff) | HQV_H_MINIFY_ENABLE | HQV_H_MINIFY_DOWN;
+	        *pHQVminiCtl = (tmp & 0x7ff) | HQV_H_MINIFY_ENABLE | HQV_H_MINIFY_DOWN;
 
+	        *pHQVminiCtl |= HQV_HDEBLOCK_FILTER;
+		}
         /* Scale down the picture by a factor mdiv = (1 << d) = {2, 4, 8 or 16} */
 
         sw1 = srcWidth;
@@ -561,27 +653,25 @@ viaOverlayHQVCalcZoomWidth(VIAPtr pVia,
         *pMiniCtl |= ((d << 1) - 1) << 24; /* <= {1,3,5,7} << 24 */
 
         *pHQVfilterCtl |= HQVfilter[d];
-        /* *pHQVminiCtl = HQVmini[d]; */
-        *pHQVminiCtl |= HQV_HDEBLOCK_FILTER;
 
-        /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
+       	/* Scale to arbitrary size, on top of previous scaling by (1 << d). */
 
-        if (sw1 < dstWidth) {
-            /* CLE bug
-             *pZoomCtl = sw1 * 0x0800 / dstWidth;*/
-            *pZoomCtl = (sw1 - 2) * 0x0800 / dstWidth;
-            *pZoomCtl = ((*pZoomCtl & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
-        }
-    }
+       	if (sw1 < dstWidth) {
+            	/* CLE bug
+           	*pZoomCtl = sw1 * 0x0800 / dstWidth;*/
+           	*pZoomCtl = (sw1 - 2) * 0x0800 / dstWidth;
+           	*pZoomCtl = ((*pZoomCtl & 0x7ff) << 16) | V1_X_ZOOM_ENABLE;
+   		}
 
-    if (videoFlag & VIDEO_1_INUSE) {
-        pVia->swov.overlayRecordV1.dwFetchAlignment = falign;
-        pVia->swov.overlayRecordV1.dwminifyH = mdiv;
-    } else {
-        pVia->swov.overlayRecordV3.dwFetchAlignment = falign;
-        pVia->swov.overlayRecordV3.dwminifyH = mdiv;
-    }
+    	if (videoFlag & VIDEO_1_INUSE) {
+        	pVia->swov.overlayRecordV1.dwFetchAlignment = falign;
+        	pVia->swov.overlayRecordV1.dwminifyH = mdiv;
+    	} else {
+        	pVia->swov.overlayRecordV3.dwFetchAlignment = falign;
+        	pVia->swov.overlayRecordV3.dwminifyH = mdiv;
+    	}
 
+	}
     return zoom_ok;
 }
 
@@ -591,10 +681,12 @@ viaOverlayHQVCalcZoomHeight(VIAPtr pVia,
                             unsigned long *pZoomCtl, unsigned long *pMiniCtl,
                             unsigned long *pHQVfilterCtl,
                             unsigned long *pHQVminiCtl,
+                            unsigned long *pHQVscaleCtlV,
                             unsigned long *pHQVzoomflag)
 {
     unsigned long tmp, sh1, d;
     Bool zoom_ok = TRUE;
+    VIAHWDiff *hwDiff = &pVia->HWDiff;
 
     CARD32 HQVfilter[5] = { HQV_V_TAP4_121, HQV_V_TAP4_121, HQV_V_TAP4_121,
                             HQV_V_TAP8_12221, HQV_V_TAP8_12221 };
@@ -608,48 +700,58 @@ viaOverlayHQVCalcZoomHeight(VIAPtr pVia,
     if (srcHeight == dstHeight) { /* No zoom */
         *pHQVfilterCtl |= HQV_V_TAP4_121;
     } else if (srcHeight < dstHeight) { /* Zoom in */
+		*pZoomCtl &= 0xFFFF0000;
+	    tmp = srcHeight * 0x400 / dstHeight - 1;
+	    *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
+	    *pMiniCtl |= (V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY);
 
-        tmp = srcHeight * 0x0400 / dstHeight;
-        *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
-        *pMiniCtl |= (V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY);
-
-        *pHQVzoomflag = 1;
-        *pHQVfilterCtl |= HQV_V_TAP4_121;
+	    *pHQVzoomflag = 1;
+	    *pHQVfilterCtl |= HQV_V_TAP4_121;
     } else { /* srcHeight > dstHeight - Zoom out */
+		if (hwDiff->dwNewScaleCtl) {
+            /*setting :src/(destination+0.5)*/
+            tmp = srcHeight * 0x2000 / ((dstHeight << 1) + 1);
+            tmp += (((tmp * 0x1000) & 0xfff) > 1) ? 1 : 0;
+            if ((tmp & 0x1ffff) == 0) {
+                tmp = 0x1ffff;
+            }
 
-        /* HQV rounding patch, instead of:
-         * //tmp = dstHeight*0x0800 / srcHeight; */
-        tmp = dstHeight * 0x0800 * 0x400 / srcHeight;
-        tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
-        *pHQVminiCtl |= (((tmp & 0x7ff) << 16) | HQV_V_MINIFY_ENABLE
-                         | HQV_V_MINIFY_DOWN);
-
-        /* Scale down the picture by a factor (1 << d) = {2, 4, 8 or 16} */
-
-        sh1 = srcHeight;
-        for (d = 1; d < 5; d++) {
-            sh1 >>= 1;
-            if (sh1 <= dstHeight)
-                break;
-        }
-        if (d == 5) { /* Too small. */
-            d = 4;
-            zoom_ok = FALSE;
-        }
-
-        *pMiniCtl |= ((d << 1) - 1) << 16; /* <= {1,3,5,7} << 16 */
-
-        *pHQVfilterCtl |= HQVfilter[d];
-        /* *pHQVminiCtl |= HQVmini[d]; */
-        *pHQVminiCtl |= HQV_VDEBLOCK_FILTER;
-
-        /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
-
-        if (sh1 < dstHeight) {
-            tmp = sh1 * 0x0400 / dstHeight;
-            *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
-            *pMiniCtl |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
-        }
+            *pHQVscaleCtlV = (tmp & 0x1ffff) | HQV_V_SCALE_ENABLE| HQV_V_SCALE_DOWN;
+		} else {
+	        /* HQV rounding patch, instead of:
+	         * //tmp = dstHeight*0x0800 / srcHeight; */
+	        tmp = dstHeight * 0x0800 * 0x400 / srcHeight;
+	        tmp = tmp / 0x400 + ((tmp & 0x3ff) ? 1 : 0);
+	        *pHQVminiCtl |= (((tmp & 0x7ff) << 16) | HQV_V_MINIFY_ENABLE
+	                         | HQV_V_MINIFY_DOWN);
+
+	        /* Scale down the picture by a factor (1 << d) = {2, 4, 8 or 16} */
+	
+	        sh1 = srcHeight;
+	        for (d = 1; d < 5; d++) {
+	            sh1 >>= 1;
+	            if (sh1 <= dstHeight)
+	                break;
+	        }
+	        if (d == 5) { /* Too small. */
+	            d = 4;
+	            zoom_ok = FALSE;
+	        }
+
+	        *pMiniCtl |= ((d << 1) - 1) << 16; /* <= {1,3,5,7} << 16 */
+
+	        *pHQVfilterCtl |= HQVfilter[d];
+	        /* *pHQVminiCtl |= HQVmini[d]; */
+	        *pHQVminiCtl |= HQV_VDEBLOCK_FILTER;
+
+	        /* Scale to arbitrary size, on top of previous scaling by (1 << d). */
+
+	        if (sh1 < dstHeight) {
+	            tmp = sh1 * 0x0400 / dstHeight;
+	            *pZoomCtl |= ((tmp & 0x3ff) | V1_Y_ZOOM_ENABLE);
+	            *pMiniCtl |= V1_Y_INTERPOLY | V1_YCBCR_INTERPOLY;
+	        }
+		}
     }
 
     return zoom_ok;
@@ -665,6 +767,7 @@ viaOverlayGetFetch(VIAPtr pVia, unsigned long videoFlag,
 
     switch (pVia->swov.SrcFourCC) {
         case FOURCC_YV12:
+        case FOURCC_I420:
         case FOURCC_XVMC:
             n = 0; /* 2^n = 1 byte per pixel (Y channel in planar YUV) */
             break;
@@ -787,6 +890,7 @@ viaCalculateVideoColor(VIAPtr pVia, int hue, int saturation,
         case PCI_CHIP_VT3327:
         case PCI_CHIP_VT3353:
         case PCI_CHIP_VT3409:
+        case PCI_CHIP_VT3410:
             model = 0;
             break;
         case PCI_CHIP_CLE3122:
@@ -926,6 +1030,7 @@ viaSetColorSpace(VIAPtr pVia, int hue, int saturation, int brightness,
         case PCI_CHIP_VT3364:
         case PCI_CHIP_VT3353:
         case PCI_CHIP_VT3409:
+        case PCI_CHIP_VT3410:
         case PCI_CHIP_CLE3122:
             VIDOutD(V1_ColorSpaceReg_2, col2);
             VIDOutD(V1_ColorSpaceReg_1, col1);
@@ -956,6 +1061,7 @@ ViaInitVideoStatusFlag(VIAPtr pVia)
         case PCI_CHIP_VT3364:
         case PCI_CHIP_VT3353:
         case PCI_CHIP_VT3409:
+        case PCI_CHIP_VT3410:
             return (VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE
                     | VIDEO_ACTIVE | VIDEO_SHOW);
         case PCI_CHIP_CLE3122:
@@ -996,6 +1102,7 @@ ViaSetVidCtl(VIAPtr pVia, unsigned int videoFlag)
             case PCI_CHIP_VT3353:
                 return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336;
             case PCI_CHIP_VT3409:
+            case PCI_CHIP_VT3410:
                 return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3409;
             case PCI_CHIP_CLE3122:
                 if (CLE266_REV_IS_CX(pVia->ChipRev))
@@ -1048,7 +1155,8 @@ AddHQVSurface(ScrnInfoPtr pScrn, unsigned int numbuf, CARD32 fourcc)
         !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
         proReg = PRO_HQV1_OFFSET;
 
-    isplanar = ((fourcc == FOURCC_YV12) || (fourcc == FOURCC_XVMC));
+    isplanar = ((fourcc == FOURCC_YV12) || (fourcc == FOURCC_I420) ||
+				(fourcc == FOURCC_XVMC));
 
     width = pVia->swov.SWDevice.gdwSWSrcWidth;
     height = pVia->swov.SWDevice.gdwSWSrcHeight;
@@ -1091,6 +1199,7 @@ CreateSurface(ScrnInfoPtr pScrn, CARD32 FourCC, CARD16 Width,
     isplanar = FALSE;
     switch (FourCC) {
         case FOURCC_YV12:
+        case FOURCC_I420:
         case FOURCC_XVMC:
             isplanar = TRUE;
             pitch = ALIGN_TO(Width, 32);
@@ -1183,9 +1292,10 @@ ViaSwovSurfaceCreate(ScrnInfoPtr pScrn, viaPortPrivPtr pPriv,
             break;
 
         case FOURCC_YV12:
+        case FOURCC_I420:
             retCode = CreateSurface(pScrn, FourCC, Width, Height, TRUE);
             if (retCode == Success)
-                retCode = AddHQVSurface(pScrn, numbuf, FOURCC_YV12);
+                retCode = AddHQVSurface(pScrn, numbuf, FourCC);
             break;
 
         case FOURCC_XVMC:
@@ -1247,6 +1357,7 @@ ViaSwovSurfaceDestroy(ScrnInfoPtr pScrn, viaPortPrivPtr pPriv)
                 break;
 
             case FOURCC_YV12:
+            case FOURCC_I420:
                 VIAFreeLinear(&pVia->swov.SWfbMem);
             case FOURCC_XVMC:
                 pVia->swov.SrcFourCC = 0;
@@ -1282,6 +1393,7 @@ SetFIFO_V3(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold)
         case PCI_CHIP_VT3327:
         case PCI_CHIP_VT3353:
         case PCI_CHIP_VT3409:
+        case PCI_CHIP_VT3410:
             SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL,
                               (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK)
                                | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8));
@@ -1347,6 +1459,7 @@ SetFIFO_V3_64or32or32(VIAPtr pVia)
         case PCI_CHIP_VT3364:
         case PCI_CHIP_VT3353:
         case PCI_CHIP_VT3409:
+        case PCI_CHIP_VT3410:
             SetFIFO_V3(pVia, 225, 200, 250);
             break;
         case PCI_CHIP_VT3204:
@@ -1380,6 +1493,7 @@ SetFIFO_V3_64or32or16(VIAPtr pVia)
         case PCI_CHIP_VT3364:
         case PCI_CHIP_VT3353:
         case PCI_CHIP_VT3409:
+        case PCI_CHIP_VT3410:
             SetFIFO_V3(pVia, 225, 200, 250);
             break;
         case PCI_CHIP_VT3204:
@@ -1411,6 +1525,7 @@ SetupFIFOs(VIAPtr pVia, unsigned long videoFlag,
 {
     if (miniCtl & V1_Y_INTERPOLY) {
         if (pVia->swov.SrcFourCC == FOURCC_YV12
+			|| pVia->swov.SrcFourCC == FOURCC_I420
             || pVia->swov.SrcFourCC == FOURCC_XVMC) {
             if (videoFlag & VIDEO_HQV_INUSE) {
                 if (videoFlag & VIDEO_1_INUSE)
@@ -1444,6 +1559,7 @@ SetupFIFOs(VIAPtr pVia, unsigned long videoFlag,
         }
     } else {
         if (pVia->swov.SrcFourCC == FOURCC_YV12
+			|| pVia->swov.SrcFourCC == FOURCC_I420
             || pVia->swov.SrcFourCC == FOURCC_XVMC) {
             if (videoFlag & VIDEO_HQV_INUSE) {
                 if (videoFlag & VIDEO_1_INUSE)
@@ -1488,6 +1604,7 @@ SetColorKey(VIAPtr pVia, unsigned long videoFlag,
 
     if (videoFlag & VIDEO_1_INUSE) {
         SaveVideoRegister(pVia, V_COLOR_KEY, keyLow);
+        SaveVideoRegister(pVia, SND_COLOR_KEY, keyLow);
     } else {
         if (pVia->HWDiff.dwSupportTwoColorKey)    /*CLE_C0 */
             SaveVideoRegister(pVia, V3_COLOR_KEY, keyLow);
@@ -1561,8 +1678,9 @@ SetHQVFetch(VIAPtr pVia, CARD32 srcFetch, unsigned long srcHeight)
         srcFetch >>= 3;  /* fetch unit is 8 bytes */
     }
 
-    SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
-                      ((srcFetch - 1) << 16) | (srcHeight - 1));
+    if ((pVia->ChipId != PCI_CHIP_VT3409) && (pVia->ChipId != PCI_CHIP_VT3410))
+        SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
+                          ((srcFetch - 1) << 16) | (srcHeight - 1));
 }
 
 static void
@@ -1713,13 +1831,14 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
     unsigned long zoomCtl = 0, miniCtl = 0;
     unsigned long hqvCtl = 0;
     unsigned long hqvFilterCtl = 0, hqvMiniCtl = 0;
+    unsigned long hqvScaleCtlH = 0, hqvScaleCtlV = 0;
     unsigned long haveHQVzoomH = 0, haveHQVzoomV = 0;
     unsigned long hqvSrcWidth = 0, hqvDstWidth = 0;
     unsigned long hqvSrcFetch = 0, hqvOffset = 0;
     unsigned long dwOffset = 0, fetch = 0, tmp = 0;
     unsigned long proReg = 0;
 
-    DBG_DD(ErrorF("videoflag=%p\n", videoFlag));
+    DBG_DD(ErrorF("videoflag=%ld\n", videoFlag));
 
     if (pVia->ChipId == PCI_CHIP_VT3259 && !(videoFlag & VIDEO_1_INUSE))
         proReg = PRO_HQV1_OFFSET;
@@ -1762,16 +1881,16 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
 
     /* 
      * FIXME:
-     * Enable video on secondary 
+     * Enable video on secondary (change Panel to SecondCRTC?)
      */
     if ((pVia->VideoEngine == VIDEO_ENGINE_CME
          || pVia->Chipset == VIA_VM800)
-        && pVia->pBIOSInfo->Panel->IsActive) {
+        &&  (pBIOSInfo->SecondCRTC->IsActive==TRUE)) {
 
-        /* V1_ON_SND_DISPLAY */
-        vidCtl |= 0x80000000;
+        /* VAL_VIDEO_ON_SND_DISPLAY */
+        vidCtl |= V1_ON_SND_DISPLAY;
         /* SECOND_DISPLAY_COLOR_KEY_ENABLE */
-        compose |= 0x00010000 | 0x1;
+        compose |= SECOND_DISPLAY_COLOR_KEY_ENABLE | 0x1;
     }
 
     viaOverlayGetV1V3Format(pVia, (videoFlag & VIDEO_1_INUSE) ? 1 : 3,
@@ -1790,6 +1909,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
     pVia->swov.overlayRecordV1.dwOffset = dwOffset;
 
     if (pVia->swov.SrcFourCC == FOURCC_YV12
+		|| pVia->swov.SrcFourCC == FOURCC_I420
         || pVia->swov.SrcFourCC == FOURCC_XVMC) {
 
         YCBCRREC YCbCr;
@@ -1882,6 +2002,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
             SetHQVFetch(pVia, hqvSrcFetch, oriSrcHeight);
 
         if (pVia->swov.SrcFourCC == FOURCC_YV12
+            || pVia->swov.SrcFourCC == FOURCC_I420
             || pVia->swov.SrcFourCC == FOURCC_XVMC) {
             if (videoFlag & VIDEO_1_INUSE)
                 SaveVideoRegister(pVia, V1_STRIDE, srcPitch << 1);
@@ -1938,7 +2059,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
 
     if (!viaOverlayHQVCalcZoomWidth(pVia, videoFlag, srcWidth, dstWidth,
                                     &zoomCtl, &miniCtl, &hqvFilterCtl,
-                                    &hqvMiniCtl, &haveHQVzoomH)) {
+                                    &hqvMiniCtl, &hqvScaleCtlH, &haveHQVzoomH)) {
         /* Need to scale (minify) too much - can't handle it. */
         SetFetch(pVia, videoFlag, fetch);
         FireVideoCommand(pVia, videoFlag, compose);
@@ -1977,7 +2098,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
 
     if (!viaOverlayHQVCalcZoomHeight(pVia, srcHeight, dstHeight, &zoomCtl,
                                      &miniCtl, &hqvFilterCtl, &hqvMiniCtl,
-                                     &haveHQVzoomV)) {
+                                     &hqvScaleCtlV, &haveHQVzoomV)) {
         /* Need to scale (minify) too much - can't handle it. */
         FireVideoCommand(pVia, videoFlag, compose);
         FlushVidRegBuffer(pVia);
@@ -2021,8 +2142,13 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
                 hqvFilterCtl &= 0xfffdffff;
             SetMiniAndZoom(pVia, videoFlag, 0, 0);
         }
-        SaveVideoRegister(pVia, HQV_MINIFY_CONTROL + proReg, hqvMiniCtl);
-        SaveVideoRegister(pVia, HQV_FILTER_CONTROL + proReg, hqvFilterCtl);
+		if (hwDiff->dwNewScaleCtl) {
+        	SaveVideoRegister(pVia, HQV_H_SCALE_CONTROL + proReg, hqvScaleCtlH);
+        	SaveVideoRegister(pVia, HQV_V_SCALE_CONTROL + proReg, hqvScaleCtlV);
+		} else {
+        	SaveVideoRegister(pVia, HQV_MINIFY_CONTROL + proReg, hqvMiniCtl);
+		}
+       	SaveVideoRegister(pVia, HQV_FILTER_CONTROL + proReg, hqvFilterCtl);
     } else
         SetMiniAndZoom(pVia, videoFlag, miniCtl, zoomCtl);
 
@@ -2035,11 +2161,36 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
                                miniCtl, compose);
 
     if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
-        VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0);
-        VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
-        if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
-            VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0);
-            VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+        SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL1),0);
+        SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL3),((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+        if ((pVia->Chipset == VIA_VX800) || 
+            (pVia->Chipset == VIA_VX855) || 
+            (pVia->Chipset == VIA_VX900)) {
+            SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL2),0);
+            SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL4),((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+            if ((pVia->Chipset == VIA_VX855) ||
+                (pVia->Chipset == VIA_VX900)) {
+                SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL1,0);
+                SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+                SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL2,0);
+                SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+                SaveVideoRegister(pVia, HQV_BACKGROUND_DATA_OFFSET,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+                SaveVideoRegister(pVia, HQV_EXTENDED_CONTROL,0);
+                /*0x3e0*/
+                SaveVideoRegister(pVia, HQV_SUBP_HSCALE_CTRL,0);
+                /*0x3e8*/
+                SaveVideoRegister(pVia, HQV_SUBP_VSCALE_CTRL,0);
+            }
+
+            if (pVia->Chipset == VIA_VX900) {
+
+                SaveVideoRegister(pVia, HQV_SHARPNESS_DECODER_HANDSHAKE_CTRL_410, 0);        
+            }
+
+            // TODO Need to be tested on VX800
+            /* 0x3B8 */
+            SaveVideoRegister(pVia, HQV_DEFAULT_VIDEO_COLOR, HQV_FIX_COLOR);
+    
         }
     }
 
@@ -2075,9 +2226,6 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
                     usleep(1);
                 }
 
-                if (pVia->VideoEngine == VIDEO_ENGINE_CME)
-                    hqvCtl |= HQV_GEN_IRQ;
-
                 VIDOutD(HQV_CONTROL + proReg, hqvCtl & ~HQV_SW_FLIP);
                 VIDOutD(HQV_CONTROL + proReg, hqvCtl | HQV_SW_FLIP);
 
@@ -2189,6 +2337,7 @@ VIAVidUpdateOverlay(ScrnInfoPtr pScrn, LPDDUPDATEOVERLAY pUpdate)
         (pVia->swov.SrcFourCC == FOURCC_RV16) ||
         (pVia->swov.SrcFourCC == FOURCC_RV32) ||
         (pVia->swov.SrcFourCC == FOURCC_YV12) ||
+        (pVia->swov.SrcFourCC == FOURCC_I420) ||
         (pVia->swov.SrcFourCC == FOURCC_XVMC)) {
         videoFlag = pVia->swov.gdwVideoFlagSW;
     }
@@ -2263,6 +2412,7 @@ VIAVidUpdateOverlay(ScrnInfoPtr pScrn, LPDDUPDATEOVERLAY pUpdate)
         (pVia->swov.SrcFourCC == FOURCC_RV16) ||
         (pVia->swov.SrcFourCC == FOURCC_RV32) ||
         (pVia->swov.SrcFourCC == FOURCC_YV12) ||
+        (pVia->swov.SrcFourCC == FOURCC_I420) ||
         (pVia->swov.SrcFourCC == FOURCC_XVMC)) {
         pVia->swov.SWDevice.gdwSWDstLeft = pUpdate->DstLeft + panDX;
         pVia->swov.SWDevice.gdwSWDstTop = pUpdate->DstTop + panDY;
@@ -2322,6 +2472,7 @@ ViaOverlayHide(ScrnInfoPtr pScrn)
         (pVia->swov.SrcFourCC == FOURCC_RV16) ||
         (pVia->swov.SrcFourCC == FOURCC_RV32) ||
         (pVia->swov.SrcFourCC == FOURCC_YV12) ||
+        (pVia->swov.SrcFourCC == FOURCC_I420) ||
         (pVia->swov.SrcFourCC == FOURCC_XVMC))
         videoFlag = pVia->swov.gdwVideoFlagSW;
 
diff --git a/src/via_swov.h b/src/via_swov.h
index d93aa83..5d735a7 100644
--- a/src/via_swov.h
+++ b/src/via_swov.h
@@ -53,7 +53,7 @@ typedef struct __VIAHWDiff
 {
     unsigned long dwThreeHQVBuffer;    /* Use Three HQV Buffers */
     /* unsigned long dwV3SrcHeightSetting; *//* Set Video Source Width and Height */
-    /* unsigned long dwSupportExtendFIFO; *//* Support Extand FIFO */
+    /* unsigned long dwSupportExtendFIFO; *//* Support Extend FIFO */
     unsigned long dwHQVFetchByteUnit;  /* HQV Fetch Count unit is byte */
     unsigned long dwHQVInitPatch;      /* Initialize HQV Engine 2 times */
     /*unsigned long dwSupportV3Gamma; *//* Support V3 Gamma */
@@ -73,6 +73,8 @@ typedef struct __VIAHWDiff
     /*unsigned long dwV3FIFOPatch; *//* For CLE V3 FIFO Bug (srcWidth <= 8) */
     unsigned long dwSupportTwoColorKey;	/* Support two color key */
     /* unsigned long dwCxColorSpace; *//* CLE_Cx ColorSpace */
+    unsigned dwNewScaleCtl; /* Use new HQV scale engine code */
+    const unsigned *HQVCmeRegs; /* Which set of CME regs to use for newer chipsets */
 } VIAHWDiff;
 
 void VIAVidHWDiffInit(ScrnInfoPtr pScrn);
diff --git a/src/via_timing.h b/src/via_timing.h
index 85c1da4..33f90a4 100644
--- a/src/via_timing.h
+++ b/src/via_timing.h
@@ -40,7 +40,7 @@
 #define TIMING_CVT_WARN_REFRESH_RATE_NOT_RB 1 << 3
 
 /**
- * Geneartes a CVT modeline
+ * Generates a CVT modeline
  * mode must not be null, if mode->name is null a new char* will be allocated. 
  * 
  */
diff --git a/src/via_vbe.c b/src/via_vbe.c
index 2e3998f..b945f41 100644
--- a/src/via_vbe.c
+++ b/src/via_vbe.c
@@ -230,7 +230,7 @@ ViaVbeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
                 /* Some cards do not like setting the clock. */
                 xf86ErrorF("...but worked OK without customized "
                            "refresh and dotclock.\n");
-                xfree(data->block);
+                free(data->block);
                 data->block = NULL;
                 data->mode &= ~(1 << 11);
             } else {
@@ -322,7 +322,7 @@ ViaVbeSaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function)
                 && (function == MODE_SAVE)) {
                 /* Do not rely on the memory not being touched. */
                 if (pVia->vbeMode.pstate == NULL)
-                    pVia->vbeMode.pstate = xalloc(pVia->vbeMode.stateSize);
+                    pVia->vbeMode.pstate = malloc(pVia->vbeMode.stateSize);
                 memcpy(pVia->vbeMode.pstate, pVia->vbeMode.state,
                        pVia->vbeMode.stateSize);
             }
diff --git a/src/via_vgahw.c b/src/via_vgahw.c
index 0123f10..34ab91f 100644
--- a/src/via_vgahw.c
+++ b/src/via_vgahw.c
@@ -36,6 +36,11 @@
 #include "via_driver.h" /* for HAVE_DEBUG */
 #include "via_vgahw.h"
 
+#if ABI_VIDEODRV_VERSION < 12
+#define PIOOFFSET hwp->PIOOffset
+#else
+#define PIOOFFSET 0
+#endif
 
 static CARD8
 ViaVgahwIn(vgaHWPtr hwp, int address)
@@ -43,7 +48,7 @@ ViaVgahwIn(vgaHWPtr hwp, int address)
     if (hwp->MMIOBase)
         return MMIO_IN8(hwp->MMIOBase, hwp->MMIOOffset + address);
     else
-        return inb(hwp->PIOOffset + address);
+        return inb(PIOOFFSET + address);
 }
 
 static void
@@ -52,7 +57,7 @@ ViaVgahwOut(vgaHWPtr hwp, int address, CARD8 value)
     if (hwp->MMIOBase)
         MMIO_OUT8(hwp->MMIOBase, hwp->MMIOOffset + address, value);
     else
-        outb(hwp->PIOOffset + address, value);
+        outb(PIOOFFSET + address, value);
 }
 
 /*
diff --git a/src/via_video.c b/src/via_video.c
index 77f963b..933c066 100644
--- a/src/via_video.c
+++ b/src/via_video.c
@@ -117,6 +117,10 @@ static int viaSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer);
 static int viaPutImage(ScrnInfoPtr, short, short, short, short, short, short,
     short, short, int, unsigned char *, short, short, Bool,
     RegionPtr, pointer, DrawablePtr);
+static void UVBlit(unsigned char *dest,
+    const unsigned char *uBuffer,
+    const unsigned char *vBuffer,
+    unsigned width, unsigned srcPitch, unsigned dstPitch, unsigned lines);
 static void nv12Blit(unsigned char *nv12Chroma,
     const unsigned char *uBuffer,
     const unsigned char *vBuffer,
@@ -158,11 +162,12 @@ static XF86AttributeRec AttributesG[NUM_ATTRIBUTES_G] = {
     {XvSettable | XvGettable, 0, 1, "XV_AUTOPAINT_COLORKEY"}
 };
 
-#define NUM_IMAGES_G 6
+#define NUM_IMAGES_G 7
 
 static XF86ImageRec ImagesG[NUM_IMAGES_G] = {
     XVIMAGE_YUY2,
     XVIMAGE_YV12,
+    XVIMAGE_I420,
     {
         /*
          * Below, a dummy picture type that is used in XvPutImage only to do
@@ -278,11 +283,12 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
     if (pVia->ChipId != PCI_CHIP_VT3205 &&
         pVia->ChipId != PCI_CHIP_VT3204 &&
         pVia->ChipId != PCI_CHIP_VT3259 &&
-        pVia->ChipId != PCI_CHIP_VT3314 && 
-        pVia->ChipId != PCI_CHIP_VT3327 && 
-        pVia->ChipId != PCI_CHIP_VT3336 && 
-        pVia->ChipId != PCI_CHIP_VT3409 && 
-        pVia->ChipId != PCI_CHIP_VT3364 && 
+        pVia->ChipId != PCI_CHIP_VT3314 &&
+        pVia->ChipId != PCI_CHIP_VT3327 &&
+        pVia->ChipId != PCI_CHIP_VT3336 &&
+        pVia->ChipId != PCI_CHIP_VT3409 &&
+        pVia->ChipId != PCI_CHIP_VT3410 &&
+        pVia->ChipId != PCI_CHIP_VT3364 &&
         pVia->ChipId != PCI_CHIP_VT3324 &&
 	pVia->ChipId != PCI_CHIP_VT3353) {
         CARD32 bandwidth = (mode->HDisplay >> 4) * (mode->VDisplay >> 5) *
@@ -354,6 +360,14 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
                 mClock = 333;
                 memEfficiency = (float)SINGLE_3205_133;
                 break;
+            case VIA_MEM_DDR800:
+                mClock = 400;
+                memEfficiency = (float)SINGLE_3205_133;
+                break;
+            case VIA_MEM_DDR1066:
+                mClock = 533;
+                memEfficiency = (float)SINGLE_3205_133;
+                break;
             default:
                 /*Unknow DRAM Type */
                 DBG_DD(ErrorF("Unknow DRAM Type!\n"));
@@ -426,7 +440,7 @@ DecideOverlaySupport(ScrnInfoPtr pScrn)
             DBG_DD(ErrorF(" via_video.c : totalBandwidth= %f : \n",
                 totalBandWidth));
             if (needBandWidth < totalBandWidth)
-            return TRUE;
+                return TRUE;
         }
         return FALSE;
     }
@@ -466,8 +480,8 @@ viaResetVideo(ScrnInfoPtr pScrn)
 
     viaVidEng->video1_ctl = 0;
     viaVidEng->video3_ctl = 0;
-    viaVidEng->compose = 0x80000000;
-    viaVidEng->compose = 0x40000000;
+    viaVidEng->compose = V1_COMMAND_FIRE;
+    viaVidEng->compose = V3_COMMAND_FIRE;
     viaVidEng->color_key = 0x821;
     viaVidEng->snd_color_key = 0x821;
 
@@ -479,16 +493,16 @@ viaSaveVideo(ScrnInfoPtr pScrn)
     VIAPtr pVia = VIAPTR(pScrn);
     vmmtr viaVidEng = (vmmtr) pVia->VidMapBase;
     
+    DBG_DD(ErrorF(" via_video.c : viaSaveVideo : \n"));
     /* Save video registers */
-    /* TODO: Identify which registers should be saved and restored */
     memcpy(pVia->VideoRegs, (void*)viaVidEng, sizeof(video_via_regs));
 
     pVia->dwV1 = ((vmmtr) viaVidEng)->video1_ctl;
     pVia->dwV3 = ((vmmtr) viaVidEng)->video3_ctl;
     viaVidEng->video1_ctl = 0;
     viaVidEng->video3_ctl = 0;
-    viaVidEng->compose = 0x80000000;
-    viaVidEng->compose = 0x40000000;
+    viaVidEng->compose = V1_COMMAND_FIRE;
+    viaVidEng->compose = V3_COMMAND_FIRE;
 }
 
 void
@@ -496,16 +510,83 @@ viaRestoreVideo(ScrnInfoPtr pScrn)
 {
     VIAPtr pVia = VIAPTR(pScrn);
     vmmtr viaVidEng = (vmmtr) pVia->VidMapBase;
+    video_via_regs  *localVidEng = pVia->VideoRegs;
+
     
+    DBG_DD(ErrorF(" via_video.c : viaRestoreVideo : \n"));
     /* Restore video registers */
-    /* TODO: Identify which registers should be saved and restored */
-    memcpy((void*)viaVidEng, pVia->VideoRegs, sizeof(video_via_regs));
-
-    viaVidEng->video1_ctl = pVia->dwV1;
+    /* flush restored video engines' setting to VidMapBase */
+    
+    viaVidEng->alphawin_hvstart = localVidEng->alphawin_hvstart;
+    viaVidEng->alphawin_size   = localVidEng->alphawin_size;
+    viaVidEng->alphawin_ctl    = localVidEng->alphawin_ctl;
+    viaVidEng->alphafb_stride  = localVidEng->alphafb_stride;
+    viaVidEng->color_key       = localVidEng->color_key;
+    viaVidEng->alphafb_addr    = localVidEng->alphafb_addr;
+    viaVidEng->chroma_low      = localVidEng->chroma_low;
+    viaVidEng->chroma_up       = localVidEng->chroma_up;
+    viaVidEng->interruptflag   = localVidEng->interruptflag;
+
+    if (pVia->ChipId != PCI_CHIP_VT3314)
+    {
+        /*VT3314 only has V3*/
+        viaVidEng->video1_ctl      = localVidEng->video1_ctl;
+        viaVidEng->video1_fetch    = localVidEng->video1_fetch;
+        viaVidEng->video1y_addr1   = localVidEng->video1y_addr1;
+        viaVidEng->video1_stride   = localVidEng->video1_stride;
+        viaVidEng->video1_hvstart  = localVidEng->video1_hvstart;
+        viaVidEng->video1_size     = localVidEng->video1_size;
+        viaVidEng->video1y_addr2   = localVidEng->video1y_addr2;
+        viaVidEng->video1_zoom     = localVidEng->video1_zoom;
+        viaVidEng->video1_mictl    = localVidEng->video1_mictl;
+        viaVidEng->video1y_addr0   = localVidEng->video1y_addr0;
+        viaVidEng->video1_fifo     = localVidEng->video1_fifo;
+        viaVidEng->video1y_addr3   = localVidEng->video1y_addr3;
+        viaVidEng->v1_source_w_h   = localVidEng->v1_source_w_h;
+        viaVidEng->video1_CSC1     = localVidEng->video1_CSC1;
+        viaVidEng->video1_CSC2     = localVidEng->video1_CSC2;
+
+        /* Fix cursor garbage after suspend for VX855 and VX900 (#405) */
+        /* 0x2E4 T Signature Data Result 1 */
+        viaVidEng->video1u_addr1         = localVidEng->video1u_addr1; 
+        /* 0x2E8 HI for Primary Display FIFO Control Signal */
+        viaVidEng->video1u_addr2         = localVidEng->video1u_addr2;
+        /* 0x2EC HI for Primary Display FIFO Transparent color */
+        viaVidEng->video1u_addr3         = localVidEng->video1u_addr3;
+        /* 0x2F0 HI for Primary Display Control Signal */
+        viaVidEng->video1v_addr0         = localVidEng->video1v_addr0;
+        /* 0x2F4 HI for Primary Display Frame Buffer Starting Address */
+        viaVidEng->video1v_addr1         = localVidEng->video1v_addr1;
+        /* 0x2F8 HI for Primary Display Horizontal and Vertical Start */
+        viaVidEng->video1v_addr2         = localVidEng->video1v_addr2;
+        /* 0x2FC HI for Primary Display Center Offset */
+        viaVidEng->video1v_addr3         = localVidEng->video1v_addr3;
+    }
+    viaVidEng->snd_color_key   = localVidEng->snd_color_key;
+    viaVidEng->v3alpha_prefifo = localVidEng->v3alpha_prefifo;
+    viaVidEng->v3alpha_fifo    = localVidEng->v3alpha_fifo;
+    viaVidEng->video3_CSC2     = localVidEng->video3_CSC2;
+    viaVidEng->video3_CSC2     = localVidEng->video3_CSC2;
+    viaVidEng->v3_source_width = localVidEng->v3_source_width;
+    viaVidEng->video3_ctl      = localVidEng->video3_ctl;
+    viaVidEng->video3_addr0    = localVidEng->video3_addr0;
+    viaVidEng->video3_addr1    = localVidEng->video3_addr1;
+    viaVidEng->video3_stride   = localVidEng->video3_stride;
+    viaVidEng->video3_hvstart  = localVidEng->video3_hvstart;
+    viaVidEng->video3_size     = localVidEng->video3_size;
+    viaVidEng->v3alpha_fetch   = localVidEng->v3alpha_fetch;
+    viaVidEng->video3_zoom     = localVidEng->video3_zoom;
+    viaVidEng->video3_mictl    = localVidEng->video3_mictl;
+    viaVidEng->video3_CSC1     = localVidEng->video3_CSC1;
+    viaVidEng->video3_CSC2     = localVidEng->video3_CSC2;    
+    viaVidEng->compose         = localVidEng->compose;
+    
     viaVidEng->video3_ctl = pVia->dwV3;
-    viaVidEng->compose = 0x80000000;
-    viaVidEng->compose = 0x40000000;
-
+    if (pVia->ChipId != PCI_CHIP_VT3314) {
+        viaVidEng->video1_ctl = pVia->dwV1;
+        viaVidEng->compose = V1_COMMAND_FIRE;
+    }
+    viaVidEng->compose = V3_COMMAND_FIRE;
 }
 
 void
@@ -524,8 +605,8 @@ viaExitVideo(ScrnInfoPtr pScrn)
 
     viaVidEng->video1_ctl = 0;
     viaVidEng->video3_ctl = 0;
-    viaVidEng->compose = 0x80000000;
-    viaVidEng->compose = 0x40000000;
+    viaVidEng->compose = V1_COMMAND_FIRE;
+    viaVidEng->compose = V3_COMMAND_FIRE;
 
     /*
      * Free all adaptor info allocated in viaInitVideo.
@@ -542,15 +623,15 @@ viaExitVideo(ScrnInfoPtr pScrn)
                             (viaPortPrivPtr) curAdapt->pPortPrivates->ptr + j,
                             TRUE);
                     }
-                    xfree(curAdapt->pPortPrivates->ptr);
+                    free(curAdapt->pPortPrivates->ptr);
                 }
-                xfree(curAdapt->pPortPrivates);
+                free(curAdapt->pPortPrivates);
             }
-            xfree(curAdapt);
+            free(curAdapt);
         }
     }
     if (allAdaptors)
-        xfree(allAdaptors);
+        free(allAdaptors);
 }
 
 void
@@ -561,7 +642,7 @@ viaInitVideo(ScreenPtr pScreen)
     XF86VideoAdaptorPtr *adaptors, *newAdaptors;
     int num_adaptors, num_new;
 
-    DBG_DD(ErrorF(" via_video.c : viaInitVideo : \n"));
+    DBG_DD(ErrorF(" via_video.c : viaInitVideo, Screen[%d]\n", pScrn->scrnIndex));
 
     allAdaptors = NULL;
     newAdaptors = NULL;
@@ -580,6 +661,7 @@ viaInitVideo(ScreenPtr pScreen)
         (pVia->Chipset == VIA_CX700) ||
         (pVia->Chipset == VIA_VX800) ||
         (pVia->Chipset == VIA_VX855) ||
+        (pVia->Chipset == VIA_VX900) ||
         (pVia->Chipset == VIA_P4M890));
     if ((pVia->drmVerMajor < 2) ||
         ((pVia->drmVerMajor == 2) && (pVia->drmVerMinor < 9)))
@@ -598,8 +680,8 @@ viaInitVideo(ScreenPtr pScreen)
         (pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) ||
         (pVia->Chipset == VIA_VM800) || (pVia->Chipset == VIA_K8M890) ||
         (pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) ||
-        (pVia->Chipset == VIA_P4M890) || (pVia->Chipset == VIA_VX800) || 
-        (pVia->Chipset == VIA_VX855)) {
+        (pVia->Chipset == VIA_P4M890) || (pVia->Chipset == VIA_VX800) ||
+        (pVia->Chipset == VIA_VX855) || (pVia->Chipset == VIA_VX900)) {
         num_new = viaSetupAdaptors(pScreen, &newAdaptors);
         num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors);
     } else {
@@ -611,7 +693,7 @@ viaInitVideo(ScreenPtr pScreen)
 
     DBG_DD(ErrorF(" via_video.c : num_adaptors : %d\n", num_adaptors));
     if (newAdaptors) {
-        allAdaptors = xalloc((num_adaptors + num_new) *
+        allAdaptors = malloc((num_adaptors + num_new) *
                 sizeof(XF86VideoAdaptorPtr *));
         if (allAdaptors) {
             if (num_adaptors)
@@ -636,194 +718,6 @@ viaInitVideo(ScreenPtr pScreen)
     }
 }
 
-static Bool
-RegionsEqual(RegionPtr A, RegionPtr B)
-{
-    int *dataA, *dataB;
-    int num;
-
-    num = REGION_NUM_RECTS(A);
-    if (num != REGION_NUM_RECTS(B))
-        return FALSE;
-
-    if ((A->extents.x1 != B->extents.x1) ||
-        (A->extents.x2 != B->extents.x2) ||
-        (A->extents.y1 != B->extents.y1) || (A->extents.y2 != B->extents.y2))
-    return FALSE;
-
-    dataA = (int *)REGION_RECTS(A);
-    dataB = (int *)REGION_RECTS(B);
-
-    while (num--) {
-        if ((dataA[0] != dataB[0]) || (dataA[1] != dataB[1]))
-            return FALSE;
-        dataA += 2;
-        dataB += 2;
-    }
-
-    return TRUE;
-}
-
-static void
-viaVideoFillPixmap(ScrnInfoPtr pScrn,
-        char *base,
-        unsigned long pitch,
-        int depth,
-        int x, int y, int w, int h,
-        unsigned long color)
-{
-    int i;
-
-    ErrorF("pitch %lu, depth %d, x %d, y %d, w %d, h %d, color 0x%08lx\n",
-            pitch, depth, x, y, w, h, color);
-
-    depth = (depth + 7) >> 3;
-
-    base += y*pitch + x*depth;
-
-    switch(depth) {
-        case 4:
-        while(h--) {
-            register CARD32 *p = (CARD32 *)base;
-            for (i=0; i<w; ++i) {
-                *p++ = color;
-            }
-            base += pitch;
-        }
-        break;
-        case 2: {
-            register CARD16 col = color & 0x0000FFFF;
-            while(h--) {
-                register CARD16 *p = (CARD16 *)base;
-                for (i=0; i<w; ++i) {
-                    *p++ = col;
-                }
-                base += pitch;
-            }
-            break;
-        }
-        case 1: {
-            register CARD8 col = color & 0xFF;
-            while(h--) {
-                register CARD8 *p = (CARD8 *)base;
-                for (i=0; i<w; ++i) {
-                    *p++ = col;
-                }
-                base += pitch;
-            }
-            break;
-        }
-        default:
-        break;
-    }
-}
-    
-
-
-static int
-viaPaintColorkey(ScrnInfoPtr pScrn, viaPortPrivPtr pPriv, RegionPtr clipBoxes,
-    DrawablePtr pDraw)
-{
-
-    if (pDraw->type == DRAWABLE_WINDOW) {
-
-        VIAPtr pVia = VIAPTR(pScrn);
-        PixmapPtr pPix = (pScrn->pScreen->GetWindowPixmap)((WindowPtr) pDraw);
-        unsigned long pitch = pPix->devKind;
-        long offset = (long) pPix->devPrivate.ptr - (long) pVia->FBBase;
-        int x,y;
-        BoxPtr pBox;
-        int nBox;
-
-        REGION_TRANSLATE(pScrn->pScreen, clipBoxes, - pPix->screen_x,
-            - pPix->screen_y);
-
-        nBox = REGION_NUM_RECTS(clipBoxes);
-        pBox = REGION_RECTS(clipBoxes);
-
-        while(nBox--) {
-            if (pVia->NoAccel || offset < 0 ||
-                offset > pScrn->videoRam*1024) {
-                viaVideoFillPixmap(pScrn, pPix->devPrivate.ptr, pitch,
-                    pDraw->bitsPerPixel, pBox->x1, pBox->y1,
-                    pBox->x2 - pBox->x1, pBox->y2 - pBox->y1,
-                    pPriv->colorKey);
-            } else {
-                viaAccelFillPixmap(pScrn, offset, pitch,
-                    pDraw->bitsPerPixel, pBox->x1, pBox->y1,
-                    pBox->x2 - pBox->x1, pBox->y2 - pBox->y1,
-                    pPriv->colorKey);
-            }
-            pBox++;
-        }
-
-        DamageDamageRegion(pPix, clipBoxes);
-    }
-
-    return 0;
-}
-
-
-/*
- * This one gets called, for example, on panning.
- */
-
-static int
-viaReputImage(ScrnInfoPtr pScrn,
-        short drw_x, short drw_y, RegionPtr clipBoxes, pointer data,
-        DrawablePtr pDraw)
-{
-
-    DDUPDATEOVERLAY UpdateOverlay_Video;
-    LPDDUPDATEOVERLAY lpUpdateOverlay = &UpdateOverlay_Video;
-    viaPortPrivPtr pPriv = (viaPortPrivPtr) data;
-    VIAPtr pVia = VIAPTR(pScrn);
-
-    if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
-        REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
-        if (pPriv->autoPaint) {
-            if (pDraw->type == DRAWABLE_WINDOW) {
-                viaPaintColorkey(pScrn, pPriv, clipBoxes, pDraw);
-            } else {
-                xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey,
-                    clipBoxes);
-            }
-        }
-    }
-
-    if (drw_x == pPriv->old_drw_x &&
-        drw_y == pPriv->old_drw_y &&
-        pVia->swov.oldPanningX == pVia->swov.panning_x &&
-        pVia->swov.oldPanningY == pVia->swov.panning_y) {
-        viaXvError(pScrn, pPriv, xve_none);
-        return Success;
-    }
-
-    lpUpdateOverlay->SrcLeft = pPriv->old_src_x;
-    lpUpdateOverlay->SrcTop = pPriv->old_src_y;
-    lpUpdateOverlay->SrcRight = pPriv->old_src_x + pPriv->old_src_w;
-    lpUpdateOverlay->SrcBottom = pPriv->old_src_y + pPriv->old_src_h;
-
-    lpUpdateOverlay->DstLeft = drw_x;
-    lpUpdateOverlay->DstTop = drw_y;
-    lpUpdateOverlay->DstRight = drw_x + pPriv->old_drw_w;
-    lpUpdateOverlay->DstBottom = drw_y + pPriv->old_drw_h;
-    pPriv->old_drw_x = drw_x;
-    pPriv->old_drw_y = drw_y;
-
-    lpUpdateOverlay->dwFlags = DDOVER_KEYDEST;
-
-    if (pScrn->bitsPerPixel == 8)
-        lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey & 0xff;
-    else
-        lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey;
-
-    VIAVidUpdateOverlay(pScrn, lpUpdateOverlay);
-
-    viaXvError(pScrn, pPriv, xve_none);
-    return Success;
-}
-
 static unsigned
 viaSetupAdaptors(ScreenPtr pScreen, XF86VideoAdaptorPtr ** adaptors)
 {
@@ -884,7 +778,7 @@ viaSetupAdaptors(ScreenPtr pScreen, XF86VideoAdaptorPtr ** adaptors)
         viaAdaptPtr[i]->GetPortAttribute = viaGetPortAttribute;
         viaAdaptPtr[i]->SetPortAttribute = viaSetPortAttribute;
         viaAdaptPtr[i]->PutImage = viaPutImage;
-        viaAdaptPtr[i]->ReputImage = viaReputImage;
+        viaAdaptPtr[i]->ReputImage = NULL;
         viaAdaptPtr[i]->QueryImageAttributes = viaQueryImageAttributes;
         for (j = 0; j < numPorts; ++j) {
             viaPortPriv[j].dmaBounceBuffer = NULL;
@@ -931,7 +825,7 @@ viaStopVideo(ScrnInfoPtr pScrn, pointer data, Bool exit)
     if (exit) {
         ViaSwovSurfaceDestroy(pScrn, pPriv);
         if (pPriv->dmaBounceBuffer)
-            xfree(pPriv->dmaBounceBuffer);
+            free(pPriv->dmaBounceBuffer);
         pPriv->dmaBounceBuffer = 0;
         pPriv->dmaBounceStride = 0;
         pPriv->dmaBounceLines = 0;
@@ -1072,6 +966,7 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc,
         unsigned long DisplayBufferIndex)
 {
     unsigned long proReg = 0;
+    unsigned count = 50000;
 
     if (pVia->ChipId == PCI_CHIP_VT3259
         && !(pVia->swov.gdwVideoFlagSW & VIDEO_1_INUSE))
@@ -1083,7 +978,8 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc,
         case FOURCC_RV15:
         case FOURCC_RV16:
         case FOURCC_RV32:
-            while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP));
+            while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP)
+                    && --count);
             VIDOutD(HQV_SRC_STARTADDR_Y + proReg,
                 pVia->swov.SWDevice.dwSWPhysicalAddr[DisplayBufferIndex]);
             VIDOutD(HQV_CONTROL + proReg,
@@ -1091,8 +987,10 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc,
                 proReg) & ~HQV_FLIP_ODD) | HQV_SW_FLIP | HQV_FLIP_STATUS);
             break;
         case FOURCC_YV12:
+        case FOURCC_I420:
         default:
-            while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP));
+            while ((VIDInD(HQV_CONTROL + proReg) & HQV_SW_FLIP)
+                    && --count);
             VIDOutD(HQV_SRC_STARTADDR_Y + proReg,
                 pVia->swov.SWDevice.dwSWPhysicalAddr[DisplayBufferIndex]);
             if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
@@ -1116,16 +1014,49 @@ Flip(VIAPtr pVia, viaPortPrivPtr pPriv, int fourcc,
  */
 
 static void
+planar420cp(unsigned char *dst,
+    const unsigned char *src, int dstPitch, int w, int h, int i420)
+{
+    /* 
+     * Blit luma component as a fake YUY2 assembler blit. 
+     */
+	unsigned long srcUOffset, srcVOffset;
+    if (i420) {
+	    srcVOffset  = w * h + (w >> 1) * (h >> 1);
+	    srcUOffset = w * h;
+    } else {
+	    srcUOffset  = w * h + (w >> 1) * (h >> 1);
+	    srcVOffset = w * h;
+	}
+
+    (*viaFastVidCpy) (dst, src, dstPitch, w >> 1, h, 1);
+    UVBlit(dst + dstPitch * h, src + srcUOffset,
+           src + srcVOffset, w >> 1, w >> 1, dstPitch, h >> 1);
+}
+
+/*
+ * Slow and dirty. NV12 blit.
+ */
+
+static void
 nv12cp(unsigned char *dst,
-    const unsigned char *src, int dstPitch, int w, int h, int yuv422)
+    const unsigned char *src, int dstPitch, int w, int h, int i420)
 {
     /* 
      * Blit luma component as a fake YUY2 assembler blit. 
      */
+	unsigned long srcUOffset, srcVOffset;
+    if (i420) {
+	    srcVOffset  = w * h + (w >> 1) * (h >> 1);
+	    srcUOffset = w * h;
+    } else {
+	    srcUOffset  = w * h + (w >> 1) * (h >> 1);
+	    srcVOffset = w * h;
+	}
 
     (*viaFastVidCpy) (dst, src, dstPitch, w >> 1, h, TRUE);
-    nv12Blit(dst + dstPitch * h, src + w * h + (w >> 1) * (h >> 1),
-            src + w * h, w >> 1, w >> 1, dstPitch, h >> 1);
+    nv12Blit(dst + dstPitch * h, src + srcUOffset,
+            src + srcVOffset, w >> 1, w >>1, dstPitch, h >> 1);
 }
 
 #ifdef XF86DRI
@@ -1150,7 +1081,7 @@ viaDmaBlitImage(VIAPtr pVia,
 
     bounceBuffer = ((unsigned long)src & 15);
     nv12Conversion = (pVia->VideoEngine == VIDEO_ENGINE_CME && 
-        id == FOURCC_YV12);
+        (id == FOURCC_YV12 || id == FOURCC_I420));
 
     switch (id) {
         case FOURCC_YUY2:
@@ -1165,6 +1096,7 @@ viaDmaBlitImage(VIAPtr pVia,
             break;
 
         case FOURCC_YV12:
+        case FOURCC_I420:
         default:
             bounceStride = ALIGN_TO(width, 16);
             bounceLines = height;
@@ -1176,11 +1108,11 @@ viaDmaBlitImage(VIAPtr pVia,
             pPort->dmaBounceStride != bounceStride ||
             pPort->dmaBounceLines != bounceLines) {
             if (pPort->dmaBounceBuffer) {
-                xfree(pPort->dmaBounceBuffer);
+                free(pPort->dmaBounceBuffer);
                 pPort->dmaBounceBuffer = 0;
             }
             size = bounceStride * bounceLines + 16;
-            if (FOURCC_YV12 == id)
+            if (id == FOURCC_YV12 || id == FOURCC_I420)
                 size += ALIGN_TO(bounceStride >> 1, 16) * bounceLines;
             pPort->dmaBounceBuffer = (unsigned char *)malloc(size);
             pPort->dmaBounceLines = bounceLines;
@@ -1220,7 +1152,7 @@ viaDmaBlitImage(VIAPtr pVia,
 
     lumaSync = blit.sync;
 
-    if (id == FOURCC_YV12) {
+    if (id == FOURCC_YV12 || id == FOURCC_I420) {
         unsigned tmp = ALIGN_TO(width >> 1, 16);
 
         if (nv12Conversion) {
@@ -1298,7 +1230,7 @@ viaPutImage(ScrnInfoPtr pScrn,
     unsigned long retCode;
 
 # ifdef XV_DEBUG
-    ErrorF(" via_video.c : viaPutImage : called\n");
+    ErrorF(" via_video.c : viaPutImage : called,  Screen[%d]\n", pScrn->scrnIndex);
     ErrorF(" via_video.c : FourCC=0x%x width=%d height=%d sync=%d\n", id,
             width, height, sync);
     ErrorF
@@ -1352,6 +1284,17 @@ viaPutImage(ScrnInfoPtr pScrn,
 #endif
                 } else {
                     switch (id) {
+                        case FOURCC_I420:
+                            if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
+                                planar420cp(pVia->swov.SWDevice.
+                                    lpSWOverlaySurface[pVia->dwFrameNum & 1],
+                                    buf, dstPitch, width, height, 1);
+                            } else {
+                                (*viaFastVidCpy)(pVia->swov.SWDevice.
+                                    lpSWOverlaySurface[pVia->dwFrameNum & 1],
+                                    buf, dstPitch, width, height, 0);
+                            }
+                            break;
                         case FOURCC_YV12:
                             if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
                                 nv12cp(pVia->swov.SWDevice.
@@ -1407,12 +1350,11 @@ viaPutImage(ScrnInfoPtr pScrn,
 
             lpUpdateOverlay->dwFlags = DDOVER_KEYDEST;
 
-            if (pScrn->bitsPerPixel == 8)
-            lpUpdateOverlay->dwColorSpaceLowValue =
-            pPriv->colorKey & 0xff;
-            else
-            lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey;
-
+            if (pScrn->bitsPerPixel == 8) {
+                lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey & 0xff;
+            } else {
+                lpUpdateOverlay->dwColorSpaceLowValue = pPriv->colorKey;
+            }
             /* If use extend FIFO mode */
             if (pScrn->currentMode->HDisplay > 1024) {
                 dwUseExtendedFIFO = 1;
@@ -1438,7 +1380,8 @@ viaPutImage(ScrnInfoPtr pScrn,
                     && (pPriv->old_src_w == src_w) && (pPriv->old_src_h == src_h)
                     && (pVia->old_dwUseExtendedFIFO == dwUseExtendedFIFO)
                     && (pVia->VideoStatus & VIDEO_SWOV_ON) &&
-                    RegionsEqual(&pPriv->clip, clipBoxes)) {
+                    REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
+                DBG_DD(ErrorF(" via_video.c : don't do UpdateOverlay! \n"));
                 viaXvError(pScrn, pPriv, xve_none);
                 return Success;
             }
@@ -1456,16 +1399,18 @@ viaPutImage(ScrnInfoPtr pScrn,
             pVia->VideoStatus |= VIDEO_SWOV_ON;
 
             /*  BitBlt: Draw the colorkey rectangle */
-            if (!RegionsEqual(&pPriv->clip, clipBoxes)) {
+            if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) {
                 REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes);
                 if (pPriv->autoPaint) {
                     if (pDraw->type == DRAWABLE_WINDOW) {
-                        viaPaintColorkey(pScrn, pPriv, clipBoxes, pDraw);
+                        xf86XVFillKeyHelperDrawable(pDraw, pPriv->colorKey, clipBoxes);
+                        DamageDamageRegion(pDraw, clipBoxes);
                     } else {
-                        xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey,
-                            clipBoxes);
+                        xf86XVFillKeyHelper(pScrn->pScreen, pPriv->colorKey, clipBoxes);
                     }
                 }
+            } else {
+                DBG_DD(ErrorF(" via_video.c : // No need to draw Colorkey!! \n"));
             }
             /*
              *  Update video overlay
@@ -1500,6 +1445,7 @@ viaQueryImageAttributes(ScrnInfoPtr pScrn,
 
     DBG_DD(ErrorF(" via_video.c : viaQueryImageAttributes : FourCC=0x%x, ",
             id));
+    DBG_DD(ErrorF(" via_video.c : Screen[%d],  w=%d, h=%d\n", pScrn->scrnIndex, *w, *h));
 
     if ((!w) || (!h))
         return 0;
@@ -1514,8 +1460,8 @@ viaQueryImageAttributes(ScrnInfoPtr pScrn,
         offsets[0] = 0;
 
     switch (id) {
-        case FOURCC_YV12: /*Planar format : YV12 -4:2:0 */
         case FOURCC_I420:
+        case FOURCC_YV12: /*Planar format : YV12 -4:2:0 */
             *h = (*h + 1) & ~1;
             size = *w;
             if (pVia->useDmaBlit)
@@ -1601,6 +1547,35 @@ VIAVidAdjustFrame(ScrnInfoPtr pScrn, int x, int y)
 }
 
 /*
+ * Blit the U and V Fields. Used to Flip the U V for I420.
+ */
+
+static void
+UVBlit(unsigned char *dst,
+        const unsigned char *uBuffer,
+        const unsigned char *vBuffer,
+        unsigned width, unsigned srcPitch, unsigned dstPitch, unsigned lines)
+{
+    int i, j;
+
+    dstPitch >>= 1;
+
+    for(j = 0; j < lines; j++)
+    {
+        for(i = 0; i < width; i++)
+        {
+            dst[i] = (uBuffer[i] << 8) | (vBuffer[i] << 16);
+        }
+
+        dst += dstPitch;
+        uBuffer += srcPitch;
+        vBuffer += srcPitch;
+    }
+
+}
+
+
+/*
  * Blit the chroma field from one buffer to another while at the same time converting from
  * YV12 to NV12.
  */
diff --git a/src/via_video.h b/src/via_video.h
index 8423ed5..5e351f5 100644
--- a/src/via_video.h
+++ b/src/via_video.h
@@ -44,6 +44,10 @@
 
 #define VIDEO_BPP 2
 
+
+#define V1_COMMAND_FIRE               0x80000000  /* V1 commands fire */
+#define V3_COMMAND_FIRE               0x40000000  /* V3 commands fire */
+
 typedef struct
 {
     CARD32 interruptflag;	       /* 200 */
@@ -89,7 +93,7 @@ typedef struct
     CARD32 video3_ctl;		       /* 2a0 */
     CARD32 video3_addr0;	       /* 2a4 */
     CARD32 video3_addr1;	       /* 2a8 */
-    CARD32 video3_stribe;	       /* 2ac */
+    CARD32 video3_stride;	       /* 2ac */
     CARD32 video3_hvstart;	       /* 2b0 */
     CARD32 video3_size;		       /* 2b4 */
     CARD32 v3alpha_fetch;	       /* 2b8 */
diff --git a/src/via_vt162x.c b/src/via_vt162x.c
index aa64b33..963e33d 100644
--- a/src/via_vt162x.c
+++ b/src/via_vt162x.c
@@ -41,30 +41,42 @@ ViaSetTVClockSource(ScrnInfoPtr pScrn)
     VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
     vgaHWPtr hwp = VGAHWPTR(pScrn);
 
-    /* External TV: */
-    switch(pVia->Chipset) {
-        case VIA_CX700:
-        case VIA_VX800:
-            if (pBIOSInfo->FirstCRTC->IsActive) {
-                if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
-                    ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0);
-                else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
-                    ViaCrtcMask(hwp, 0x6C, 0x90, 0xF0);
-            } else {
-                /* IGA2 */
-                if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
-                    ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F);
-                else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
-                    ViaCrtcMask(hwp, 0x6C, 0x09, 0x0F);
+    switch(pBIOSInfo->TVEncoder) {
+        case VIA_VT1625:
+            /* External TV: */
+            switch(pVia->Chipset) {
+                case VIA_CX700:
+                case VIA_VX800:
+                case VIA_VX855:
+                    if (pBIOSInfo->FirstCRTC->IsActive) {
+                        if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
+                            ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0);
+                        else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
+                            ViaCrtcMask(hwp, 0x6C, 0x90, 0xF0);
+                    } else {
+                        /* IGA2 */
+                        if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
+                            ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F);
+                        else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
+                            ViaCrtcMask(hwp, 0x6C, 0x09, 0x0F);
+                    }
+                    break;
+                default:
+                    if (pBIOSInfo->FirstCRTC->IsActive)
+                        ViaCrtcMask(hwp, 0x6C, 0x21, 0x21);
+                    else
+                        ViaCrtcMask(hwp, 0x6C, 0xA1, 0xA1);
+                    break;
             }
             break;
         default:
             if (pBIOSInfo->FirstCRTC->IsActive)
-                ViaCrtcMask(hwp, 0x6C, 0x21, 0x21);
+                ViaCrtcMask(hwp, 0x6C, 0x50, 0xF0);
             else
-                ViaCrtcMask(hwp, 0x6C, 0xA1, 0xA1);
+                ViaCrtcMask(hwp, 0x6C, 0x05, 0x0F);
             break;
     }
+
 }
 
 static void
diff --git a/src/via_xvmc.c b/src/via_xvmc.c
index 2d86bac..2292fbc 100644
--- a/src/via_xvmc.c
+++ b/src/via_xvmc.c
@@ -151,7 +151,7 @@ cleanupViaXvMC(ViaXvMCPtr vXvMC, XF86VideoAdaptorPtr * XvAdaptors,
     for (i = 0; i < VIA_XVMC_MAX_CONTEXTS; ++i) {
         vXvMC->contexts[i] = 0;
         if (vXvMC->cPrivs[i]) {
-            xfree(vXvMC->cPrivs[i]);
+            free(vXvMC->cPrivs[i]);
             vXvMC->cPrivs[i] = 0;
         }
     }
@@ -159,7 +159,7 @@ cleanupViaXvMC(ViaXvMCPtr vXvMC, XF86VideoAdaptorPtr * XvAdaptors,
     for (i = 0; i < VIA_XVMC_MAX_SURFACES; ++i) {
         vXvMC->surfaces[i] = 0;
         if (vXvMC->sPrivs[i]) {
-            xfree(vXvMC->sPrivs[i]);
+            free(vXvMC->sPrivs[i]);
             vXvMC->sPrivs[i] = 0;
         }
     }
@@ -270,7 +270,7 @@ static XF86ImagePtr Via_subpicture_list[2] = {
 /* 
  * Filling in the device dependent adaptor record. 
  * This is named "VIA Video Overlay" because this code falls under the
- * XV extenstion, the name must match or it won't be used.
+ * XV extension, the name must match or it won't be used.
  *
  * For surface and subpicture, see above.
  * The function pointers point to functions below.
@@ -415,7 +415,7 @@ ViaCleanupXVMC(ScrnInfoPtr pScrn, XF86VideoAdaptorPtr * XvAdaptors,
             viaPortPrivPtr pPriv = XvAdaptors[i]->pPortPrivates[j].ptr;
 
             if (pPriv->xvmc_priv)
-                xfree(pPriv->xvmc_priv);
+                free(pPriv->xvmc_priv);
         }
     }
     pVia->XvMCEnabled = 0;
@@ -451,7 +451,7 @@ ViaXvMCCreateContext(ScrnInfoPtr pScrn, XvMCContextPtr pContext,
         return BadAlloc;
     }
 
-    *priv = xcalloc(1, sizeof(ViaXvMCCreateContextRec));
+    *priv = calloc(1, sizeof(ViaXvMCCreateContextRec));
     contextRec = (ViaXvMCCreateContextRec *) * priv;
 
     if (!*priv) {
@@ -466,12 +466,12 @@ ViaXvMCCreateContext(ScrnInfoPtr pScrn, XvMCContextPtr pContext,
             break;
     }
 
-    cPriv = (ViaXvMCContextPriv *) xcalloc(1, sizeof(ViaXvMCContextPriv));
+    cPriv = (ViaXvMCContextPriv *) calloc(1, sizeof(ViaXvMCContextPriv));
 
     if (!cPriv) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                    "[XvMC] ViaXvMCCreateContext: Unable to allocate memory!\n");
-        xfree(*priv);
+        free(*priv);
         *num_priv = 0;
         return BadAlloc;
     }
@@ -525,7 +525,7 @@ ViaXvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf,
         return BadAlloc;
     }
 
-    sPriv = (ViaXvMCSurfacePriv *) xcalloc(1, sizeof(ViaXvMCSurfacePriv));
+    sPriv = (ViaXvMCSurfacePriv *) calloc(1, sizeof(ViaXvMCSurfacePriv));
 
     if (!sPriv) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -559,13 +559,13 @@ ViaXvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf,
 #endif
     *num_priv = numBuffers + 2;
 
-    *priv = (INT32 *) xcalloc(*num_priv, sizeof(INT32));
+    *priv = (INT32 *) calloc(*num_priv, sizeof(INT32));
 
     if (!*priv) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                    "[XvMC] ViaXvMCCreateSurface: Unable to allocate memory!\n");
         *num_priv = 0;
-        xfree(sPriv);
+        free(sPriv);
         return BadAlloc;
     }
 
@@ -581,8 +581,8 @@ ViaXvMCCreateSurface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf,
     sPriv->memory_ref.pool = 0;
     if (VIAAllocLinear(&(sPriv->memory_ref), pScrn,
                        numBuffers * bufSize + 32)) {
-        xfree(*priv);
-        xfree(sPriv);
+        free(*priv);
+        free(sPriv);
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSurface: "
                    "Unable to allocate frambuffer memory!\n");
         return BadAlloc;
@@ -624,7 +624,7 @@ ViaXvMCCreateSubpicture(ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp,
         return BadAlloc;
     }
 
-    sPriv = (ViaXvMCSurfacePriv *) xcalloc(1, sizeof(ViaXvMCSurfacePriv));
+    sPriv = (ViaXvMCSurfacePriv *) calloc(1, sizeof(ViaXvMCSurfacePriv));
 
     if (!sPriv) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSubpicture:"
@@ -633,13 +633,13 @@ ViaXvMCCreateSubpicture(ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp,
         return BadAlloc;
     }
 
-    *priv = (INT32 *) xcalloc(3, sizeof(INT32));
+    *priv = (INT32 *) calloc(3, sizeof(INT32));
 
     if (!*priv) {
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSubpicture:"
                    " Unable to allocate memory!\n");
         *num_priv = 0;
-        xfree(sPriv);
+        free(sPriv);
         return BadAlloc;
     }
 
@@ -656,8 +656,8 @@ ViaXvMCCreateSubpicture(ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp,
     bufSize = size_xx44(ctx->width, ctx->height);
     sPriv->memory_ref.pool = 0;
     if (VIAAllocLinear(&(sPriv->memory_ref), pScrn, 1 * bufSize + 32)) {
-        xfree(*priv);
-        xfree(sPriv);
+        free(*priv);
+        free(sPriv);
         xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[XvMC] ViaXvMCCreateSubpicture:"
                    " Unable to allocate framebuffer memory!\n");
         return BadAlloc;
@@ -694,7 +694,7 @@ ViaXvMCDestroyContext(ScrnInfoPtr pScrn, XvMCContextPtr pContext)
                 vx->ctxDisplaying = 0;
             }
 
-            xfree(vXvMC->cPrivs[i]);
+            free(vXvMC->cPrivs[i]);
             vXvMC->cPrivs[i] = 0;
             vXvMC->nContexts--;
             vXvMC->contexts[i] = 0;
@@ -729,7 +729,7 @@ ViaXvMCDestroySurface(ScrnInfoPtr pScrn, XvMCSurfacePtr pSurf)
             }
 
             VIAFreeLinear(&(vXvMC->sPrivs[i]->memory_ref));
-            xfree(vXvMC->sPrivs[i]);
+            free(vXvMC->sPrivs[i]);
             vXvMC->nSurfaces--;
             vXvMC->sPrivs[i] = 0;
             vXvMC->surfaces[i] = 0;
@@ -771,7 +771,7 @@ ViaXvMCDestroySubpicture(ScrnInfoPtr pScrn, XvMCSubpicturePtr pSubp)
             }
 
             VIAFreeLinear(&(vXvMC->sPrivs[i]->memory_ref));
-            xfree(vXvMC->sPrivs[i]);
+            free(vXvMC->sPrivs[i]);
             vXvMC->nSurfaces--;
             vXvMC->sPrivs[i] = 0;
             vXvMC->surfaces[i] = 0;
@@ -821,7 +821,7 @@ viaXvMCInitXv(ScrnInfoPtr pScrn, XF86VideoAdaptorPtr XvAdapt)
     for (j = 0; j < XvAdapt->nPorts; ++j) {
         pPriv = (viaPortPrivPtr) XvAdapt->pPortPrivates[j].ptr;
 
-        if (NULL == (pPriv->xvmc_priv = xcalloc(1, sizeof(ViaXvMCXVPriv))))
+        if (NULL == (pPriv->xvmc_priv = calloc(1, sizeof(ViaXvMCXVPriv))))
             return BadAlloc;
 
         for (i = 0; i < VIA_NUM_XVMC_ATTRIBUTES; ++i) {
diff --git a/tools/Makefile.am b/tools/Makefile.am
new file mode 100644
index 0000000..6292e32
--- /dev/null
+++ b/tools/Makefile.am
@@ -0,0 +1,6 @@
+if TOOLS
+bin_PROGRAMS = via_regs_dump
+via_regs_dump_SOURCES = registers.c
+else
+EXTRA_DIST = registers.c
+endif
diff --git a/tools/registers.c b/tools/registers.c
new file mode 100644
index 0000000..33c6445
--- /dev/null
+++ b/tools/registers.c
@@ -0,0 +1,1221 @@
+/*
+ * Copyright 2009 VIA Technologies, Inc. All Rights Reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public
+ * License as published by the Free Software Foundation;
+ * either version 2, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTIES OR REPRESENTATIONS; without even
+ * the implied warranty of MERCHANTABILITY or FITNESS FOR
+ * A PARTICULAR PURPOSE.See the GNU General Public License
+ * for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <unistd.h>
+#include <string.h>
+#include <errno.h>
+#include <getopt.h>
+
+#include <sys/types.h>
+#include <sys/io.h>
+
+#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
+
+struct bit_desc {
+	u_int8_t mask;
+	char *name;
+};
+
+struct io_index {
+	char *name;
+	struct bit_desc *bit_desc;
+};
+
+struct io_reg {
+	u_int16_t	io_port_addr;	/* port for address */
+	u_int16_t	io_port_data;	/* port for address */
+	char *		name;
+	struct io_index	index[0xff];
+};
+
+struct io_reg attr_regs = {
+	.io_port_addr = 0x3c0,
+	.io_port_data = 0x3c1,
+	.name = "Attribute Controller",
+	.index = {
+		[0x00] = { "Palette 0", },
+		[0x01] = { "Palette 1", },
+		[0x02] = { "Palette 2", },
+		[0x03] = { "Palette 3", },
+		[0x04] = { "Palette 4", },
+		[0x05] = { "Palette 5", },
+		[0x06] = { "Palette 6", },
+		[0x07] = { "Palette 7", },
+		[0x08] = { "Palette 8", },
+		[0x09] = { "Palette 9", },
+		[0x0a] = { "Palette a", },
+		[0x0b] = { "Palette b", },
+		[0x0c] = { "Palette c", },
+		[0x0d] = { "Palette d", },
+		[0x0e] = { "Palette e", },
+		[0x0f] = { "Palette f", },
+		[0x10] = { "Mode Control", },
+		[0x11] = { "Overscan Color", },
+		[0x12] = { "Color Plane Enable", },
+		[0x13] = { "Horizontal Pixel Panning", },
+		[0x14] = { "Color Select", },
+	},
+};
+
+struct io_reg graphic_regs = {
+	.io_port_addr = 0x3ce,
+	.io_port_data = 0x3cf,
+	.name = "Graphic Controller",
+	.index = {
+		[0x00] = { "Set / Reset", },
+		[0x01] = { "Enable Set / Reset", },
+		[0x02] = { "Color Compare", },
+		[0x03] = { "Data Rotate", },
+		[0x04] = { "Read Map Select", },
+		[0x05] = { "Mode", },
+		[0x06] = { "Miscellaneous", },
+		[0x07] = { "Color Don't Care", },
+		[0x08] = { "Bit Mask", },
+		/* Extended */
+		[0x20] = { "Offset Register Control", },
+		[0x21] = { "Offset Register A", },
+		[0x22] = { "Offset Register B", },
+	},
+};
+
+struct io_reg crtc_regs = {
+	.io_port_addr = 0x3d4,
+	.io_port_data = 0x3d5,
+	.name = "CRT controller",
+	.index = {
+		/* CRT Controller registers */
+		[0x00] = { "Horizontal Total", },
+		[0x01] = { "Horizontal Display End", },
+		[0x02] = { "Start Horizontal Blank", },
+		[0x03] = { "End Horizontal Blank", },
+		[0x04] = { "Start Horizontal Retrace", },
+		[0x05] = { "End Horizontal Retrace", },
+		[0x06] = { "Vertical Total", },
+		[0x07] = { "Overflow", },
+		[0x08] = { "Preset Row Scan", },
+		[0x09] = { "Max Scan Line", },
+		[0x0a] = { "Cursor Start", },
+		[0x0b] = { "Cursor End", },
+		[0x0c] = { "Start Address High", },
+		[0x0d] = { "Start Address Low", },
+		[0x0e] = { "Cursor Location High", },
+		[0x0f] = { "Cursor Location Low", },
+		[0x10] = { "Vertical Retrace Start", },
+		[0x11] = { "Vertical Retrace End", },
+		[0x12] = { "Vertical Display End", },
+		[0x13] = { "Offset", },
+		[0x14] = { "Underline Location", },
+		[0x15] = { "Start Vertical Blank", },
+		[0x16] = { "End Vertical Blank", },
+		[0x17] = { "CRTC Mode Control", },
+		[0x18] = { "Line Compare", },
+		/* CRT Controller Extended Register */
+		[0x30] = { "Display Fetch Blocking Control", },
+		[0x31] = { "Half Line Position", },
+		[0x32] = { "Mode Control", },
+		[0x33] = { "Hsync Adjuster", },
+		[0x34] = { "Starting Address Overflow", },
+		[0x35] = { "Extended Overflow", },
+		[0x36] = { "Power Management Control 3", },
+		[0x37] = { "DAC Control", },
+		[0x38] = { "Signature Data B0", },
+		[0x39] = { "Signature Data B1", },
+		[0x3a] = { "Signature Data B2", },
+		[0x3b] = { "Scratch Pad 2", },
+		[0x3c] = { "Scratch Pad 3", },
+		[0x3d] = { "Scratch Pad 4", },
+		[0x3e] = { "Scratch Pad 5", },
+		[0x3f] = { "Scratch Pad 6", },
+		[0x40] = { "Test Mode Control 0", },
+		[0x43] = { "IGA1 Display Control", },
+		[0x45] = { "Power Now Indicator Control 3", },
+		[0x46] = { "Test Mode Control 1", },
+		[0x47] = { "Test Mode Control 2", },
+		[0x48] = { "Starting Address Overflow", },
+		/* Sequencer Extended Registers */
+		[0x50] = { "Second CRTC Horizontal Total Period", },
+		[0x51] = { "Second CRTC Horizontal Active Data Period", },
+		[0x52] = { "Second CRTC Horizontal Blanking Start", },
+		[0x53] = { "Second CRTC Horizontal Blanking End", },
+		[0x54] = { "Second CRTC Horizontal Blanking Overflow", },
+		[0x55] = { "Second CRTC Horizontal Period Overflow", },
+		[0x56] = { "Second CRTC Horizontal Retrace Start", },
+		[0x57] = { "Second CRTC Horizontal Retrace End", },
+		[0x58] = { "Second CRTC Vertical Total Period", },
+		[0x59] = { "Second CRTC Vertical Active Data Period", },
+		[0x5a] = { "Second CRTC Vertical Blanking Start", },
+		[0x5b] = { "Second CRTC Vertical Blanking End", },
+		[0x5c] = { "Second CRTC Vertical Blanking Overflow", },
+		[0x5d] = { "Second CRTC Vertical Period Overflow", },
+		[0x5e] = { "Second CRTC Vertical Retrace Start", },
+		[0x5f] = { "Second CRTC Vertical Retrace End", },
+		[0x60] = { "Second CRTC Vertical Status 1", },
+		[0x61] = { "Second CRTC Vertical Status 2", },
+		[0x62] = { "Second Display Starting Address Low", },
+		[0x63] = { "Second Display Starting Address Middle", },
+		[0x64] = { "Second Display Starting Address High", },
+		[0x65] = { "Second Display Horizontal Quadword Count", },
+		[0x66] = { "Second Display Horizontal Offset", },
+		[0x67] = { "Second Display Col Depth and Horiz Overfl", },
+		[0x68] = { "Second Display Queue Depth and Read Thresh", },
+		[0x69] = { "Second Display Interrupt Enable and Status", },
+		[0x6a] = { "Second Display Channel and LCD Enable", },
+		[0x6b] = { "Channel 1 and 2 Clock Mode Selection", },
+		[0x6c] = { "TV Clock Control", },
+		[0x6d] = { "Horizontal Total Shadow", },
+		[0x6e] = { "End Horizontal Blanking Shadow", },
+		[0x6f] = { "Vertical Total Shadow", },
+		[0x70] = { "Vertical Display Enable End Shadow", },
+		[0x71] = { "Vertical Display Overflow Shadow", },
+		[0x72] = { "Start Vertical Blank Shadow", },
+		[0x73] = { "End Vertical Blank Shadow", },
+		[0x74] = { "Vertical Blank Overflow Shadow", },
+		[0x75] = { "Vertical Retrace Start Shadow", },
+		[0x76] = { "Vertical Retrace End Shadow", },
+		[0x77] = { "LCD Horizontal Scaling Factor", },
+		[0x78] = { "LCD Vertical Scaling Facor", },
+		[0x79] = { "LCD Scaling Control", },
+		[0x7a] = { "LCD Scaling Parameter 1", },
+		[0x7b] = { "LCD Scaling Parameter 2", },
+		[0x7c] = { "LCD Scaling Parameter 3", },
+		[0x7d] = { "LCD Scaling Parameter 4", },
+		[0x7e] = { "LCD Scaling Parameter 5", },
+		[0x7f] = { "LCD Scaling Parameter 6", },
+		[0x80] = { "LCD Scaling Parameter 7", },
+		[0x81] = { "LCD Scaling Parameter 8", },
+		[0x82] = { "LCD Scaling Parameter 9", },
+		[0x83] = { "LCD Scaling Parameter 10", },
+		[0x84] = { "LCD Scaling Parameter 11", },
+		[0x85] = { "LCD Scaling Parameter 12", },
+		[0x86] = { "LCD Scaling Parameter 13", },
+		[0x87] = { "LCD Scaling Parameter 14", },
+		[0x88] = { "LCD Panel Type", },
+		[0x8a] = { "LCD Timing Control 1", },
+		[0x8b] = { "LCD Power Sequence Control 0", },
+		[0x8c] = { "LCD Power Sequence Control 1", },
+		[0x8d] = { "LCD Power Sequence Control 2", },
+		[0x8e] = { "LCD Power Sequence Control 3", },
+		[0x8f] = { "LCD Power Sequence Control 4", },
+		[0x90] = { "LCD Power Sequence Control 5", },
+		[0x91] = { "Software Cotnrol Power Sequence", },
+		[0x92] = { "Read Threshold 2", },
+		[0x94] = { "Expire Number and Display Queue Extend", },
+		[0x95] = { "Extend Threshold Bit", },
+		[0x97] = { "LVDS Channel 2 Function Select 0", },
+		[0x98] = { "LVDS Channel 2 Function Select 1", },
+		[0x99] = { "LVDS Channel 1 Function Select 0", },
+		[0x9a] = { "LVDS Channel 1 Function Select 1", },
+		[0x9b] = { "Digital Video Port 1 Function Select 0", },
+		[0x9c] = { "Digital Video Port 1 Function Select 1", },
+		[0x9d] = { "Power Now Control 2", },
+		[0x9e] = { "Power Now Control 3", },
+		[0x9f] = { "Power Now Control 4", },
+		[0xa0] = { "Horizontal Scaling Initial Value", },
+		[0xa1] = { "Vertical Scaling Initial Value", },
+		[0xa2] = { "Horizontal and Vertical Scaling Enable", },
+		[0xa3] = { "Second Display Starting Address Extended", },
+		[0xa5] = { "Second LCD Vertical Scaling Factor", },
+		[0xa6] = { "Second LCD Vertical Scaling Factor", },
+		[0xa7] = { "Expected IGA1 Vertical Display End", },
+		[0xa8] = { "Expected IGA1 Vertical Display End", },
+		[0xa9] = { "Hardware Gamma Control", },
+		[0xaa] = { "FIFO Depth + Threshold Overflow", },
+		[0xab] = { "IGA2 Inetrlace Half Line", },
+		[0xac] = { "IGA2 Inetrlace Half Line", },
+		[0xaf] = { "P-Arbiter Write Expired Number", },
+		[0xb0] = { "IGA2 Pack Circuit Request Threshold", },
+		[0xb1] = { "IGA2 Pack Circuit Request High Threshold", },
+		[0xb2] = { "IGA2 Pack Circuit Request Expire Threshold", },
+		[0xb3] = { "IGA2 Pack Circuit Control", },
+		[0xb4] = { "IGA2 Pack Circuit Target Base Address 0", },
+		[0xb5] = { "IGA2 Pack Circuit Target Base Address 0", },
+		[0xb6] = { "IGA2 Pack Circuit Target Base Address 0", },
+		[0xb7] = { "IGA2 Pack Circuit Target Base Address 0", },
+		[0xb8] = { "IGA2 Pack Circuit Target Line Pitch", },
+		[0xb9] = { "IGA2 Pack Circuit Target Line Pitch", },
+		[0xba] = { "V Counter Set Pointer", },
+		[0xbb] = { "V Counter Set Pointer", },
+		[0xbc] = { "V Counter Reset Value", },
+		[0xbd] = { "V Counter Reset Value", },
+		[0xbe] = { "Frame Buffer Limit Value", },
+		[0xbf] = { "Frame Buffer Limit Value", },
+		[0xc0] = { "Expected IGA1 Vertical Display End 1", },
+		[0xc1] = { "Expected IGA1 Vertical Display End 1", },
+		[0xc2] = { "Third LCD Vertical Scaling Factor", },
+		[0xc3] = { "Third LCD Vertical Scaling Factor", },
+		[0xc4] = { "Expected IGA1 Vertical Display End 2", },
+		[0xc5] = { "Expected IGA1 Vertical Display End 2", },
+		[0xc7] = { "Fourth LCD Vertical Scaling Factor", },
+		[0xc8] = { "IGA2 Pack Circuit Target Base Address 1", },
+		[0xc9] = { "IGA2 Pack Circuit Target Base Address 1", },
+		[0xca] = { "IGA2 Pack Circuit Target Base Address 1", },
+		[0xcb] = { "IGA2 Pack Circuit Target Base Address 1", },
+		[0xd0] = { "LVDS PLL1 Control", },
+		[0xd1] = { "LVDS PLL2 Control", },
+		[0xd2] = { "LVDS Control", },
+		[0xd3] = { "LVDS Second Power Sequence Control 0", },
+		[0xd4] = { "LVDS Second Power Sequence Control 1", },
+		[0xd5] = { "LVDS Texting Mode Control", },
+		[0xd6] = { "DCVI Control Register 0", },
+		[0xd7] = { "DCVI Control Register 1", },
+		[0xd9] = { "Scaling Down Source Data Offset Control", },
+		[0xda] = { "Scaling Down Source Data Offset Control", },
+		[0xdb] = { "Scaling Down Source Data Offset Control", },
+		[0xdc] = { "Scaling Down Vertical Scale Control", },
+		[0xdd] = { "Scaling Down Vertical Scale Control", },
+		[0xde] = { "Scaling Down Vertical Scale Control", },
+		[0xdf] = { "Scaling Down Vertical Scale Control", },
+		[0xe0] = { "Scaling Down Destination FB Starting Addr 0", },
+		[0xe1] = { "Scaling Down Destination FB Starting Addr 0", },
+		[0xe2] = { "Scaling Down Destination FB Starting Addr 0", },
+		[0xe3] = { "Scaling Down Destination FB Starting Addr 0", },
+		[0xe4] = { "Scaling Down SW Source FB Stride", },
+		[0xe5] = { "Scaling Down Destination FB Starting Addr 1", },
+		[0xe6] = { "Scaling Down Destination FB Starting Addr 1", },
+		[0xe7] = { "Scaling Down Destination FB Starting Addr 1", },
+		[0xe8] = { "Scaling Down Destination FB Starting Addr 1", },
+		[0xe9] = { "Scaling Down Destination FB Starting Addr 2", },
+		[0xea] = { "Scaling Down Destination FB Starting Addr 2", },
+		[0xeb] = { "Scaling Down Destination FB Starting Addr 2", },
+		[0xec] = { "IGA1 Down Scaling Destination Control", },
+		[0xf0] = { "Snapshot Mode - Starting Address of Disp Data", },
+		[0xf1] = { "Snapshot Mode - Starting Address of Disp Data", },
+		[0xf2] = { "Snapshot Mode - Starting Address of Disp Data", },
+		[0xf3] = { "Snapshot Mode Control", },
+		[0xf4] = { "Snapshot Mode Control", },
+		[0xf5] = { "Snapshot Mode Control", },
+		[0xf6] = { "Snapshot Mode Control", },
+	},
+};
+
+static struct bit_desc seq_19_desc[] = {
+	{ 0x01, "CPU Interface Clock Control", },
+	{ 0x02, "Display Interface Clock Control", },
+	{ 0x04, "MC Interface Clock Control", },
+	{ 0x08, "Typical Arbiter Interface Clock Control", },
+	{ 0x10, "AGP Interface Clock Control", },
+	{ 0x20, "P-Arbiter Interface Clock Control", },
+	{ 0x40, "MIU/AGP Interface Clock Control", },
+	{ 0 },
+};
+
+static struct bit_desc seq_1b_desc[] = {
+	{ 0x01, "Primary Display's LUT Off", },
+	{ 0x18, "Primary Display Engine VCK Gating", },
+	{ 0x60, "Secondary Display Engine LCK Gating", },
+	{ 0 },
+};
+
+static struct bit_desc seq_1e_desc[] = {
+	{ 0x01, "ROC ECK", },
+	{ 0x02, "Replace ECK by MCK", },
+	{ 0x08, "Spread Spectrum", },
+	{ 0x30, "DVP1 Power Control", },
+	{ 0xc0, "VCP Power Control", },
+	{ 0 },
+};
+
+static struct bit_desc seq_2a_desc[] = {
+	{ 0x03, "LVDS Channel 1 Pad Control" },
+	{ 0x0c, "LVDS Channel 2 Pad Control" },
+	{ 0x40, "Sprad Spectrum Type FIFO" },
+	{ 0 },
+};
+
+static struct bit_desc seq_2b_desc[] = {
+	{ 0x01, "MSI Pending IRQ Re-trigger", },
+	{ 0x02, "CRT Hot Plug Detect Enable", },
+	{ 0x04, "CRT Sense IRQ status", },
+	{ 0x08, "CRT Sense IRQ enable", },
+	{ 0x10, "LVDS Sense IRQ status", },
+	{ 0x20, "LVDS Sense IRQ enable", },
+	{ 0 },
+};
+
+static struct bit_desc seq_2d_desc[] = {
+	{ 0x03, "ECK Pll Power Control", },
+	{ 0x0c, "LCK PLL Power Control", },
+	{ 0x30, "VCK PLL Powre Control", },
+	{ 0xc0, "E3_ECK_N Selection", },
+	{ 0 },
+};
+
+static struct bit_desc seq_2e_desc[] = {
+	{ 0x03, "Video Playback Engine V3/V4 Gated Clock VCK", },
+	{ 0x0c, "PCI Master / DMA Gated Clock ECK/CPUCK", },
+	{ 0x30, "Video Processor Gated Clock ECK", },
+	{ 0xc0, "Capturer Gated Clock ECK", },
+	{ 0 },
+};
+
+static struct bit_desc seq_3c_desc[] = {
+	{ 0x01, "AGP Bus Pack Door AGP3 Enable", },
+	{ 0x02, "Switch 3 PLLs to Prime Output", },
+	{ 0x04, "LCDCK PLL Locked Detect", },
+	{ 0x08, "VCK PLL Locked Detect", },
+	{ 0x10, "ECL PLL Locked Detect", },
+	{ 0x60, "PLL Frequency Division Select for Testing", },
+	{ 0 },
+};
+
+static struct bit_desc seq_3f_desc[] = {
+	{ 0x03, "Video Clock Control (Gated ECK)", },
+	{ 0x0c, "2D Clock Control (Gated ECK/CPUCK)", },
+	{ 0x30, "3D Clock Control (Gated ECK)", },
+	{ 0xc0, "CR Clock Control (Gated ECK)", },
+	{ 0 },
+};
+
+static struct bit_desc seq_40_desc[] = {
+	{ 0x01, "Reset ECK PLL", },
+	{ 0x02, "Reset VCK PLL", },
+	{ 0x04, "Reset LCDCK PLL", },
+	{ 0x08, "LVDS Interrupt Method", },
+	{ 0x30, "Free Run ECK Frequency within Idle Mode", },
+	{ 0x80, "CRT Sense Enable", },
+	{ 0 },
+};
+
+static struct bit_desc seq_43_desc[] = {
+	{ 0x01, "Notebook Used Flag", },
+	{ 0x04, "Typical Channel 1 Arbiter Read Back Data Overwrite Flag", },
+	{ 0x08, "Typical Channel 0 Arbiter Read Back Data Overwrite Flag", },
+	{ 0x10, "IGA1 Display FIFO Underflow Flag", },
+	{ 0x20, "IGA2 Dispaly FIFO Underflow Flag", },
+	{ 0x40, "Windows Media Video Enable Flag", },
+	{ 0x80, "Advance Video Enable Flag", },
+	{ 0 },
+};
+
+static struct bit_desc seq_4e_desc[] = {
+	{ 0x01, "HQV/Video/Capture Engine Reset", },
+	{ 0x02, "HQV/Video/Capture Register Reset", },
+	{ 0x04, "2D Engine Reset", },
+	{ 0x08, "2D Register Reset", },
+	{ 0x10, "3D Engine Reset", },
+	{ 0x20, "3D Register Reset", },
+	{ 0x40, "CR Engine Reset", },
+	{ 0x80, "CR Register Reset", },
+	{ 0 },
+};
+
+static struct bit_desc seq_59_desc[] = {
+	{ 0x01, "GFX-NM AGP Dynamic Clock Enable", },
+	{ 0x02, "GFX-NM GMINT Channel 0 Dynamic Clock Enable", },
+	{ 0x04, "GFX-NM GMINT Channel 1 Dynamic Clock Enable", },
+	{ 0x08, "GFX-NM PCIC Dynamic Clock Enable", },
+	{ 0x10, "GFX-NM IGA Dynamic Clock Enable", },
+	{ 0x20, "IGA Low Thrshold Enable", },
+	{ 0x80, "IGA1 Enable", },
+	{ 0 },
+};
+
+static struct bit_desc seq_5b_desc[] = {
+	{ 0x01, "LVDS1 Used IGA2 Source", },
+	{ 0x02, "LBDS1 Used IGA1 Source", },
+	{ 0x04, "LVDS0 Used IGA2 Source", },
+	{ 0x08, "LVDS1 Used IGA1 Source", },
+	{ 0x10, "DAC0 Used IGA2 Source", },
+	{ 0x20, "DAC0 Used IGA1 Source", },
+	{ 0x40, "DAC0 User is TV", },
+	{ 0x80, "DCVI Source Selection is TV", },
+	{ 0 },
+};
+
+static struct bit_desc seq_5c_desc[] = {
+	{ 0x01, "DVP1 Used IGA2 Source", },
+	{ 0x02, "DVP1 Used IGA1 Source", },
+	{ 0x10, "DAC1 Used IGA2 Source", },
+	{ 0x20, "DAC1 Used IGA1 Source", },
+	{ 0x40, "DAC1 User is TV", },
+	{ 0 },
+};
+
+static struct bit_desc seq_76_desc[] = {
+	{ 0x01, "Backlight Control Enable", },
+	{ 0 },
+};
+
+struct io_reg sequencer_regs = {
+	.io_port_addr = 0x3c4,
+	.io_port_data = 0x3c5,
+	.name = "Sequencer",
+	.index = {
+		/* Sequencer Registers */
+		[0x00] = { "Reset", },
+		[0x01] = { "Clocking Mode", },
+		[0x02] = { "Map Mask", },
+		[0x03] = { "Character Map Select", },
+		[0x04] = { "Memory Mode", },
+		/* Extended Sequencer Registers */
+		[0x10] = { "Extended Register Unlock", },
+		[0x11] = { "Configuration 0", },
+		[0x12] = { "Configuration 1", },
+		[0x13] = { "Configuration 2 (DVP1 strapping)", },
+		[0x14] = { "Frame Buffer Size Control", },
+		[0x15] = { "Display Mode Control", },
+		[0x16] = { "Display FIFO Threshold Control", },
+		[0x17] = { "Display FIFO Control", },
+		[0x18] = { "Display Arbiter Control 0", },
+		[0x19] = { "Power Management", seq_19_desc, },
+		[0x1a] = { "PCI Bus Control", },
+		[0x1b] = { "Power Management Control 0", seq_1b_desc,  },
+		[0x1c] = { "Horizontal Display Fetch Count Data", },
+		[0x1d] = { "Horizontal Display Fetch Count Control", },
+		[0x1e] = { "Power Management Control", seq_1e_desc, },
+		/* 1f: reserved */
+		[0x20] = { "Typical Arbiter Control 0", },
+		[0x21] = { "Typical Arbiter Control 1", },
+		[0x22] = { "Display Arbiter Control 1", },
+		[0x26] = { "IIC Serial Port Control 0", },
+		[0x2a] = { "Power Management Control 5", seq_2a_desc, },
+		[0x2b] = { "LVDS Interrupt Control", seq_2b_desc, },
+		[0x2c] = { "General Purpose I/O Port", },
+		[0x2d] = { "Power Management Control 1", seq_2d_desc, },
+		[0x2e] = { "Power Management Control 2", seq_2e_desc, },
+		[0x31] = { "IIC Serial Port Control 1", },
+		[0x35] = { "Subsystem Vendor ID Low", },
+		[0x36] = { "Subsystem Vendor ID High", },
+		[0x37] = { "Subsystem ID Low", },
+		[0x38] = { "Subsystem ID High", },
+		[0x39] = { "BIOS Reserved Register 0", },
+		[0x3a] = { "BIOS Reserved Register 1", },
+		[0x3b] = { "PCI Revision ID Back Door", },
+		[0x3c] = { "Miscellaneous", seq_3c_desc, },
+		[0x3d] = { "General Purpose I/O Port", },
+		[0x3e] = { "Miscellaneous Register for AGP Mux", },
+		[0x3f] = { "Power Management Control 2", seq_3f_desc, },
+		[0x40] = { "PLL Control", seq_40_desc, },
+		[0x41] = { "Typical Arbiter Control 1", },
+		[0x42] = { "Typical Arbiter Control 1", },
+		[0x43] = { "Graphics Bonding Option", seq_43_desc, },
+		[0x44] = { "VCK Clock Synthesizer Vallue 0", },
+		[0x45] = { "VCK Clock Synthesizer Vallue 1", },
+		[0x46] = { "VCK Clock Synthesizer Vallue 2", },
+		[0x47] = { "ECK Clock Synthesizer Vallue 0", },
+		[0x48] = { "ECK Clock Synthesizer Vallue 1", },
+		[0x49] = { "ECK Clock Synthesizer Vallue 2", },
+		[0x4a] = { "LDCK Clock Synthesizer Value 0", },
+		[0x4b] = { "LDCK Clock Synthesizer Value 1", },
+		[0x4c] = { "LDCK Clock Synthesizer Value 2", },
+		[0x4d] = { "Preemptive Arbiter Control", },
+		[0x4e] = { "Software Reset Control", },
+		[0x4f] = { "CR Gating Clock Control", },
+		[0x50] = { "AGP Control", },
+		[0x51] = { "Display FIFO Control 1", },
+		[0x52] = { "Integrated TV Shadow Register Control", },
+		[0x53] = { "DAC Sense Control 1", },
+		[0x54] = { "DAC Sense Control 2", },
+		[0x55] = { "DAC Sense Control 3", },
+		[0x56] = { "DAC Sense Control 4", },
+		[0x57] = { "Display FIFO Control 2", },
+		[0x58] = { "GFX Power Control 1", },
+		[0x59] = { "GFX Power Control 2", seq_59_desc, },
+		[0x5a] = { "PCI Bus Control 2", },
+		[0x5b] = { "Device Used Status 0", seq_5b_desc, },
+		[0x5c] = { "Device Used Status 1", seq_5c_desc, },
+		[0x5d] = { "Timer Control", },
+		[0x5e] = { "DAC Control 2", },
+		[0x60] = { "I2C Mode Control", },
+		[0x61] = { "I2C Host Address", },
+		[0x62] = { "I2C Host Data", },
+		[0x63] = { "I2C Host Control", },
+		[0x64] = { "I2C Status", },
+		[0x65] = { "Power Management Control 6", },
+		[0x66] = { "GTI Control 0", },
+		[0x67] = { "GTI Control 1", },
+		[0x68] = { "GTI Control 1", },
+		[0x69] = { "GTI Control 1", },
+		[0x6a] = { "GTI Control 1", },
+		[0x6b] = { "GTI Control 1", },
+		[0x6c] = { "GTI Control 1", },
+		[0x6d] = { "GTI Control 1", },
+		[0x6e] = { "GTI Control 1", },
+		[0x6f] = { "GTI Control 1", },
+		[0x70] = { "GARB Control 0", },
+		[0x71] = { "Typical Arbiter Control 2", },
+		[0x72] = { "Typical Arbiter Control 3", },
+		[0x73] = { "Typical Arbiter Control 4", },
+		[0x74] = { "Typical Arbiter Control 5", },
+		[0x75] = { "Typical Arbiter Control 6", },
+		[0x76] = { "Backlight Control 1", seq_76_desc, },
+		[0x77] = { "Backlight Control 2", },
+		[0x78] = { "Backlight Control 3", },
+	},
+};
+
+static u_int8_t readb_idx_reg(u_int16_t port, u_int8_t index)
+{
+	outb(index, port-1);
+	return inb(port);
+}
+
+static void writeb_idx_reg(u_int16_t port, u_int8_t index,
+			   u_int8_t val)
+{
+	outb(index, port-1);
+	outb(val, port);
+}
+
+static void writeb_idx_mask(u_int16_t reg, u_int8_t idx, u_int8_t val,
+			    u_int8_t mask)
+{
+	u_int8_t tmp;
+
+	tmp = readb_idx_reg(reg, idx);
+	tmp &= ~ mask;
+	tmp |= (val & mask);
+	writeb_idx_reg(reg, idx, tmp);
+}
+
+
+struct io_reg *io_regs[] = {
+	//&attr_regs,
+	&sequencer_regs,
+	&graphic_regs,
+	&crtc_regs,
+	NULL
+};	
+
+struct half_mode {
+	u_int16_t total;
+	u_int16_t active;
+	u_int16_t blank_start;
+	u_int16_t blank_end;
+	u_int16_t retr_start;
+	u_int16_t retr_end;
+	int n_sync;
+};
+
+struct mode {
+	struct half_mode h;	
+	struct half_mode v;	
+	u_int32_t addr_start;
+	u_int8_t bpp;
+	u_int16_t horiz_quad_count;
+	u_int16_t horiz_offset;
+};
+
+static int get_mode(struct mode *m, int secondary)
+{
+	u_int8_t val;
+	
+	memset(m, 0, sizeof(*m));
+
+	if (!secondary) {
+		m->h.total	 = readb_idx_reg(0x3d5, 0x00);
+		m->h.active	 = readb_idx_reg(0x3d5, 0x01);
+		m->h.blank_start = readb_idx_reg(0x3d5, 0x02);
+		m->h.blank_end	 = readb_idx_reg(0x3d5, 0x03) & 0x1f;
+		m->h.retr_start	 = readb_idx_reg(0x3d5, 0x04);
+		m->h.retr_end	 = readb_idx_reg(0x3d5, 0x05) & 0x1f;
+		m->v.total	 = readb_idx_reg(0x3d5, 0x06) + 2;
+
+		m->addr_start	 = readb_idx_reg(0x3d5, 0x0d);
+		m->addr_start	|= readb_idx_reg(0x3d5, 0x0c) << 8;
+
+		m->v.retr_start	 = readb_idx_reg(0x3d5, 0x10);
+		m->v.retr_end	 = readb_idx_reg(0x3d5, 0x11) & 0x0f;
+		m->v.active	 = readb_idx_reg(0x3d5, 0x12) + 1;
+		m->horiz_offset	 = readb_idx_reg(0x3d5, 0x13);
+		m->v.blank_start = readb_idx_reg(0x3d5, 0x15) + 1;
+		m->v.blank_end	 = readb_idx_reg(0x3d5, 0x16) + 1;
+
+		/* overflow register 0x07 */
+		val = readb_idx_reg(0x3d5, 0x07);
+		m->v.total	 |= ((val >> 0) & 0x1) << 8;
+		m->v.active	 |= ((val >> 1) & 0x1) << 8;
+		m->v.retr_start	 |= ((val >> 2) & 0x1) << 8;
+		m->v.blank_start |= ((val >> 3) & 0x1) << 8;
+		/* line compare */
+		m->v.total	 |= ((val >> 5) & 0x1) << 9;
+		m->v.active	 |= ((val >> 6) & 0x1) << 9;
+		m->v.retr_start	 |= ((val >> 7) & 0x1) << 9;
+
+		val = readb_idx_reg(0x3d5, 0x09);
+		m->v.blank_start |= ((val >> 5) & 0x1) << 9;
+
+		val = readb_idx_reg(0x3d5, 0x33);
+		m->h.retr_start	 |= ((val >> 4) & 0x1) << 8;
+		m->h.blank_end	 |= ((val >> 5) & 0x1) << 6;
+
+		val = readb_idx_reg(0x3d5, 0x34);
+		m->addr_start |= val << 16;
+
+		val = readb_idx_reg(0x3d5, 0x35);
+		m->v.total 	 |= ((val >> 0) & 0x1) << 10;
+		m->v.retr_start	 |= ((val >> 1) & 0x1) << 10;
+		m->v.active	 |= ((val >> 2) & 0x1) << 10;
+		m->v.blank_start |= ((val >> 3) & 0x1) << 10;
+		//line_comp	 |= ((val >> 4) & 0x1) << 10;
+		m->horiz_offset	 |= ((val >> 5) & 0x7) << 8;
+
+		val = readb_idx_reg(0x3d5, 0x36);
+		m->h.total	 |= ((val >> 3) & 0x1) << 8;
+
+		val = readb_idx_reg(0x3d5, 0x48);
+		m->addr_start	 |= ((val >> 0) & 0x1f) << 24;
+
+		val = readb_idx_reg(0x3c5, 0x15);
+		switch ((val >> 2) & 0x3) {
+		case 0:
+			m->bpp = 8;
+			break;
+		case 1:
+			m->bpp = 16;
+			break;
+		case 2:
+			m->bpp = 30;
+			break;
+		case 3:
+			m->bpp = 32;
+			break;
+		}
+
+		val = inb(0x3cc);
+		if (val & 0x40)
+			m->h.n_sync;
+		if (val & 0x80)
+			m->v.n_sync;
+
+		/* add some weird multipliers and offsets */
+		m->h.total = (m->h.total + 5) << 3;
+		m->h.active = (m->h.active + 1) << 3;
+		m->h.blank_start = (m->h.blank_start + 1) << 3;
+		m->h.blank_end = (m->h.blank_end + 1) << 3;
+		m->h.retr_start = (m->h.retr_start << 3);
+		m->h.retr_end = (m->h.retr_end << 3);
+
+	} else {
+		/* horizontal */
+		m->h.total	 = readb_idx_reg(0x3d5, 0x50) + 1;
+		m->h.active	 = readb_idx_reg(0x3d5, 0x51) + 1;
+		m->h.blank_start = readb_idx_reg(0x3d5, 0x52) + 1;
+		m->h.blank_end 	 = readb_idx_reg(0x3d5, 0x53) + 1;
+		m->h.retr_start	 = readb_idx_reg(0x3d5, 0x56);
+		m->h.retr_end	 = readb_idx_reg(0x3d5, 0x57);
+		/* add blanking overflow */
+		val = readb_idx_reg(0x3d5, 0x54);
+		m->h.blank_start |= ((val >> 0) & 0x7) << 8;
+		m->h.blank_end	 |= ((val >> 3) & 0x7) << 8;
+		m->h.retr_start  |= ((val >> 6) & 0x3) << 8;
+		/* add period overflow */
+		val = readb_idx_reg(0x3d5, 0x55);
+		m->h.total	 |= ((val >> 0) & 0xf) << 8;
+		m->h.active	 |= ((val >> 4) & 0x7) << 8;
+
+		/* vertical */
+		m->v.total	 = readb_idx_reg(0x3d5, 0x58) + 1;
+		m->v.active	 = readb_idx_reg(0x3d5, 0x59) + 1;
+		m->v.blank_start = readb_idx_reg(0x3d5, 0x5a) + 1;
+		m->v.blank_end	 = readb_idx_reg(0x3d5, 0x5b) + 1;
+		m->v.retr_start	 = readb_idx_reg(0x3d5, 0x5e);
+		val = readb_idx_reg(0x3d5, 0x5f);
+		m->v.retr_end	 = val & 0x1f;
+		m->v.retr_start	 |= (val >> 5) << 8;
+		/* add blanking overflow */
+		val = readb_idx_reg(0x3d5, 0x5c);
+		m->v.blank_start |= ((val >> 0) & 0x7) << 8;
+		m->v.blank_end	 |= ((val >> 3) & 0x7) << 8;
+		m->h.retr_end	 |= ((val >> 6) & 0x1) << 8;
+		m->h.retr_start	 |= ((val >> 7) & 0x1) << 10;
+		/* add period overflow */
+		val = readb_idx_reg(0x3d5, 0x5d);
+		m->v.total	 |= ((val >> 0) & 0x7) << 8;
+		m->v.active	 |= ((val >> 3) & 0x7) << 8;
+		m->h.blank_end	 |= ((val >> 6) & 0x7) << 11;
+		m->h.retr_start	 |= ((val >> 7) & 0x7) << 11;
+
+		/* puzzle together the start address */
+		val = readb_idx_reg(0x3d5, 0x62);
+		m->addr_start = (val >> 1) << 3;
+		val = readb_idx_reg(0x3d5, 0x63);
+		m->addr_start |= (val << 10);
+		val = readb_idx_reg(0x3d5, 0x64);
+		m->addr_start |= (val << 18);
+		val = readb_idx_reg(0x3d5, 0xa3);
+		m->addr_start |= (val & 0x7) << 26;
+
+		m->horiz_quad_count = readb_idx_reg(0x3d5, 0x65);
+		m->horiz_offset = readb_idx_reg(0x3d5, 0x66) << 3;
+
+		val = readb_idx_reg(0x3d5, 0x67);
+		m->horiz_offset		|= ((val >> 0) & 0x3) << 11;
+		m->horiz_quad_count	|= ((val >> 2) & 0x3) << 8;
+		switch (val >> 6) {
+		case 0:
+			m->bpp = 8;
+			break;
+		case 1:
+			m->bpp = 16;
+			break;
+		case 2:
+			m->bpp = 30;
+			break;
+		case 3:
+			m->bpp = 32;
+			break;
+		}
+	}
+}
+
+static void dump_scaling(void)
+{
+	u_int32_t h_scaling, v_scaling;
+	u_int8_t val;
+
+	val = readb_idx_reg(0x3d5, 0x79);
+	if (val & 0x01) {
+		printf("Panel Scaling enabled, mode %s\n",
+			val & 0x02 ? "Interpolation" : "Duplication");
+		v_scaling = (val >> 3) & 0x1;
+		h_scaling = ((val >> 4) & 0x3) << 10;
+		v_scaling |= ((val >> 6) & 0x3) << 9;
+
+		val = readb_idx_reg(0x3d5, 0x77);
+		h_scaling |= val << 2;
+
+		val = readb_idx_reg(0x3d5, 0x78);
+		v_scaling |= val << 1;
+
+		val = readb_idx_reg(0x3d5, 0x9f);
+		h_scaling |= val & 0x3;
+		printf("Scaling Factors: horizontal=%u, vertical=%u\n",
+			h_scaling, v_scaling);
+	} else
+		printf("Panel Scaling disabled\n");
+}
+
+static void dump_registers(struct io_reg *ior)
+{
+	u_int8_t idx;
+
+	printf("%s register dump:\n", ior->name);
+	for (idx = 0; idx < 0xff; idx++) {
+		u_int8_t val;
+		struct bit_desc *desc = ior->index[idx].bit_desc;
+
+		if (!ior->index[idx].name)
+			continue;
+
+		outb(idx, ior->io_port_addr);
+		val = inb(ior->io_port_data);
+		printf("    0x%02x = 0x%02x (%s)\n", idx, val,	
+			ior->index[idx].name);
+		
+		if (!desc) 
+			continue;
+
+		while (desc->mask) {
+			printf("       0x%02x %s: 0x%02x\n", desc->mask,
+				desc->name, val & desc->mask);
+			desc++;
+		}
+	}
+	printf("\n");
+}
+
+enum pll {
+	PLL_VCK,
+	PLL_ECK,
+	PLL_LDCK,
+};
+
+#define REF_FREQ	14318
+
+static void get_vck_clock(enum pll pll, unsigned int f_ref_khz)
+{
+	u_int8_t reg_ofs = 0;
+	u_int8_t val;
+	unsigned int dm, dtz, dr, dn;
+	unsigned long f_vco, f_out;
+	char *name;
+
+	switch (pll) {
+	case PLL_VCK:
+		reg_ofs = 0;
+		name = "VCK";
+		break;
+	case PLL_ECK:
+		reg_ofs = 3;
+		name = "ECK";
+		break;
+	case PLL_LDCK:
+		reg_ofs = 6;
+		name = "LDCK";
+		break;
+	default:
+		return;
+	}
+
+	dm = readb_idx_reg(0x3c5, 0x44 + reg_ofs);
+
+	val = readb_idx_reg(0x3c5, 0x45 + reg_ofs);
+	dtz = val & 0x1;
+	dr = (val >> 3) & 0x7;
+	dm |= ((val >> 6) & 0x3) << 8;
+
+	val = readb_idx_reg(0x3c5, 0x46 + reg_ofs);
+	dtz |= (val & 0x1) << 1;
+	dn = val >> 1;
+
+	printf("%s PLL: dm=%d, dtx=%d, dr=%d, dn=%d ", name, dm, dtz, dr, dn);
+
+	f_vco = f_ref_khz * (dm + 2) / (dn + 2);
+	if (dr)
+		f_out = f_ref_khz * (dm + 2) / ( (dn + 2) * (2 * dr) );
+	else
+		f_out = 0;
+
+	printf("%s Fvco=%lu kHz, Fout=%lu kHz\n", name, f_vco, f_out);
+}
+
+struct gpio_state {
+	u_int32_t mode_output;
+	u_int32_t pin_status;
+	u_int32_t output_bit;
+	u_int32_t alt_function;
+};
+
+static int get_gpio_state(struct gpio_state *s)
+{
+	u_int8_t val;
+
+	memset(s, 0, sizeof(*s));
+
+	val = readb_idx_reg(0x3c5, 0x2c);
+	if (val & 0x01)
+		s->alt_function |= (3 << 2);
+	if (val & 0x04)
+		s->pin_status |= (1 << 3);
+	if (val & 0x08)
+		s->pin_status |= (1 << 2);
+	if (val & 0x10)
+		s->output_bit |= (1 << 3);
+	if (val & 0x20)
+		s->output_bit |= (1 << 2);
+	if (val & 0x40)
+		s->mode_output |= (1 << 3);
+	if (val & 0x80)
+		s->mode_output |= (1 << 2);
+
+	val = readb_idx_reg(0x3c5, 0x3d);
+	if (val & 0x01)
+		s->alt_function |= (3 << 4);
+	if (val & 0x04)
+		s->pin_status |= (1 << 5);
+	if (val & 0x08)
+		s->pin_status |= (1 << 4);
+	if (val & 0x10)
+		s->output_bit |= (1 << 5);
+	if (val & 0x20)
+		s->output_bit |= (1 << 4);
+	if (val & 0x40)
+		s->mode_output |= (1 << 5);
+	if (val & 0x80)
+		s->mode_output |= (1 << 4);
+
+}
+
+static void dump_gpio_state(const char *pfx, const struct gpio_state *gs)
+{
+	int i;
+
+	for (i = 2; i < 6; i++) {
+		printf("%sGPIO %u: function=", pfx, i);
+
+		if (gs->alt_function & (1 << i))
+			printf("alternate\n");
+		else if (gs->mode_output & (1 << i))
+			printf("output(%u)\n", gs->output_bit & (1 <<i) ? 1 : 0);
+		else
+			printf("input(%u)\n", gs->pin_status & (1 << i) ? 1 : 0);
+	}
+}
+
+static void dump_all_registers(void)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(io_regs); i++) {
+		struct io_reg *reg = io_regs[i];
+		if (!reg)
+			break;
+		dump_registers(reg);
+	}
+
+}
+
+static void dump_mode(const char *pfx, struct mode *m)
+{
+	printf("%sH total=%u, active=%u, blank (%u-%u), sync(%u-%u)\n",
+		pfx, m->h.total, m->h.active, m->h.blank_start, m->h.blank_end,
+		m->h.retr_start, m->h.retr_end);
+	printf("%sV total=%u, active=%u, blank (%u-%u), sync(%u-%u)\n",
+		pfx, m->v.total, m->v.active, m->v.blank_start, m->v.blank_end,
+		m->v.retr_start, m->v.retr_end);
+	printf("base_addr=0x%08x, bpp=%d\n", m->addr_start, m->bpp);
+}
+
+static void dump_sl(const char *pfx)
+{
+	u_int8_t val;
+	unsigned int sl_size_mb;
+	unsigned long rtsf_in_sl_addr;
+	u_int64_t sl_in_mem_addr;
+
+	val = readb_idx_reg(0x3c5, 0x68);
+	switch (val) {
+	case 0:
+		sl_size_mb = 512;
+		break;
+	case 0x80:
+		sl_size_mb = 256;
+		break;
+	case 0xc0:
+		sl_size_mb = 128;
+		break;
+	case 0xe0:
+		sl_size_mb = 64;
+		break;
+	case 0xf0:
+		sl_size_mb = 32;
+		break;
+	case 0xf8:
+		sl_size_mb = 16;
+		break;
+	case 0xfc:
+		sl_size_mb = 8;
+		break;
+	case 0xfe:
+		sl_size_mb = 4;
+		break;
+	case 0xff:
+		sl_size_mb = 2;
+		break;
+	}
+
+	rtsf_in_sl_addr  = readb_idx_reg(0x3c5, 0x6a) << 12;
+	rtsf_in_sl_addr |= readb_idx_reg(0x3c5, 0x6b) << 20;
+	val = readb_idx_reg(0x3c5, 0x6c);
+	rtsf_in_sl_addr |= (val & 0x1) << 28;
+
+	sl_in_mem_addr = readb_idx_reg(0x3c5, 0x6d) << 21;
+	sl_in_mem_addr |= readb_idx_reg(0x3c5, 0x6d) << 29;
+	sl_in_mem_addr |= (readb_idx_reg(0x3c5, 0x6d) & 0x7f) << 37;
+
+	printf("%sSL in System memory: 0x%llx, RTSF in SL: 0x%lx\n",
+		pfx, sl_in_mem_addr, rtsf_in_sl_addr);
+}
+
+static int dump_lvds(void)
+{
+	u_int8_t val;
+	char *mode;
+
+	writeb_idx_mask(0x3c5, 0x5a, 0x01, 0x01);
+
+	val = readb_idx_reg(0x3c5, 0x13);
+	switch (val >> 6) {
+	case 0:
+		mode = "LVDS1 + LVDS2";
+		break;
+	case 2:
+		mode = "One Dual LVDS Channel";
+		break;
+	default:
+		mode = "RESERVED";
+		break;
+	}
+	printf("LVDS Seq Mode: %s\n", mode);
+
+	val = readb_idx_reg(0x3d5, 0xd2);
+	switch ((val >> 4) & 3) {
+	case 0:
+		mode = "LVDS1 + LVDS2";
+		break;
+	case 2:
+		mode = "One Dual LVDS Channel";
+		break;
+	default:
+		mode = "RESERVED";
+		break;
+	}
+	printf("LVDS CRT Mode: %s\n", mode);
+	printf("LVDS Channel 1 Format %s, Power %s\n",
+		val & 2 ? "OpenLDI":"SPWG", val & 0x80 ? "Down" : "Up");
+	printf("LVDS Channel 2 Format %s, Power %s\n",
+		val & 1 ? "OpenLDI":"SPWG", val & 0x40 ? "Down" : "Up");
+	
+}
+static int parse_ioreg(u_int16_t *reg, u_int8_t *index, char *str)
+{
+	char *dot;
+	char buf[255];
+	unsigned long ul;
+
+	memset(buf, 0, sizeof(*buf));
+	strncpy(buf, str, sizeof(buf)-1);
+
+	dot = strchr(buf, '.');
+	if (!dot)
+		return -EINVAL;
+	*dot = '\0';
+
+	*reg = strtoul(buf, NULL, 16);
+	*index = strtoul(dot+1, NULL, 16);
+	
+	return 0;
+}
+
+static void reset_mode(int secondary)
+{
+	if (!secondary) {
+		writeb_idx_mask(0x3d5, 0x11, 0x00 , 0x80);
+		writeb_idx_mask(0x3d5, 0x03, 0x80 , 0x80);
+	} else {
+	}
+}
+
+static void unlock_registers(void)
+{
+	writeb_idx_reg(0x3c5, 0x10, 0x01); /* unlock extended */
+	writeb_idx_mask(0x3d5, 0x47, 0x00, 0x01);	/* unlock CRT */
+	writeb_idx_mask(0x3d5, 0x03, 0x80, 0x80);	/* disable EGA lightpen */
+	writeb_idx_mask(0x3d5, 0x11, 0x00, 0x80);	/* unlock 0..7 */
+}
+
+static void usage(void)
+{
+	printf("Usage :\n");
+	printf("-h | --help  : Display this usage message.\n");
+	printf("-d | --dump  : Dump all registers.\n");
+	printf("-p | --pll   : Display PLL.\n");
+	printf("-m | --mode  : Display modes.\n");
+	printf("-r | --read  : Read register.\n");
+	printf("-w | --write : Write register.\n");
+	printf("-g | --gpio  : Display GPIO state.\n");
+}
+
+int main(int argc, char **argv)
+{
+	struct mode m;
+	struct gpio_state gs;
+	int rc, option_index = 0;
+
+	printf("via-chrome-tool (C) 2009 by VIA Technologies, Inc.\n");
+	printf("This is FREE SOFTWARE with ABSOLUTELY NO WARRANTY\n\n");
+
+	rc = iopl(3);
+	if (rc < 0) {
+		perror("iopl");
+		printf("Need root privileges.\n");
+		exit(1);
+	}
+
+	if (argc <= 1) {
+		usage();
+		exit(1);
+	}
+
+	unlock_registers();
+
+	while (1) {
+		int c;
+		u_int16_t reg;
+		u_int8_t index;
+		unsigned long val;
+		static struct option long_options[] = {
+			{ "help", 0, 0, 'h' },
+			{ "dump", 0, 0, 'd' },
+			{ "pll", 0, 0, 'p' },
+			{ "mode", 0, 0, 'm' },
+			{ "read", 1, 0, 'r' },
+			{ "write", 1, 0, 'w' },
+			{ "gpio", 1, 0, 'g' },
+		};
+
+		c = getopt_long(argc, argv, "hdpmr:w:g", long_options,
+				&option_index);
+
+		if (c == -1) {
+			break;
+		}
+
+		switch (c) {
+		case 'h':
+			usage();
+			exit(1);
+		case 'd':
+			dump_all_registers();
+			break;
+		case 'p':
+			get_vck_clock(PLL_VCK, REF_FREQ);
+			get_vck_clock(PLL_ECK, REF_FREQ);
+			get_vck_clock(PLL_LDCK, REF_FREQ);
+			break;
+		case 'm':
+			dump_sl("");
+			printf("Primary Display:\n");
+			get_mode(&m, 0);
+			dump_mode("    ", &m);
+			printf("\n");
+			printf("Secondary Display:\n");
+			get_mode(&m, 1);
+			dump_mode("    ", &m);
+			printf("\n");
+			dump_scaling();
+			printf("\n");
+			dump_lvds();
+			printf("\n");
+			break;
+		case 'r':
+			parse_ioreg(&reg, &index, optarg);
+			printf("%03x.%02x = 0x%02x\n", reg, index,
+				readb_idx_reg(reg, index));
+			break;
+		case 'w':
+			parse_ioreg(&reg, &index, optarg);
+			/* we need one extra argument */
+			if (argc <= optind)
+				exit(1);
+			val = strtoul(argv[optind], NULL, 16);
+			if (val > 0xff)
+				exit(1);
+			writeb_idx_reg(reg, index, val);
+			printf("%03x.%02x = 0x%02x\n", reg, index,
+				readb_idx_reg(reg, index));
+			break;
+		case 'g':
+			printf("GPIO State\n");
+			get_gpio_state(&gs);
+			dump_gpio_state("    ", &gs);
+			printf("\n");
+			break;
+		default:
+			usage();
+			exit(1);
+		}
+	}
+
+	exit(0);
+}