path: root/src/freedreno/.gitlab-ci/reference/glxgears-a420.log

Reading src/freedreno/.gitlab-ci/traces/glxgears-a420.rd.gz...
gpu_id: 420
cmd: X/23360: fence=1029603
cmd: glxgears/23375: fence=1029604
############################################################
cmdstream: 414 dwords
t0		write RBBM_PERFCTR_CTL (0170)
			RBBM_PERFCTR_CTL: 0x1
108ce000:		0000: 00000170 00000001
t0		write GRAS_DEBUG_ECO_CONTROL (0c81)
			GRAS_DEBUG_ECO_CONTROL: 0
108ce008:		0000: 00000c81 00000000
t0		write SP_MODE_CONTROL (0ec3)
			SP_MODE_CONTROL: 0x6
108ce010:		0000: 00000ec3 00000006
t0		write TPL1_TP_MODE_CONTROL (0f03)
			TPL1_TP_MODE_CONTROL: 0x3a
108ce018:		0000: 00000f03 0000003a
t0		write UNKNOWN_0D01 (0d01)
			UNKNOWN_0D01: 0x1
108ce020:		0000: 00000d01 00000001
t0		write UNKNOWN_0E42 (0e42)
			UNKNOWN_0E42: 0
108ce028:		0000: 00000e42 00000000
t0		write UCHE_CACHE_WAYS_VFD (0e8c)
			UCHE_CACHE_WAYS_VFD: 0x7
108ce030:		0000: 00000e8c 00000007
t0		write UCHE_CACHE_MODE_CONTROL (0e80)
			UCHE_CACHE_MODE_CONTROL: 0
108ce038:		0000: 00000e80 00000000
t0		write UCHE_INVALIDATE0 (0e8a)
			UCHE_INVALIDATE0: 0
			UCHE_INVALIDATE1: 0x12
108ce040:		0000: 00010e8a 00000000 00000012
t0		write HLSQ_MODE_CONTROL (0e05)
			HLSQ_MODE_CONTROL: 0
108ce04c:		0000: 00000e05 00000000
t0		write UNKNOWN_0CC5 (0cc5)
			UNKNOWN_0CC5: 0x6
108ce054:		0000: 00000cc5 00000006
t0		write UNKNOWN_0CC6 (0cc6)
			UNKNOWN_0CC6: 0
108ce05c:		0000: 00000cc6 00000000
t0		write UNKNOWN_0EC2 (0ec2)
			UNKNOWN_0EC2: 0x40000
108ce064:		0000: 00000ec2 00040000
t0		write UNKNOWN_2001 (2001)
			UNKNOWN_2001: 0
108ce06c:		0000: 00002001 00000000
t3		opcode: CP_INVALIDATE_STATE (3b) (2 dwords)
108ce074:		0000: c0003b00 00001000
t0		write UNKNOWN_20EF (20ef)
			UNKNOWN_20EF: 0
108ce07c:		0000: 000020ef 00000000
t0		write RB_BLEND_RED (20f0)
			RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
			RB_BLEND_RED_F32: 0.000000
			RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
			RB_BLEND_GREEN_F32: 0.007813
108ce084:		0000: 000320f0 00000000 00000000 00000000 3c0000ff
t0		write UNKNOWN_2152 (2152)
			UNKNOWN_2152: 0
108ce098:		0000: 00002152 00000000
t0		write UNKNOWN_2153 (2153)
			UNKNOWN_2153: 0
108ce0a0:		0000: 00002153 00000000
t0		write UNKNOWN_2154 (2154)
			UNKNOWN_2154: 0
108ce0a8:		0000: 00002154 00000000
t0		write UNKNOWN_2155 (2155)
			UNKNOWN_2155: 0
108ce0b0:		0000: 00002155 00000000
t0		write UNKNOWN_2156 (2156)
			UNKNOWN_2156: 0
108ce0b8:		0000: 00002156 00000000
t0		write UNKNOWN_2157 (2157)
			UNKNOWN_2157: 0
108ce0c0:		0000: 00002157 00000000
t0		write UNKNOWN_21C3 (21c3)
			UNKNOWN_21C3: 0x1d
108ce0c8:		0000: 000021c3 0000001d
t0		write PC_GS_PARAM (21e5)
			PC_GS_PARAM: { MAX_VERTICES = 0 | INVOCATIONS = 0 | PRIMTYPE = PC_DRAW_POINTS }
108ce0d0:		0000: 000021e5 00000000
t0		write UNKNOWN_21E6 (21e6)
			UNKNOWN_21E6: 0x1
108ce0d8:		0000: 000021e6 00000001
t0		write PC_HS_PARAM (21e7)
			PC_HS_PARAM: { VERTICES_OUT = 0 | SPACING = EQUAL_SPACING }
108ce0e0:		0000: 000021e7 00000000
t0		write UNKNOWN_22D7 (22d7)
			UNKNOWN_22D7: 0
108ce0e8:		0000: 000022d7 00000000
t0		write TPL1_TP_TEX_OFFSET (2380)
			TPL1_TP_TEX_OFFSET: 0
108ce0f0:		0000: 00002380 00000000
t0		write TPL1_TP_TEX_COUNT (2381)
			TPL1_TP_TEX_COUNT: { VS = 16 | HS = 0 | DS = 0 | GS = 0 }
108ce0f8:		0000: 00002381 00000010
t0		write TPL1_TP_FS_TEX_COUNT (23a0)
			TPL1_TP_FS_TEX_COUNT: 0x10
108ce100:		0000: 000023a0 00000010
t3		opcode: CP_SET_DRAW_STATE (43) (3 dwords)
			{ COUNT = 0 | DISABLE_ALL_GROUPS | GROUP_ID = 0 }
			{ ADDR_LO = 0 }
108ce108:		0000: c0014300 00040000 00000000
t0		write SP_VS_PVT_MEM_PARAM (22e2)
			SP_VS_PVT_MEM_PARAM: 0x8000001
			SP_VS_PVT_MEM_ADDR: 0x10cd7000
108ce114:		0000: 000122e2 08000001 10cd7000
t0		write SP_FS_PVT_MEM_PARAM (22ec)
			SP_FS_PVT_MEM_PARAM: 0x8000001
			SP_FS_PVT_MEM_ADDR: 0x10cd9000
108ce120:		0000: 000122ec 08000001 10cd9000
t0		write GRAS_SC_CONTROL (207b)
			GRAS_SC_CONTROL: { RENDER_MODE = RB_RENDERING_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0 }
108ce12c:		0000: 0000207b 00000800
t0		write RB_MSAA_CONTROL (20a2)
			RB_MSAA_CONTROL: { DISABLE | SAMPLES = 0 }
108ce134:		0000: 000020a2 00001000
t0		write GRAS_CL_GB_CLIP_ADJ (2004)
			GRAS_CL_GB_CLIP_ADJ: { HORZ = 0 | VERT = 0 }
108ce13c:		0000: 00002004 00000000
t0		write RB_ALPHA_CONTROL (20f8)
			RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_ALWAYS }
108ce144:		0000: 000020f8 00000e00
t0		write RB_FS_OUTPUT (20f9)
			RB_FS_OUTPUT: { ENABLE_BLEND = 0 | SAMPLE_MASK = 0xffff }
108ce14c:		0000: 000020f9 ffff0000
t0		write GRAS_ALPHA_CONTROL (2073)
			GRAS_ALPHA_CONTROL: { 0 }
108ce154:		0000: 00002073 00000000
t0		write VSC_BIN_SIZE (0c00)
			VSC_BIN_SIZE: { WIDTH = 320 | HEIGHT = 320 }
108ce15c:		0000: 00000c00 0000014a
t0		write VSC_SIZE_ADDRESS (0c01)
			VSC_SIZE_ADDRESS: 0x10cdb000
108ce164:		0000: 00000c01 10cdb000
t0		write VSC_PIPE_CONFIG[0].REG (0c08)
			VSC_PIPE_CONFIG[0].REG: { X = 0 | Y = 0 | W = 1 | H = 1 }
			VSC_PIPE_CONFIG[0x1].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
			VSC_PIPE_CONFIG[0x2].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
			VSC_PIPE_CONFIG[0x3].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
			VSC_PIPE_CONFIG[0x4].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
			VSC_PIPE_CONFIG[0x5].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
			VSC_PIPE_CONFIG[0x6].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
			VSC_PIPE_CONFIG[0x7].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
108ce16c:		0000: 00070c08 01100000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0		write VSC_PIPE_DATA_ADDRESS[0].REG (0c10)
			VSC_PIPE_DATA_ADDRESS[0].REG: 0x10cdc000
			VSC_PIPE_DATA_ADDRESS[0x1].REG: 0x10d1c000
			VSC_PIPE_DATA_ADDRESS[0x2].REG: 0x10d5c000
			VSC_PIPE_DATA_ADDRESS[0x3].REG: 0x10d9c000
			VSC_PIPE_DATA_ADDRESS[0x4].REG: 0x10ddc000
			VSC_PIPE_DATA_ADDRESS[0x5].REG: 0x10e1c000
			VSC_PIPE_DATA_ADDRESS[0x6].REG: 0x10e5c000
			VSC_PIPE_DATA_ADDRESS[0x7].REG: 0x10e9c000
108ce190:		0000: 00070c10 10cdc000 10d1c000 10d5c000 10d9c000 10ddc000 10e1c000 10e5c000
108ce1b0:		0020: 10e9c000
t0		write VSC_PIPE_DATA_LENGTH[0].REG (0c18)
			VSC_PIPE_DATA_LENGTH[0].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x1].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x2].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x3].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x4].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x5].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x6].REG: 0x3ffe0
			VSC_PIPE_DATA_LENGTH[0x7].REG: 0x3ffe0
108ce1b4:		0000: 00070c18 0003ffe0 0003ffe0 0003ffe0 0003ffe0 0003ffe0 0003ffe0 0003ffe0
108ce1d4:		0020: 0003ffe0
t3		opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
108ce1d8:		0000: c0002600 00000000
t0		write RB_FRAME_BUFFER_DIMENSION (0ce0)
			RB_FRAME_BUFFER_DIMENSION: { WIDTH = 300 | HEIGHT = 300 }
108ce1e0:		0000: 00000ce0 012c012c
t0		write RB_MODE_CONTROL (20a0)
			RB_MODE_CONTROL: { WIDTH = 320 | HEIGHT = 320 | ENABLE_GMEM }
108ce1e8:		0000: 000020a0 00010a0a
t0		write RB_DEPTH_INFO (2103)
			RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTH4_24_8 | DEPTH_BASE = 0x64000 }
			RB_DEPTH_PITCH: 1280
			RB_DEPTH_PITCH2: 1280
108ce1f0:		0000: 00022103 00064002 00000028 00000028
t0		write RB_STENCIL_INFO (2108)
			RB_STENCIL_INFO: { STENCIL_BASE = 0 }
			RB_STENCIL_PITCH: 0
108ce200:		0000: 00012108 00000000 00000000
t0		write GRAS_DEPTH_CONTROL (2077)
			GRAS_DEPTH_CONTROL: { FORMAT = DEPTH4_24_8 }
108ce20c:		0000: 00002077 00000002
t0		write PC_VSTREAM_CONTROL (21c2)
			PC_VSTREAM_CONTROL: { SIZE = 0 | N = 0 }
108ce214:		0000: 000021c2 00000000
t3		opcode: (null) (4c) (4 dwords)
108ce21c:		0000: c0024c00 00000000 00000000 012b012b
t0		write RB_MRT[0].BUF_INFO (20a5)
			RB_MRT[0].BUF_INFO: { COLOR_FORMAT = RB4_R8G8B8A8_UNORM | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WXYZ | COLOR_BUF_PITCH = 1280 }
			RB_MRT[0].BASE: 0
			RB_MRT[0].CONTROL3: { STRIDE = 1280 }
108ce22c:		0000: 000220a5 0014089a 00000000 00002800
t0		write RB_MRT[0x1].BUF_INFO (20aa)
			RB_MRT[0x1].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x1].BASE: 0
			RB_MRT[0x1].CONTROL3: { STRIDE = 0 }
108ce23c:		0000: 000220aa 00000080 00000000 00000000
t0		write RB_MRT[0x2].BUF_INFO (20af)
			RB_MRT[0x2].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x2].BASE: 0
			RB_MRT[0x2].CONTROL3: { STRIDE = 0 }
108ce24c:		0000: 000220af 00000080 00000000 00000000
t0		write RB_MRT[0x3].BUF_INFO (20b4)
			RB_MRT[0x3].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x3].BASE: 0
			RB_MRT[0x3].CONTROL3: { STRIDE = 0 }
108ce25c:		0000: 000220b4 00000080 00000000 00000000
t0		write RB_MRT[0x4].BUF_INFO (20b9)
			RB_MRT[0x4].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x4].BASE: 0
			RB_MRT[0x4].CONTROL3: { STRIDE = 0 }
108ce26c:		0000: 000220b9 00000080 00000000 00000000
t0		write RB_MRT[0x5].BUF_INFO (20be)
			RB_MRT[0x5].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x5].BASE: 0
			RB_MRT[0x5].CONTROL3: { STRIDE = 0 }
108ce27c:		0000: 000220be 00000080 00000000 00000000
t0		write RB_MRT[0x6].BUF_INFO (20c3)
			RB_MRT[0x6].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x6].BASE: 0
			RB_MRT[0x6].CONTROL3: { STRIDE = 0 }
108ce28c:		0000: 000220c3 00000080 00000000 00000000
t0		write RB_MRT[0x7].BUF_INFO (20c8)
			RB_MRT[0x7].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
			RB_MRT[0x7].BASE: 0
			RB_MRT[0x7].CONTROL3: { STRIDE = 0 }
108ce29c:		0000: 000220c8 00000080 00000000 00000000
t0		write RB_BIN_OFFSET (210d)
			RB_BIN_OFFSET: { X = 0 | Y = 0 }
108ce2ac:		0000: 0000210d 00000000
t0		write GRAS_SC_SCREEN_SCISSOR_TL (207c)
			GRAS_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 }
			GRAS_SC_SCREEN_SCISSOR_BR: { X = 299 | Y = 299 }
108ce2b4:		0000: 0001207c 00000000 012b012b
t0		write RB_RENDER_CONTROL (20a1)
			RB_RENDER_CONTROL: { 0x8 }
108ce2c0:		0000: 000020a1 00000008
t0		write CP_SCRATCH[0x6].REG (057e)
			CP_SCRATCH[0x6].REG: 0x73
			:0,0,115,0
108ce2c8:		0000: 0000057e 00000073
t3		opcode: CP_INDIRECT_BUFFER (3f) (3 dwords)
		ibaddr:109ce000
		ibsize:00000f2e
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x1
				:0,1,115,0
109ce000:			0000: 0000057d 00000001
t0			write RB_RENDER_COMPONENTS (20fb)
				RB_RENDER_COMPONENTS: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
109ce008:			0000: 000020fb 0000000f
t0			write RB_ALPHA_CONTROL (20f8)
				RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER }
109ce010:			0000: 000020f8 00000000
t0			write RB_STENCIL_CONTROL (2106)
				RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP }
				RB_STENCIL_CONTROL2: { 0 }
109ce018:			0000: 00012106 00000000 00000000
t0			write RB_STENCILREFMASK (210b)
				RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
				RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
109ce024:			0000: 0001210b 00000000 00000000
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_ALWAYS | Z_TEST_ENABLE }
109ce030:			0000: 00002101 80000076
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109ce038:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { FRONT_CW | LINEHALFWIDTH = 0.000000 | RENDERING_PASS }
109ce040:			0000: 00002078 00100004
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 }
				GRAS_SU_POINT_SIZE: 0.000000
109ce048:			0000: 00012070 00000000 00000000
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109ce054:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109ce064:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109ce06c:			0000: 000121c4 02000000 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109ce078:			0000: 0001209c 012b012b 00000000
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109ce084:			0000: c0002600 00000000
t0			write GRAS_CL_VPORT_XOFFSET_0 (2008)
				GRAS_CL_VPORT_XOFFSET_0: 150.000000
				GRAS_CL_VPORT_XSCALE_0: 150.000000
				GRAS_CL_VPORT_YOFFSET_0: 150.000000
				GRAS_CL_VPORT_YSCALE_0: -150.000000
				GRAS_CL_VPORT_ZOFFSET_0: 0.000000
				GRAS_CL_VPORT_ZSCALE_0: 1.000000
109ce08c:			0000: 00052008 43160000 43160000 43160000 c3160000 00000000 3f800000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109ce0a8:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109ce0b4:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109ce0bc:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109ce0d4:			0000: 000423c5 01000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109ce0ec:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109ce0f4:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 1
109ce0fc:			0000: 000022e5 00000001
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
				SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 }
109ce104:			0000: 000222c4 00200400 04000042 0000fc00
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x1073c000
109ce114:			0000: 000122e0 00000000 1073c000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109ce120:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 }
109ce128:			0000: 000122e8 00340400 8000003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x1073b000
109ce134:			0000: 000122ea 7e420000 1073b000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ce140:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ce148:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ce150:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109ce158:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109ce160:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109ce168:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109ce170:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109ce178:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 }
109ce19c:			0000: 00012140 40001000 00000000
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109ce1a8:			0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109ce1cc:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[03000000x_00000000x] end
				:0:0001:0001[00000000x_00000000x] nop
				:0:0002:0002[00000000x_00000000x] nop
				:0:0003:0003[00000000x_00000000x] nop
				:0:0004:0004[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): (cnt=0, max=0)
				- input (half): (cnt=0, max=0)
				- input (full): (cnt=0, max=0)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 5 instructions, 4 nops, 1 non-nops, (5 instlen), 0 last-baryf, 0 half, 0 full
				- shaderdb: 5 cat0, 0 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 0 (ss), 0 (sy)
109ce1f0:			0000: c0213000 00600000 00000000 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:1:0000:0000[20244000x_00000000x] mov.f32f32 r0.x, c0.x
				:1:0001:0001[20244001x_00000001x] mov.f32f32 r0.y, c0.y
				:1:0002:0002[20244002x_00000002x] mov.f32f32 r0.z, c0.z
				:1:0003:0003[20244003x_00000003x] mov.f32f32 r0.w, c0.w
				:0:0004:0004[03000000x_00000000x] end
				:0:0005:0005[00000000x_00000000x] nop
				:0:0006:0006[00000000x_00000000x] nop
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): (cnt=0, max=0)
				- max const: 3

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 0-3 (cnt=4, max=3)  (estimated)
				- shaderdb: 9 instructions, 4 nops, 5 non-nops, (9 instlen), 0 last-baryf, 0 half, 1 full
				- shaderdb: 5 cat0, 4 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 0 (ss), 0 (sy)
109ce27c:			0000: c0213000 00700000 00000000 00000000 20244000 00000001 20244001 00000002
109ce29c:			0020: 20244002 00000003 20244003 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (19 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109ce314:				0.000000 0.000000 0.000000 0.000000     -nan     -nan 0.000000 0.000000
109ce334:				0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000
109ce314:				0000: 00000000 00000000 00000000 00000000 ffffffff ffffffff 00000405 00000000
109ce334:				0020: 00000000 00000000 02070000 00000000 00000000 00000000 00000000 00000000
109ce308:			0000: c0113000 01300000 00000001 00000000 00000000 00000000 00000000 ffffffff
109ce328:			0020: ffffffff 00000405 00000000 00000000 00000000 02070000 00000000 00000000
*
t0			write RB_MRT[0].CONTROL (20a4)
				RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109ce354:			0000: 000020a4 0f000c00
t0			write RB_MRT[0].BLEND_CONTROL (20a8)
				RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce35c:			0000: 000020a8 00000000
t0			write RB_MRT[0x1].CONTROL (20a9)
				RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce364:			0000: 000020a9 00000c00
t0			write RB_MRT[0x1].BLEND_CONTROL (20ad)
				RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce36c:			0000: 000020ad 00000000
t0			write RB_MRT[0x2].CONTROL (20ae)
				RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce374:			0000: 000020ae 00000c00
t0			write RB_MRT[0x2].BLEND_CONTROL (20b2)
				RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce37c:			0000: 000020b2 00000000
t0			write RB_MRT[0x3].CONTROL (20b3)
				RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce384:			0000: 000020b3 00000c00
t0			write RB_MRT[0x3].BLEND_CONTROL (20b7)
				RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce38c:			0000: 000020b7 00000000
t0			write RB_MRT[0x4].CONTROL (20b8)
				RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce394:			0000: 000020b8 00000c00
t0			write RB_MRT[0x4].BLEND_CONTROL (20bc)
				RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce39c:			0000: 000020bc 00000000
t0			write RB_MRT[0x5].CONTROL (20bd)
				RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce3a4:			0000: 000020bd 00000c00
t0			write RB_MRT[0x5].BLEND_CONTROL (20c1)
				RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce3ac:			0000: 000020c1 00000000
t0			write RB_MRT[0x6].CONTROL (20c2)
				RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce3b4:			0000: 000020c2 00000c00
t0			write RB_MRT[0x6].BLEND_CONTROL (20c6)
				RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce3bc:			0000: 000020c6 00000000
t0			write RB_MRT[0x7].CONTROL (20c7)
				RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
109ce3c4:			0000: 000020c7 00000c00
t0			write RB_MRT[0x7].BLEND_CONTROL (20cb)
				RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce3cc:			0000: 000020cb 00000000
t0			write RB_FS_OUTPUT (20f9)
				RB_FS_OUTPUT: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND | SAMPLE_MASK = 0xffff }
109ce3d4:			0000: 000020f9 ffff0100
t0			write RB_BLEND_RED (20f0)
				RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
				RB_BLEND_RED_F32: 0.000000
				RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
				RB_BLEND_GREEN_F32: 0.000000
				RB_BLEND_BLUE: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
				RB_BLEND_BLUE_F32: 0.000000
				RB_BLEND_ALPHA: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
				RB_BLEND_ALPHA_F32: 0.000000
109ce3dc:			0000: 000720f0 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
				VFD_FETCH[0].INSTR_1: 0x1074a000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109ce400:			0000: 0003220a 0000060b 1074a000 00001000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109ce414:			0000: 0000228a 2c0000df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109ce41c:			0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109ce434:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109ce440:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109ce44c:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x2
				:0,1,115,2
109ce454:			0000: 0000057f 00000002
t3			opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
				{ PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_32_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 2 }
			draw[0] register values
!+	00000001			RBBM_PERFCTR_CTL: 0x1
!+	00000001			CP_SCRATCH[0x5].REG: 0x1
			:0,1,115,2
!+	00000073			CP_SCRATCH[0x6].REG: 0x73
			:0,1,115,2
!+	00000002			CP_SCRATCH[0x7].REG: 0x2
			:0,1,115,2
!+	0000014a			VSC_BIN_SIZE: { WIDTH = 320 | HEIGHT = 320 }
!+	10cdb000			VSC_SIZE_ADDRESS: 0x10cdb000
!+	01100000			VSC_PIPE_CONFIG[0].REG: { X = 0 | Y = 0 | W = 1 | H = 1 }
 +	00000000			VSC_PIPE_CONFIG[0x1].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
 +	00000000			VSC_PIPE_CONFIG[0x2].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
 +	00000000			VSC_PIPE_CONFIG[0x3].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
 +	00000000			VSC_PIPE_CONFIG[0x4].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
 +	00000000			VSC_PIPE_CONFIG[0x5].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
 +	00000000			VSC_PIPE_CONFIG[0x6].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
 +	00000000			VSC_PIPE_CONFIG[0x7].REG: { X = 0 | Y = 0 | W = 0 | H = 0 }
!+	10cdc000			VSC_PIPE_DATA_ADDRESS[0].REG: 0x10cdc000
!+	10d1c000			VSC_PIPE_DATA_ADDRESS[0x1].REG: 0x10d1c000
!+	10d5c000			VSC_PIPE_DATA_ADDRESS[0x2].REG: 0x10d5c000
!+	10d9c000			VSC_PIPE_DATA_ADDRESS[0x3].REG: 0x10d9c000
!+	10ddc000			VSC_PIPE_DATA_ADDRESS[0x4].REG: 0x10ddc000
!+	10e1c000			VSC_PIPE_DATA_ADDRESS[0x5].REG: 0x10e1c000
!+	10e5c000			VSC_PIPE_DATA_ADDRESS[0x6].REG: 0x10e5c000
!+	10e9c000			VSC_PIPE_DATA_ADDRESS[0x7].REG: 0x10e9c000
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x1].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x2].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x3].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x4].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x5].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x6].REG: 0x3ffe0
!+	0003ffe0			VSC_PIPE_DATA_LENGTH[0x7].REG: 0x3ffe0
 +	00000000			GRAS_DEBUG_ECO_CONTROL: 0
!+	00000006			UNKNOWN_0CC5: 0x6
 +	00000000			UNKNOWN_0CC6: 0
!+	012c012c			RB_FRAME_BUFFER_DIMENSION: { WIDTH = 300 | HEIGHT = 300 }
!+	00000001			UNKNOWN_0D01: 0x1
 +	00000000			HLSQ_MODE_CONTROL: 0
 +	00000000			UNKNOWN_0E42: 0
 +	00000000			UCHE_CACHE_MODE_CONTROL: 0
 +	00000000			UCHE_INVALIDATE0: 0
!+	00000012			UCHE_INVALIDATE1: 0x12
!+	00000007			UCHE_CACHE_WAYS_VFD: 0x7
!+	00040000			UNKNOWN_0EC2: 0x40000
!+	00000006			SP_MODE_CONTROL: 0x6
!+	0000003a			TPL1_TP_MODE_CONTROL: 0x3a
!+	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
 +	00000000			UNKNOWN_2001: 0
 +	00000000			GRAS_CNTL: { 0 }
 +	00000000			GRAS_CL_GB_CLIP_ADJ: { HORZ = 0 | VERT = 0 }
!+	43160000			GRAS_CL_VPORT_XOFFSET_0: 150.000000
!+	43160000			GRAS_CL_VPORT_XSCALE_0: 150.000000
!+	43160000			GRAS_CL_VPORT_YOFFSET_0: 150.000000
!+	c3160000			GRAS_CL_VPORT_YSCALE_0: -150.000000
 +	00000000			GRAS_CL_VPORT_ZOFFSET_0: 0.000000
!+	3f800000			GRAS_CL_VPORT_ZSCALE_0: 1.000000
 +	00000000			GRAS_SU_POINT_MINMAX: { MIN = 0.000000 | MAX = 0.000000 }
 +	00000000			GRAS_SU_POINT_SIZE: 0.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
!+	00000002			GRAS_DEPTH_CONTROL: { FORMAT = DEPTH4_24_8 }
!+	00100004			GRAS_SU_MODE_CONTROL: { FRONT_CW | LINEHALFWIDTH = 0.000000 | RENDERING_PASS }
!+	00000800			GRAS_SC_CONTROL: { RENDER_MODE = RB_RENDERING_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0 }
 +	00000000			GRAS_SC_SCREEN_SCISSOR_TL: { X = 0 | Y = 0 }
!+	012b012b			GRAS_SC_SCREEN_SCISSOR_BR: { X = 299 | Y = 299 }
!+	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	00010a0a			RB_MODE_CONTROL: { WIDTH = 320 | HEIGHT = 320 | ENABLE_GMEM }
!+	00000008			RB_RENDER_CONTROL: { 0x8 }
!+	00001000			RB_MSAA_CONTROL: { DISABLE | SAMPLES = 0 }
 +	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
!+	0f000c00			RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
!+	0014089a			RB_MRT[0].BUF_INFO: { COLOR_FORMAT = RB4_R8G8B8A8_UNORM | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WXYZ | COLOR_BUF_PITCH = 1280 }
 +	00000000			RB_MRT[0].BASE: 0
!+	00002800			RB_MRT[0].CONTROL3: { STRIDE = 1280 }
 +	00000000			RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x1].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x1].BASE: 0
 +	00000000			RB_MRT[0x1].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x2].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x2].BASE: 0
 +	00000000			RB_MRT[0x2].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x3].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x3].BASE: 0
 +	00000000			RB_MRT[0x3].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x4].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x4].BASE: 0
 +	00000000			RB_MRT[0x4].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x5].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x5].BASE: 0
 +	00000000			RB_MRT[0x5].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x6].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x6].BASE: 0
 +	00000000			RB_MRT[0x6].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	00000c00			RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0 }
!+	00000080			RB_MRT[0x7].BUF_INFO: { COLOR_FORMAT = 0 | COLOR_TILE_MODE = TILE4_2 | DITHER_MODE = DITHER_DISABLE | COLOR_SWAP = WZYX | COLOR_BUF_PITCH = 0 }
 +	00000000			RB_MRT[0x7].BASE: 0
 +	00000000			RB_MRT[0x7].CONTROL3: { STRIDE = 0 }
 +	00000000			RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
 +	00000000			UNKNOWN_20EF: 0
 +	00000000			RB_BLEND_RED: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
 +	00000000			RB_BLEND_RED_F32: 0.000000
 +	00000000			RB_BLEND_GREEN: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
 +	00000000			RB_BLEND_GREEN_F32: 0.000000
 +	00000000			RB_BLEND_BLUE: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
 +	00000000			RB_BLEND_BLUE_F32: 0.000000
 +	00000000			RB_BLEND_ALPHA: { UINT = 0 | SINT = 0 | FLOAT = 0.000000 }
 +	00000000			RB_BLEND_ALPHA_F32: 0.000000
 +	00000000			RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER }
!+	ffff0100			RB_FS_OUTPUT: { ENABLE_BLEND = 0 | INDEPENDENT_BLEND | SAMPLE_MASK = 0xffff }
!+	0000000f			RB_RENDER_COMPONENTS: { RT0 = 0xf | RT1 = 0 | RT2 = 0 | RT3 = 0 | RT4 = 0 | RT5 = 0 | RT6 = 0 | RT7 = 0 }
!+	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
!+	80000076			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_ALWAYS | Z_TEST_ENABLE }
!+	00064002			RB_DEPTH_INFO: { DEPTH_FORMAT = DEPTH4_24_8 | DEPTH_BASE = 0x64000 }
!+	00000028			RB_DEPTH_PITCH: 1280
!+	00000028			RB_DEPTH_PITCH2: 1280
 +	00000000			RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP }
 +	00000000			RB_STENCIL_CONTROL2: { 0 }
 +	00000000			RB_STENCIL_INFO: { STENCIL_BASE = 0 }
 +	00000000			RB_STENCIL_PITCH: 0
 +	00000000			RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
 +	00000000			RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
 +	00000000			RB_BIN_OFFSET: { X = 0 | Y = 0 }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
!+	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
!+	40001000			VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 }
 +	00000000			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 }
 +	00000000			VPC_VARYING_INTERP[0].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	00000000			UNKNOWN_2152: 0
 +	00000000			UNKNOWN_2153: 0
 +	00000000			UNKNOWN_2154: 0
 +	00000000			UNKNOWN_2155: 0
 +	00000000			UNKNOWN_2156: 0
 +	00000000			UNKNOWN_2157: 0
 +	00000000			PC_VSTREAM_CONTROL: { SIZE = 0 | N = 0 }
!+	0000001d			UNKNOWN_21C3: 0x1d
!+	02000000			PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST }
!+	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
!+	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			PC_GS_PARAM: { MAX_VERTICES = 0 | INVOCATIONS = 0 | PRIMTYPE = PC_DRAW_POINTS }
!+	00000001			UNKNOWN_21E6: 0x1
 +	00000000			PC_HS_PARAM: { VERTICES_OUT = 0 | SPACING = EQUAL_SPACING }
!+	041a0004			VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
!+	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
!+	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
!+	0000060b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
!+	1074a000			VFD_FETCH[0].INSTR_1: 0x1074a000
!+	00001000			VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 }
!+	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
!+	2c0000df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
!+	00140010			SP_SP_CTRL_REG: { 0x140010 }
!+	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00200400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	04000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
!+	0000fc00			SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 }
 +	00000000			UNKNOWN_22D7: 0
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	1073c000			SP_VS_OBJ_START: 0x1073c000
!+	08000001			SP_VS_PVT_MEM_PARAM: 0x8000001
!+	10cd7000			SP_VS_PVT_MEM_ADDR: 0x10cd7000
!+	00000001			SP_VS_LENGTH_REG: 1
!+	00340400			SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
!+	8000003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 }
!+	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	1073b000			SP_FS_OBJ_START: 0x1073b000
!+	08000001			SP_FS_PVT_MEM_PARAM: 0x8000001
!+	10cd9000			SP_FS_PVT_MEM_ADDR: 0x10cd9000
!+	00000001			SP_FS_LENGTH_REG: 1
!+	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
 +	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	00000000			TPL1_TP_TEX_OFFSET: 0
!+	00000010			TPL1_TP_TEX_COUNT: { VS = 16 | HS = 0 | DS = 0 | GS = 0 }
!+	00000010			TPL1_TP_FS_TEX_COUNT: 0x10
!+	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
!+	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
!+	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
!+	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
!+	01000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 }
!+	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
!+	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
!+	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
!+	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
!+	00000003			HLSQ_UPDATE_CONTROL: 0x3
109ce45c:			0000: c0023800 00000888 00000001 00000002
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x3
				:0,1,115,3
109ce46c:			0000: 0000057f 00000003
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x7
				:0,7,115,3
109ce474:			0000: 0000057d 00000007
t0			write RB_ALPHA_CONTROL (20f8)
				RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER }
109ce47c:			0000: 000020f8 00000000
t0			write RB_STENCIL_CONTROL (2106)
				RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP }
				RB_STENCIL_CONTROL2: { 0 }
109ce484:			0000: 00012106 00000000 00000000
t0			write RB_STENCILREFMASK (210b)
				RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
				RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
109ce490:			0000: 0001210b 00000000 00000000
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109ce49c:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109ce4a4:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
109ce4ac:			0000: 00002078 00100012
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
				GRAS_SU_POINT_SIZE: 1.000000
109ce4b4:			0000: 00012070 00100010 00000010
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109ce4c0:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109ce4d0:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109ce4d8:			0000: 000121c4 02000001 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109ce4e4:			0000: 0001209c 012b012b 00000000
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109ce4f0:			0000: c0002600 00000000
t0			write GRAS_CL_VPORT_XOFFSET_0 (2008)
				GRAS_CL_VPORT_XOFFSET_0: 150.000000
				GRAS_CL_VPORT_XSCALE_0: 150.000000
				GRAS_CL_VPORT_YOFFSET_0: 150.000000
				GRAS_CL_VPORT_YSCALE_0: -150.000000
				GRAS_CL_VPORT_ZOFFSET_0: 0.500000
				GRAS_CL_VPORT_ZSCALE_0: 0.500000
109ce4f8:			0000: 00052008 43160000 43160000 43160000 c3160000 3f000000 3f000000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109ce514:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109ce520:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109ce528:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109ce540:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109ce558:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109ce560:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109ce568:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
				SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109ce570:			0000: 000222c4 00201000 04000042 0010fc06
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109ce580:			0000: 000022c7 00001e0a
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109ce588:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd0000
109ce590:			0000: 000122e0 00000000 10cd0000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109ce59c:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109ce5a4:			0000: 000122e8 00340402 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x10cd2000
109ce5b0:			0000: 000122ea 7e420000 10cd2000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ce5bc:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ce5c4:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ce5cc:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109ce5d4:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109ce5dc:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109ce5e4:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109ce5ec:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109ce5f4:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109ce618:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0x55
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109ce624:			0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109ce648:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[63828006x_0000100cx] mad.f32 r1.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[63828009x_0001100fx] mad.f32 r2.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[63828007x_0000100dx] mad.f32 r1.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:1:0015:0015[20244002x_00000015x] mov.f32f32 r0.z, c5.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244003x_00000016x] mov.f32f32 r0.w, c5.z
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000017x] mov.f32f32 r1.x, c5.w
				:3:0020:0020[63828008x_0000100ex] mad.f32 r2.x, c3.z, r1.y, r0.x
				:1:0021:0021[20244000x_00000011x] mov.f32f32 r0.x, c4.y
				:2:0022:0022[40100002x_00021021x] add.f r0.z, c8.y, r0.z
				:2:0023:0023[4050040dx_00041017x] (sat)max.f r3.y, c5.w, r1.x
				:2:0024:0024[40100003x_00031022x] add.f r0.w, c8.z, r0.w
				:2:0025:0025[40700000x_00001011x] mul.f r0.x, c4.y, r0.x
				:0:0026:0026[00000000x_00000000x] nop
				:3:0027:0027[63808000x_00001010x] mad.f32 r0.x, c4.x, r0.y, r0.x
				:1:0028:0028[20244001x_00000012x] mov.f32f32 r0.y, c4.z
				:0:0029:0029[00000200x_00000000x] (rpt2)nop
				:3:0030:0032[63808000x_00001012x] mad.f32 r0.x, c4.z, r0.y, r0.x
				:1:0031:0033[20244001x_00000014x] mov.f32f32 r0.y, c5.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40100001x_00011020x] add.f r0.y, c8.x, r0.y
				:0:0034:0038[00000000x_00000000x] nop
				:4:0035:0039[80300000x_00000000x] rsq r0.x, r0.x
				:2:0036:0040[40701004x_00001011x] (ss)mul.f r1.x, c4.y, r0.x
				:0:0037:0041[00000200x_00000000x] (rpt2)nop
				:2:0038:0044[40700004x_10190004x] mul.f r1.x, r1.x, c6.y
				:2:0039:0045[40700005x_00001010x] mul.f r1.y, c4.x, r0.x
				:0:0040:0046[00000200x_00000000x] (rpt2)nop
				:3:0041:0049[63828004x_00041018x] mad.f32 r1.x, c6.x, r1.y, r1.x
				:2:0042:0050[40700000x_00001012x] mul.f r0.x, c4.z, r0.x
				:0:0043:0051[00000200x_00000000x] (rpt2)nop
				:3:0044:0054[63800000x_0004101ax] mad.f32 r0.x, c6.z, r0.x, r1.x
				:0:0045:0055[00000200x_00000000x] (rpt2)nop
				:2:0046:0058[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0047:0059[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0048:0060[00000100x_00000000x] (rpt1)nop
				:1:0049:0062[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0050:0063[63800001x_00011024x] mad.f32 r0.y, c9.x, r0.x, r0.y
				:3:0051:0064[63800002x_00021025x] mad.f32 r0.z, c9.y, r0.x, r0.z
				:3:0052:0065[63800000x_00031026x] mad.f32 r0.x, c9.z, r0.x, r0.w
				:3:0053:0066[6382040ax_00011028x] (sat)mad.f32 r2.z, c10.x, r1.x, r0.y
				:3:0054:0067[6382040bx_00021029x] (sat)mad.f32 r2.w, c10.y, r1.x, r0.z
				:3:0055:0068[6382040cx_0000102ax] (sat)mad.f32 r3.x, c10.z, r1.x, r0.x
				:0:0056:0069[03000000x_00000000x] end
				:0:0057:0070[00000000x_00000000x] nop
				:0:0058:0071[00000000x_00000000x] nop
				:0:0059:0072[00000000x_00000000x] nop
				:0:0060:0073[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-13 (cnt=14, max=13)
				- input (half): (cnt=0, max=0)
				- input (full): 2-5 (cnt=4, max=5)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 6-13 (cnt=8, max=13)  (estimated)
				- shaderdb: 74 instructions, 27 nops, 47 non-nops, (61 instlen), 0 last-baryf, 0 half, 4 full
				- shaderdb: 28 cat0, 8 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109ce66c:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109ce68c:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109ce6ac:			0040: 63828006 10010002 40700000 0001100f 63828009 00001005 63818000 00000010
109ce6cc:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 63828007 10020002
109ce6ec:			0080: 40700000 00000015 20244002 00001006 63818000 00000016 20244003 0000100a
109ce70c:			00a0: 63820000 00000017 20244004 0000100e 63828008 00000011 20244000 00021021
109ce72c:			00c0: 40100002 00041017 4050040d 00031022 40100003 00001011 40700000 00000000
109ce74c:			00e0: 00000000 00001010 63808000 00000012 20244001 00000000 00000200 00001012
109ce76c:			0100: 63808000 00000014 20244001 00000000 00000200 00011020 40100001 00000000
109ce78c:			0120: 00000000 00000000 80300000 00001011 40701004 00000000 00000200 10190004
109ce7ac:			0140: 40700004 00001010 40700005 00000000 00000200 00041018 63828004 00001012
109ce7cc:			0160: 40700000 00000000 00000200 0004101a 63800000 00000000 00000200 00001034
109ce7ec:			0180: 40b00004 00001034 40500000 00000000 00000100 00000004 200c4004 00011024
109ce80c:			01a0: 63800001 00021025 63800002 00031026 63800000 00011028 6382040a 00021029
109ce82c:			01c0: 6382040b 0000102a 6382040c 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[00000000x_00000000x] nop
				:6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1
				:6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1
				:6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1
				:6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1
				:2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x
				:0:0006:0006[03000000x_00000000x] end
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				:0:0009:0009[00000000x_00000000x] nop
				:0:0010:0010[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): 0-3 (cnt=4, max=3)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 11 instructions, 5 nops, 6 non-nops, (11 instlen), 5 last-baryf, 0 half, 1 full
				- shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109ce878:			0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002
109ce898:			0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000
109ce8b8:			0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109ce910:				4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020
109ce930:				2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502
109ce950:				0.000000 0.000000 1.000000 1.000000 0.160000 0.020000 0.000000 1.000000
109ce970:				0.039740 0.662886 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000
109ce990:				0.000000 0.000000 0.000000 1.000000 0.800000 0.100000 0.000000 1.000000
109ce9b0:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109ce910:				0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43
109ce930:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917
109ce950:				0040: 00000000 00000000 3f800000 3f800000 3e23d70b 3ca3d70b 00000000 3f800000
109ce970:				0060: 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000
109ce990:				0080: 00000000 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000
109ce9b0:				00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000
109ce904:			0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000
109ce924:			0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899
109ce944:			0040: c13f64ac 420e0660 421d1917 00000000 00000000 3f800000 3f800000 3e23d70b
109ce964:			0060: 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000
109ce984:			0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3f4ccccd
109ce9a4:			00a0: 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000 00000000
109ce9c4:			00c0: 00000000 00000000 3f800000
t3			opcode: CP_LOAD_STATE4 (30) (7 dwords)
				{ DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109ce9dc:				0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000
109ce9dc:				0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
109ce9d0:			0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
t0			write RB_MRT[0].CONTROL (20a4)
				RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109ce9ec:			0000: 000020a4 0f000c00
t0			write RB_MRT[0].BLEND_CONTROL (20a8)
				RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109ce9f4:			0000: 000020a8 00000000
t0			write RB_MRT[0x1].CONTROL (20a9)
				RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109ce9fc:			0000: 000020a9 0f000c00
t0			write RB_MRT[0x1].BLEND_CONTROL (20ad)
				RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea04:			0000: 000020ad 00000000
t0			write RB_MRT[0x2].CONTROL (20ae)
				RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109cea0c:			0000: 000020ae 0f000c00
t0			write RB_MRT[0x2].BLEND_CONTROL (20b2)
				RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea14:			0000: 000020b2 00000000
t0			write RB_MRT[0x3].CONTROL (20b3)
				RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109cea1c:			0000: 000020b3 0f000c00
t0			write RB_MRT[0x3].BLEND_CONTROL (20b7)
				RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea24:			0000: 000020b7 00000000
t0			write RB_MRT[0x4].CONTROL (20b8)
				RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109cea2c:			0000: 000020b8 0f000c00
t0			write RB_MRT[0x4].BLEND_CONTROL (20bc)
				RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea34:			0000: 000020bc 00000000
t0			write RB_MRT[0x5].CONTROL (20bd)
				RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109cea3c:			0000: 000020bd 0f000c00
t0			write RB_MRT[0x5].BLEND_CONTROL (20c1)
				RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea44:			0000: 000020c1 00000000
t0			write RB_MRT[0x6].CONTROL (20c2)
				RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109cea4c:			0000: 000020c2 0f000c00
t0			write RB_MRT[0x6].BLEND_CONTROL (20c6)
				RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea54:			0000: 000020c6 00000000
t0			write RB_MRT[0x7].CONTROL (20c7)
				RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
109cea5c:			0000: 000020c7 0f000c00
t0			write RB_MRT[0x7].BLEND_CONTROL (20cb)
				RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
109cea64:			0000: 000020cb 00000000
t0			write RB_FS_OUTPUT (20f9)
				RB_FS_OUTPUT: { ENABLE_BLEND = 0 | SAMPLE_MASK = 0xffff }
109cea6c:			0000: 000020f9 ffff0000
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
				VFD_FETCH[0].INSTR_1: 0x107cb000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109cea74:			0000: 0003220a 0000060b 107cb000 00100000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109cea88:			0000: 0000228a 2c0020df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109cea90:			0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109ceaa8:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109ceab4:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109ceac0:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x8
				:0,7,115,8
109ceac8:			0000: 0000057f 00000008
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 240 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0000 }
				{ INDX_SIZE = 480 }
			draw[1] register values
!+	00000007			CP_SCRATCH[0x5].REG: 0x7
			:0,7,115,8
!+	00000008			CP_SCRATCH[0x7].REG: 0x8
			:0,7,115,8
 +	00000000			UCHE_INVALIDATE0: 0
 +	00000012			UCHE_INVALIDATE1: 0x12
 +	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
 +	00000000			GRAS_CNTL: { 0 }
 +	43160000			GRAS_CL_VPORT_XOFFSET_0: 150.000000
 +	43160000			GRAS_CL_VPORT_XSCALE_0: 150.000000
 +	43160000			GRAS_CL_VPORT_YOFFSET_0: 150.000000
 +	c3160000			GRAS_CL_VPORT_YSCALE_0: -150.000000
!+	3f000000			GRAS_CL_VPORT_ZOFFSET_0: 0.500000
!+	3f000000			GRAS_CL_VPORT_ZSCALE_0: 0.500000
!+	00100010			GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
!+	00000010			GRAS_SU_POINT_SIZE: 1.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
!+	00100012			GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
 +	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
 +	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
 +	0f000c00			RB_MRT[0].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x1].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x1].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x2].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x2].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x3].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x3].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x4].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x4].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x5].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x5].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x6].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x6].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
!+	0f000c00			RB_MRT[0x7].CONTROL: { ROP_CODE = ROP_COPY | COMPONENT_ENABLE = 0xf }
 +	00000000			RB_MRT[0x7].BLEND_CONTROL: { RGB_SRC_FACTOR = FACTOR_ZERO | RGB_BLEND_OPCODE = BLEND_DST_PLUS_SRC | RGB_DEST_FACTOR = FACTOR_ZERO | ALPHA_SRC_FACTOR = FACTOR_ZERO | ALPHA_BLEND_OPCODE = BLEND_DST_PLUS_SRC | ALPHA_DEST_FACTOR = FACTOR_ZERO }
 +	00000000			RB_ALPHA_CONTROL: { ALPHA_REF = 0 | ALPHA_TEST_FUNC = FUNC_NEVER }
!+	ffff0000			RB_FS_OUTPUT: { ENABLE_BLEND = 0 | SAMPLE_MASK = 0xffff }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
!+	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	00000000			RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP }
 +	00000000			RB_STENCIL_CONTROL2: { 0 }
 +	00000000			RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
 +	00000000			RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0 }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
 +	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
!+	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
!+	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
!+	00000055			VPC_VARYING_INTERP[0].MODE: 0x55
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
!+	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	041a0004			VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
 +	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
 +	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
 +	0000060b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
!+	107cb000			VFD_FETCH[0].INSTR_1: 0x107cb000
!+	00100000			VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
 +	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
!+	2c0020df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00201000			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
 +	04000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
!+	0010fc06			SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
!+	00001e0a			SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
!+	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	10cd0000			SP_VS_OBJ_START: 0x10cd0000
!+	00000004			SP_VS_LENGTH_REG: 4
!+	00340402			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
!+	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	10cd2000			SP_FS_OBJ_START: 0x10cd2000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
 +	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
 +	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
 +	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
!+	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109cead0:			0000: c0053800 00000404 00000001 000000f0 00000000 10bd0000 000001e0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x9
				:0,7,115,9
109ceaec:			0000: 0000057f 00000009
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0xd
				:0,13,115,9
109ceaf4:			0000: 0000057d 0000000d
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109ceafc:			0000: 000121c4 02000001 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109ceb08:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109ceb14:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0xe
				:0,13,115,14
109ceb1c:			0000: 0000057f 0000000e
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd01e0 }
				{ INDX_SIZE = 240 }
			draw[2] register values
!+	0000000d			CP_SCRATCH[0x5].REG: 0xd
			:0,13,115,14
!+	0000000e			CP_SCRATCH[0x7].REG: 0xe
			:0,13,115,14
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109ceb24:			0000: c0053800 00000404 00000001 00000078 00000000 10bd01e0 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0xf
				:0,13,115,15
109ceb40:			0000: 0000057f 0000000f
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x13
				:0,19,115,15
109ceb48:			0000: 0000057d 00000013
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109ceb50:			0000: 000121c4 02000001 00000012
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109ceb5c:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109ceb70:				4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020
109ceb90:				2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502
109cebb0:				0.000000 0.000000 -1.000000 1.000000 0.160000 0.020000 0.000000 1.000000
109cebd0:				0.039740 0.662886 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000
109cebf0:				0.000000 0.000000 0.000000 1.000000 0.800000 0.100000 0.000000 1.000000
109cec10:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109ceb70:				0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43
109ceb90:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917
109cebb0:				0040: 00000000 00000000 bf800000 3f800000 3e23d70b 3ca3d70b 00000000 3f800000
109cebd0:				0060: 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000
109cebf0:				0080: 00000000 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000
109cec10:				00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000
109ceb64:			0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000
109ceb84:			0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899
109ceba4:			0040: c13f64ac 420e0660 421d1917 00000000 00000000 bf800000 3f800000 3e23d70b
109cebc4:			0060: 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000 3f800000
109cebe4:			0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3f4ccccd
109cec04:			00a0: 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000 00000000
109cec24:			00c0: 00000000 00000000 3f800000
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cec30:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cec3c:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x14
				:0,19,115,20
109cec44:			0000: 0000057f 00000014
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 240 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd02d0 }
				{ INDX_SIZE = 480 }
			draw[3] register values
!+	00000013			CP_SCRATCH[0x5].REG: 0x13
			:0,19,115,20
!+	00000014			CP_SCRATCH[0x7].REG: 0x14
			:0,19,115,20
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109cec4c:			0000: c0053800 00000404 00000001 000000f0 00000000 10bd02d0 000001e0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x15
				:0,19,115,21
109cec68:			0000: 0000057f 00000015
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x19
				:0,25,115,21
109cec70:			0000: 0000057d 00000019
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cec78:			0000: 000121c4 02000001 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cec84:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cec90:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x1a
				:0,25,115,26
109cec98:			0000: 0000057f 0000001a
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd04b0 }
				{ INDX_SIZE = 240 }
			draw[4] register values
!+	00000019			CP_SCRATCH[0x5].REG: 0x19
			:0,25,115,26
!+	0000001a			CP_SCRATCH[0x7].REG: 0x1a
			:0,25,115,26
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109ceca0:			0000: c0053800 00000404 00000001 00000078 00000000 10bd04b0 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x1b
				:0,25,115,27
109cecbc:			0000: 0000057f 0000001b
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x1f
				:0,31,115,27
109cecc4:			0000: 0000057d 0000001f
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109ceccc:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109cecd4:			0000: 00002073 00000000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cecdc:			0000: 000121c4 02000001 00000012
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109cece8:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109cecf0:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109ced08:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109ced20:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109ced28:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109ced30:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
				SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109ced38:			0000: 000222c4 00201400 08000042 0010fc0a
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109ced48:			0000: 000022c7 00001e0e
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109ced50:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd5000
109ced58:			0000: 000122e0 00000000 10cd5000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109ced64:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109ced6c:			0000: 000122e8 00340402 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x10cd2000
109ced78:			0000: 000122ea 7e420000 10cd2000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ced84:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ced8c:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109ced94:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109ced9c:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109ceda4:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109cedac:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109cedb4:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109cedbc:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109cede0:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0x55
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109cedec:			0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109cee10:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w
				:3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x
				:2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w
				:2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z
				:3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x
				:2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x
				:3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x
				:1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z
				:0:0027:0027[00000200x_00000000x] (rpt2)nop
				:2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w
				:0:0029:0031[00000000x_00000000x] nop
				:4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x
				:2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y
				:2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x
				:0:0035:0039[00000200x_00000000x] (rpt2)nop
				:3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x
				:2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x
				:0:0038:0044[00000200x_00000000x] (rpt2)nop
				:3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x
				:0:0040:0048[00000200x_00000000x] (rpt2)nop
				:2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0043:0053[00000100x_00000000x] (rpt1)nop
				:1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y
				:3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z
				:3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w
				:3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y
				:3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z
				:3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x
				:0:0051:0062[03000000x_00000000x] end
				:0:0052:0063[00000000x_00000000x] nop
				:0:0053:0064[00000000x_00000000x] nop
				:0:0054:0065[00000000x_00000000x] nop
				:0:0055:0066[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-8 10-17 (cnt=17, max=17)
				- input (half): (cnt=0, max=0)
				- input (full): 2-8 (cnt=7, max=8)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 10-17 (cnt=8, max=17)  (estimated)
				- shaderdb: 67 instructions, 23 nops, 44 non-nops, (56 instlen), 0 last-baryf, 0 half, 5 full
				- shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109cee34:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109cee54:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109cee74:			0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010
109cee94:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002
109ceeb4:			0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a
109ceed4:			00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d
109ceef4:			00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012
109cef14:			00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000
109cef34:			0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006
109cef54:			0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000
109cef74:			0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034
109cef94:			0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021
109cefb4:			0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026
109cefd4:			01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[00000000x_00000000x] nop
				:6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1
				:6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1
				:6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1
				:6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1
				:2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x
				:0:0006:0006[03000000x_00000000x] end
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				:0:0009:0009[00000000x_00000000x] nop
				:0:0010:0010[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): 0-3 (cnt=4, max=3)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 11 instructions, 5 nops, 6 non-nops, (11 instlen), 5 last-baryf, 0 half, 1 full
				- shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109cf040:			0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002
109cf060:			0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000
109cf080:			0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109cf0cc:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109cf0e0:				4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020
109cf100:				2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502
109cf120:				0.160000 0.020000 0.000000 1.000000 0.039740 0.662886 0.747665 0.000000
109cf140:				1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000
109cf160:				0.800000 0.100000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109cf180:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000
109cf0e0:				0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43
109cf100:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917
109cf120:				0040: 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000
109cf140:				0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000
109cf160:				0080: 3f4ccccd 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000
109cf180:				00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202
109cf0d4:			0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000
109cf0f4:			0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899
109cf114:			0040: c13f64ac 420e0660 421d1917 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e
109cf134:			0060: 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000
109cf154:			0080: 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000 00000000
109cf174:			00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000
109cf194:			00c0: 02020202 02020202 00000202
t3			opcode: CP_LOAD_STATE4 (30) (7 dwords)
				{ DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109cf1ac:				0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000
109cf1ac:				0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
109cf1a0:			0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT }
				VFD_FETCH[0].INSTR_1: 0x107cb000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109cf1bc:			0000: 0003220a 00080c0b 107cb000 00100000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT }
109cf1d0:			0000: 0000228a 6c0020df
t0			write VFD_FETCH[0x1].INSTR_0 (220e)
				VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 }
				VFD_FETCH[0x1].INSTR_1: 0x107cb00c
				VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 }
				VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 }
109cf1d8:			0000: 0003220e 00000c0b 107cb00c 000ffff4 00000001
t0			write VFD_DECODE[0x1].INSTR (228b)
				VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109cf1ec:			0000: 0000228b 2c0060df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109cf1f4:			0000: 00042200 082a0008 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109cf20c:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cf218:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cf224:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x20
				:0,31,115,32
109cf22c:			0000: 0000057f 00000020
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 480 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd05a0 }
				{ INDX_SIZE = 960 }
			draw[5] register values
!+	0000001f			CP_SCRATCH[0x5].REG: 0x1f
			:0,31,115,32
!+	00000020			CP_SCRATCH[0x7].REG: 0x20
			:0,31,115,32
 +	00000000			UCHE_INVALIDATE0: 0
 +	00000012			UCHE_INVALIDATE1: 0x12
 +	00000000			GRAS_CNTL: { 0 }
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
 +	00000055			VPC_VARYING_INTERP[0].MODE: 0x55
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
!+	082a0008			VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 }
 +	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
 +	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
!+	00080c0b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT }
 +	107cb000			VFD_FETCH[0].INSTR_1: 0x107cb000
 +	00100000			VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
 +	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
!+	00000c0b			VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 }
!+	107cb00c			VFD_FETCH[0x1].INSTR_1: 0x107cb00c
!+	000ffff4			VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 }
!+	00000001			VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 }
!+	6c0020df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT }
!+	2c0060df			VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00201400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	08000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
!+	0010fc0a			SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
!+	00001e0e			SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	10cd5000			SP_VS_OBJ_START: 0x10cd5000
 +	00000004			SP_VS_LENGTH_REG: 4
 +	00340402			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	10cd2000			SP_FS_OBJ_START: 0x10cd2000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
 +	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
 +	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
 +	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109cf234:			0000: c0053800 00000404 00000001 000001e0 00000000 10bd05a0 000003c0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x21
				:0,31,115,33
109cf250:			0000: 0000057f 00000021
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x25
				:0,37,115,33
109cf258:			0000: 0000057d 00000025
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109cf260:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109cf268:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
109cf270:			0000: 00002078 00100012
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
				GRAS_SU_POINT_SIZE: 1.000000
109cf278:			0000: 00012070 00100010 00000010
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109cf284:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109cf294:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cf29c:			0000: 000121c4 02000001 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109cf2a8:			0000: 0001209c 012b012b 00000000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109cf2b4:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109cf2c0:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109cf2c8:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfc00 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109cf2e0:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109cf2f8:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109cf300:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109cf308:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
				SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109cf310:			0000: 000222c4 00201400 08000042 0010fc0a
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109cf320:			0000: 000022c7 00001e0e
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109cf328:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd5000
109cf330:			0000: 000122e0 00000000 10cd5000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109cf33c:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109cf344:			0000: 000122e8 00340802 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x108cb000
109cf350:			0000: 000122ea 7e420000 108cb000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109cf35c:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109cf364:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109cf36c:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { IJ_PERSP }
109cf374:			0000: 00002003 00000001
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL }
109cf37c:			0000: 000020a3 00001000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109cf384:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109cf38c:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 }
109cf394:			0000: 000722f1 0001a002 00000002 00000002 00000002 00000002 00000002 00000002
109cf3b4:			0020: 00000002
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109cf3b8:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109cf3c4:			0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109cf3e8:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w
				:3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x
				:2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w
				:2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z
				:3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x
				:2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x
				:3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x
				:1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z
				:0:0027:0027[00000200x_00000000x] (rpt2)nop
				:2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w
				:0:0029:0031[00000000x_00000000x] nop
				:4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x
				:2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y
				:2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x
				:0:0035:0039[00000200x_00000000x] (rpt2)nop
				:3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x
				:2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x
				:0:0038:0044[00000200x_00000000x] (rpt2)nop
				:3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x
				:0:0040:0048[00000200x_00000000x] (rpt2)nop
				:2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0043:0053[00000100x_00000000x] (rpt1)nop
				:1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y
				:3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z
				:3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w
				:3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y
				:3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z
				:3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x
				:0:0051:0062[03000000x_00000000x] end
				:0:0052:0063[00000000x_00000000x] nop
				:0:0053:0064[00000000x_00000000x] nop
				:0:0054:0065[00000000x_00000000x] nop
				:0:0055:0066[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-8 10-17 (cnt=17, max=17)
				- input (half): (cnt=0, max=0)
				- input (full): 2-8 (cnt=7, max=8)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 10-17 (cnt=8, max=17)  (estimated)
				- shaderdb: 67 instructions, 23 nops, 44 non-nops, (56 instlen), 0 last-baryf, 0 half, 5 full
				- shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109cf40c:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109cf42c:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109cf44c:			0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010
109cf46c:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002
109cf48c:			0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a
109cf4ac:			00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d
109cf4cc:			00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012
109cf4ec:			00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000
109cf50c:			0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006
109cf52c:			0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000
109cf54c:			0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034
109cf56c:			0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021
109cf58c:			0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026
109cf5ac:			01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[47300002x_00002000x] bary.f r0.z, 0, r0.x
				:2:0001:0001[47300003x_00002001x] bary.f r0.w, 1, r0.x
				:2:0002:0002[47300004x_00002002x] bary.f r1.x, 2, r0.x
				:2:0003:0003[47308005x_00002003x] bary.f (ei)r1.y, 3, r0.x
				:0:0004:0004[03000000x_00000000x] end
				:0:0005:0005[00000000x_00000000x] nop
				:0:0006:0006[00000000x_00000000x] nop
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0 2-5 (cnt=5, max=5)
				- input (half): (cnt=0, max=0)
				- input (full): 0 (cnt=1, max=0)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 2-5 (cnt=4, max=5)  (estimated)
				- shaderdb: 9 instructions, 4 nops, 5 non-nops, (9 instlen), 3 last-baryf, 0 half, 2 full
				- shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 0 (ss), 0 (sy)
109cf618:			0000: c0213000 00700000 00000000 00002000 47300002 00002001 47300003 00002002
109cf638:			0020: 47300004 00002003 47308005 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109cf6a4:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109cf6b8:				4.330127 0.855050 0.555273 0.469846 0.000000 4.698463 -0.404206 -0.342020
109cf6d8:				2.500000 -1.480991 -0.961761 -0.813798 -12.990380 -11.962078 35.506226 39.274502
109cf6f8:				0.160000 0.020000 0.000000 1.000000 0.039740 0.662886 0.747665 0.000000
109cf718:				1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000
109cf738:				0.800000 0.100000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109cf758:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000
109cf6b8:				0000: 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000 409659cf becef409 beaf1d43
109cf6d8:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c14fd899 c13f64ac 420e0660 421d1917
109cf6f8:				0040: 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e 3f29b2e7 3f3f66f5 00000000
109cf718:				0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000
109cf738:				0080: 3f4ccccd 3dcccccd 00000000 3f800000 00000000 00000000 00000000 3f800000
109cf758:				00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202
109cf6ac:			0000: c0313000 03200000 00000001 408a9066 3f5ae494 3f0e265d 3ef08fb2 00000000
109cf6cc:			0020: 409659cf becef409 beaf1d43 40200000 bfbd9119 bf7635f5 bf50550b c14fd899
109cf6ec:			0040: c13f64ac 420e0660 421d1917 3e23d70b 3ca3d70b 00000000 3f800000 3d22c66e
109cf70c:			0060: 3f29b2e7 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000
109cf72c:			0080: 00000000 00000000 3f800000 3f4ccccd 3dcccccd 00000000 3f800000 00000000
109cf74c:			00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000
109cf76c:			00c0: 02020202 02020202 00000202
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cf778:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cf784:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x26
				:0,37,115,38
109cf78c:			0000: 0000057f 00000026
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0960 }
				{ INDX_SIZE = 240 }
			draw[6] register values
!+	00000025			CP_SCRATCH[0x5].REG: 0x25
			:0,37,115,38
!+	00000026			CP_SCRATCH[0x7].REG: 0x26
			:0,37,115,38
 +	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
!+	00000001			GRAS_CNTL: { IJ_PERSP }
 +	00100010			GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
 +	00000010			GRAS_SU_POINT_SIZE: 1.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
 +	00100012			GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
 +	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	00001000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
 +	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
!+	00000000			VPC_VARYING_INTERP[0].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
 +	00201400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
 +	08000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
 +	0010fc0a			SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
 +	00001e0e			SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
 +	10cd5000			SP_VS_OBJ_START: 0x10cd5000
 +	00000004			SP_VS_LENGTH_REG: 4
!+	00340802			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	108cb000			SP_FS_OBJ_START: 0x108cb000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	0001a002			SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM }
!+	00000002			SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfc00			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109cf794:			0000: c0053800 00000404 00000001 00000078 00000000 10bd0960 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x27
				:0,37,115,39
109cf7b0:			0000: 0000057f 00000027
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x2b
				:0,43,115,39
109cf7b8:			0000: 0000057d 0000002b
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109cf7c0:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109cf7c8:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
109cf7d0:			0000: 00002078 00100012
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
				GRAS_SU_POINT_SIZE: 1.000000
109cf7d8:			0000: 00012070 00100010 00000010
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109cf7e4:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109cf7f4:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cf7fc:			0000: 000121c4 02000001 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109cf808:			0000: 0001209c 012b012b 00000000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109cf814:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109cf820:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109cf828:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109cf840:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109cf858:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109cf860:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109cf868:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
				SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109cf870:			0000: 000222c4 00201000 04000042 0010fc06
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109cf880:			0000: 000022c7 00001e0a
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109cf888:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd0000
109cf890:			0000: 000122e0 00000000 10cd0000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109cf89c:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109cf8a4:			0000: 000122e8 00340402 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x10cd2000
109cf8b0:			0000: 000122ea 7e420000 10cd2000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109cf8bc:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109cf8c4:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109cf8cc:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109cf8d4:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109cf8dc:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109cf8e4:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109cf8ec:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109cf8f4:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109cf918:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0x55
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109cf924:			0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109cf948:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[63828006x_0000100cx] mad.f32 r1.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[63828009x_0001100fx] mad.f32 r2.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[63828007x_0000100dx] mad.f32 r1.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:1:0015:0015[20244002x_00000015x] mov.f32f32 r0.z, c5.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244003x_00000016x] mov.f32f32 r0.w, c5.z
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000017x] mov.f32f32 r1.x, c5.w
				:3:0020:0020[63828008x_0000100ex] mad.f32 r2.x, c3.z, r1.y, r0.x
				:1:0021:0021[20244000x_00000011x] mov.f32f32 r0.x, c4.y
				:2:0022:0022[40100002x_00021021x] add.f r0.z, c8.y, r0.z
				:2:0023:0023[4050040dx_00041017x] (sat)max.f r3.y, c5.w, r1.x
				:2:0024:0024[40100003x_00031022x] add.f r0.w, c8.z, r0.w
				:2:0025:0025[40700000x_00001011x] mul.f r0.x, c4.y, r0.x
				:0:0026:0026[00000000x_00000000x] nop
				:3:0027:0027[63808000x_00001010x] mad.f32 r0.x, c4.x, r0.y, r0.x
				:1:0028:0028[20244001x_00000012x] mov.f32f32 r0.y, c4.z
				:0:0029:0029[00000200x_00000000x] (rpt2)nop
				:3:0030:0032[63808000x_00001012x] mad.f32 r0.x, c4.z, r0.y, r0.x
				:1:0031:0033[20244001x_00000014x] mov.f32f32 r0.y, c5.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40100001x_00011020x] add.f r0.y, c8.x, r0.y
				:0:0034:0038[00000000x_00000000x] nop
				:4:0035:0039[80300000x_00000000x] rsq r0.x, r0.x
				:2:0036:0040[40701004x_00001011x] (ss)mul.f r1.x, c4.y, r0.x
				:0:0037:0041[00000200x_00000000x] (rpt2)nop
				:2:0038:0044[40700004x_10190004x] mul.f r1.x, r1.x, c6.y
				:2:0039:0045[40700005x_00001010x] mul.f r1.y, c4.x, r0.x
				:0:0040:0046[00000200x_00000000x] (rpt2)nop
				:3:0041:0049[63828004x_00041018x] mad.f32 r1.x, c6.x, r1.y, r1.x
				:2:0042:0050[40700000x_00001012x] mul.f r0.x, c4.z, r0.x
				:0:0043:0051[00000200x_00000000x] (rpt2)nop
				:3:0044:0054[63800000x_0004101ax] mad.f32 r0.x, c6.z, r0.x, r1.x
				:0:0045:0055[00000200x_00000000x] (rpt2)nop
				:2:0046:0058[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0047:0059[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0048:0060[00000100x_00000000x] (rpt1)nop
				:1:0049:0062[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0050:0063[63800001x_00011024x] mad.f32 r0.y, c9.x, r0.x, r0.y
				:3:0051:0064[63800002x_00021025x] mad.f32 r0.z, c9.y, r0.x, r0.z
				:3:0052:0065[63800000x_00031026x] mad.f32 r0.x, c9.z, r0.x, r0.w
				:3:0053:0066[6382040ax_00011028x] (sat)mad.f32 r2.z, c10.x, r1.x, r0.y
				:3:0054:0067[6382040bx_00021029x] (sat)mad.f32 r2.w, c10.y, r1.x, r0.z
				:3:0055:0068[6382040cx_0000102ax] (sat)mad.f32 r3.x, c10.z, r1.x, r0.x
				:0:0056:0069[03000000x_00000000x] end
				:0:0057:0070[00000000x_00000000x] nop
				:0:0058:0071[00000000x_00000000x] nop
				:0:0059:0072[00000000x_00000000x] nop
				:0:0060:0073[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-13 (cnt=14, max=13)
				- input (half): (cnt=0, max=0)
				- input (full): 2-5 (cnt=4, max=5)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 6-13 (cnt=8, max=13)  (estimated)
				- shaderdb: 74 instructions, 27 nops, 47 non-nops, (61 instlen), 0 last-baryf, 0 half, 4 full
				- shaderdb: 28 cat0, 8 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109cf96c:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109cf98c:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109cf9ac:			0040: 63828006 10010002 40700000 0001100f 63828009 00001005 63818000 00000010
109cf9cc:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 63828007 10020002
109cf9ec:			0080: 40700000 00000015 20244002 00001006 63818000 00000016 20244003 0000100a
109cfa0c:			00a0: 63820000 00000017 20244004 0000100e 63828008 00000011 20244000 00021021
109cfa2c:			00c0: 40100002 00041017 4050040d 00031022 40100003 00001011 40700000 00000000
109cfa4c:			00e0: 00000000 00001010 63808000 00000012 20244001 00000000 00000200 00001012
109cfa6c:			0100: 63808000 00000014 20244001 00000000 00000200 00011020 40100001 00000000
109cfa8c:			0120: 00000000 00000000 80300000 00001011 40701004 00000000 00000200 10190004
109cfaac:			0140: 40700004 00001010 40700005 00000000 00000200 00041018 63828004 00001012
109cfacc:			0160: 40700000 00000000 00000200 0004101a 63800000 00000000 00000200 00001034
109cfaec:			0180: 40b00004 00001034 40500000 00000000 00000100 00000004 200c4004 00011024
109cfb0c:			01a0: 63800001 00021025 63800002 00031026 63800000 00011028 6382040a 00021029
109cfb2c:			01c0: 6382040b 0000102a 6382040c 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[00000000x_00000000x] nop
				:6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1
				:6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1
				:6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1
				:6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1
				:2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x
				:0:0006:0006[03000000x_00000000x] end
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				:0:0009:0009[00000000x_00000000x] nop
				:0:0010:0010[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): 0-3 (cnt=4, max=3)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 11 instructions, 5 nops, 6 non-nops, (11 instlen), 5 last-baryf, 0 half, 1 full
				- shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109cfb78:			0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002
109cfb98:			0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000
109cfbb8:			0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109cfc04:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109cfc18:				4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309
109cfc38:				2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564
109cfc58:				0.000000 0.000000 1.000000 1.000000 0.000000 0.160000 0.040000 1.000000
109cfc78:				-0.064448 0.660942 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000
109cfc98:				0.000000 0.000000 0.000000 1.000000 0.000000 0.800000 0.200000 1.000000
109cfcb8:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109cfc18:				0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387
109cfc38:				0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0
109cfc58:				0040: 00000000 00000000 3f800000 3f800000 00000000 3e23d70b 3d23d70b 3f800000
109cfc78:				0060: bd83fd0e 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000
109cfc98:				0080: 00000000 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000
109cfcb8:				00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000
109cfc0c:			0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da
109cfc2c:			0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638
109cfc4c:			0040: c0d7e173 421b92d5 42288ff0 00000000 00000000 3f800000 3f800000 00000000
109cfc6c:			0060: 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000 3f800000
109cfc8c:			0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 00000000
109cfcac:			00a0: 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000 00000000
109cfccc:			00c0: 00000000 00000000 3f800000
t3			opcode: CP_LOAD_STATE4 (30) (7 dwords)
				{ DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109cfce4:				0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000
109cfce4:				0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
109cfcd8:			0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
				VFD_FETCH[0].INSTR_1: 0x107cb000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109cfcf4:			0000: 0003220a 0000060b 107cb000 00100000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109cfd08:			0000: 0000228a 2c0020df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109cfd10:			0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109cfd28:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cfd34:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cfd40:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x2c
				:0,43,115,44
109cfd48:			0000: 0000057f 0000002c
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0a50 }
				{ INDX_SIZE = 240 }
			draw[7] register values
!+	0000002b			CP_SCRATCH[0x5].REG: 0x2b
			:0,43,115,44
!+	0000002c			CP_SCRATCH[0x7].REG: 0x2c
			:0,43,115,44
 +	00000000			UCHE_INVALIDATE0: 0
 +	00000012			UCHE_INVALIDATE1: 0x12
 +	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
!+	00000000			GRAS_CNTL: { 0 }
 +	00100010			GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
 +	00000010			GRAS_SU_POINT_SIZE: 1.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
 +	00100012			GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
 +	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
 +	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
!+	00000055			VPC_VARYING_INTERP[0].MODE: 0x55
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
!+	041a0004			VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
 +	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
 +	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
!+	0000060b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
 +	107cb000			VFD_FETCH[0].INSTR_1: 0x107cb000
 +	00100000			VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
 +	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
!+	2c0020df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00201000			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	04000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
!+	0010fc06			SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
!+	00001e0a			SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	10cd0000			SP_VS_OBJ_START: 0x10cd0000
 +	00000004			SP_VS_LENGTH_REG: 4
!+	00340402			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	10cd2000			SP_FS_OBJ_START: 0x10cd2000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
!+	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109cfd50:			0000: c0053800 00000404 00000001 00000078 00000000 10bd0a50 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x2d
				:0,43,115,45
109cfd6c:			0000: 0000057f 0000002d
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x31
				:0,49,115,45
109cfd74:			0000: 0000057d 00000031
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cfd7c:			0000: 000121c4 02000001 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cfd88:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cfd94:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x32
				:0,49,115,50
109cfd9c:			0000: 0000057f 00000032
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 60 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0b40 }
				{ INDX_SIZE = 120 }
			draw[8] register values
!+	00000031			CP_SCRATCH[0x5].REG: 0x31
			:0,49,115,50
!+	00000032			CP_SCRATCH[0x7].REG: 0x32
			:0,49,115,50
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109cfda4:			0000: c0053800 00000404 00000001 0000003c 00000000 10bd0b40 00000078
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x33
				:0,49,115,51
109cfdc0:			0000: 0000057f 00000033
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x37
				:0,55,115,51
109cfdc8:			0000: 0000057d 00000037
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cfdd0:			0000: 000121c4 02000001 00000012
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109cfddc:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109cfdf0:				4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309
109cfe10:				2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564
109cfe30:				0.000000 0.000000 -1.000000 1.000000 0.000000 0.160000 0.040000 1.000000
109cfe50:				-0.064448 0.660942 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000
109cfe70:				0.000000 0.000000 0.000000 1.000000 0.000000 0.800000 0.200000 1.000000
109cfe90:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109cfdf0:				0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387
109cfe10:				0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0
109cfe30:				0040: 00000000 00000000 bf800000 3f800000 00000000 3e23d70b 3d23d70b 3f800000
109cfe50:				0060: bd83fd0e 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000
109cfe70:				0080: 00000000 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000
109cfe90:				00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000
109cfde4:			0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da
109cfe04:			0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638
109cfe24:			0040: c0d7e173 421b92d5 42288ff0 00000000 00000000 bf800000 3f800000 00000000
109cfe44:			0060: 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000 3f800000
109cfe64:			0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 00000000
109cfe84:			00a0: 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000 00000000
109cfea4:			00c0: 00000000 00000000 3f800000
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cfeb0:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cfebc:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x38
				:0,55,115,56
109cfec4:			0000: 0000057f 00000038
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0bb8 }
				{ INDX_SIZE = 240 }
			draw[9] register values
!+	00000037			CP_SCRATCH[0x5].REG: 0x37
			:0,55,115,56
!+	00000038			CP_SCRATCH[0x7].REG: 0x38
			:0,55,115,56
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109cfecc:			0000: c0053800 00000404 00000001 00000078 00000000 10bd0bb8 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x39
				:0,55,115,57
109cfee8:			0000: 0000057f 00000039
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x3d
				:0,61,115,57
109cfef0:			0000: 0000057d 0000003d
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cfef8:			0000: 000121c4 02000001 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109cff04:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109cff10:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x3e
				:0,61,115,62
109cff18:			0000: 0000057f 0000003e
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 60 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0ca8 }
				{ INDX_SIZE = 120 }
			draw[10] register values
!+	0000003d			CP_SCRATCH[0x5].REG: 0x3d
			:0,61,115,62
!+	0000003e			CP_SCRATCH[0x7].REG: 0x3e
			:0,61,115,62
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109cff20:			0000: c0053800 00000404 00000001 0000003c 00000000 10bd0ca8 00000078
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x3f
				:0,61,115,63
109cff3c:			0000: 0000057f 0000003f
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x43
				:0,67,115,63
109cff44:			0000: 0000057d 00000043
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109cff4c:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109cff54:			0000: 00002073 00000000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109cff5c:			0000: 000121c4 02000001 00000012
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109cff68:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109cff70:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109cff88:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109cffa0:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109cffa8:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109cffb0:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
				SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109cffb8:			0000: 000222c4 00201400 08000042 0010fc0a
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109cffc8:			0000: 000022c7 00001e0e
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109cffd0:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd5000
109cffd8:			0000: 000122e0 00000000 10cd5000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109cffe4:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109cffec:			0000: 000122e8 00340402 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x10cd2000
109cfff8:			0000: 000122ea 7e420000 10cd2000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d0004:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d000c:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d0014:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109d001c:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109d0024:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109d002c:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109d0034:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109d003c:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109d0060:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0x55
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109d006c:			0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109d0090:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w
				:3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x
				:2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w
				:2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z
				:3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x
				:2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x
				:3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x
				:1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z
				:0:0027:0027[00000200x_00000000x] (rpt2)nop
				:2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w
				:0:0029:0031[00000000x_00000000x] nop
				:4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x
				:2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y
				:2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x
				:0:0035:0039[00000200x_00000000x] (rpt2)nop
				:3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x
				:2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x
				:0:0038:0044[00000200x_00000000x] (rpt2)nop
				:3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x
				:0:0040:0048[00000200x_00000000x] (rpt2)nop
				:2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0043:0053[00000100x_00000000x] (rpt1)nop
				:1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y
				:3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z
				:3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w
				:3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y
				:3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z
				:3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x
				:0:0051:0062[03000000x_00000000x] end
				:0:0052:0063[00000000x_00000000x] nop
				:0:0053:0064[00000000x_00000000x] nop
				:0:0054:0065[00000000x_00000000x] nop
				:0:0055:0066[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-8 10-17 (cnt=17, max=17)
				- input (half): (cnt=0, max=0)
				- input (full): 2-8 (cnt=7, max=8)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 10-17 (cnt=8, max=17)  (estimated)
				- shaderdb: 67 instructions, 23 nops, 44 non-nops, (56 instlen), 0 last-baryf, 0 half, 5 full
				- shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d00b4:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109d00d4:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109d00f4:			0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010
109d0114:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002
109d0134:			0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a
109d0154:			00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d
109d0174:			00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012
109d0194:			00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000
109d01b4:			0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006
109d01d4:			0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000
109d01f4:			0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034
109d0214:			0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021
109d0234:			0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026
109d0254:			01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[00000000x_00000000x] nop
				:6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1
				:6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1
				:6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1
				:6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1
				:2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x
				:0:0006:0006[03000000x_00000000x] end
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				:0:0009:0009[00000000x_00000000x] nop
				:0:0010:0010[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): 0-3 (cnt=4, max=3)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 11 instructions, 5 nops, 6 non-nops, (11 instlen), 5 last-baryf, 0 half, 1 full
				- shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d02c0:			0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002
109d02e0:			0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000
109d0300:			0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109d034c:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d0360:				4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309
109d0380:				2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564
109d03a0:				0.000000 0.160000 0.040000 1.000000 -0.064448 0.660942 0.747665 0.000000
109d03c0:				1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000
109d03e0:				0.000000 0.800000 0.200000 1.000000 0.000000 0.000000 0.000000 1.000000
109d0400:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000
109d0360:				0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387
109d0380:				0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0
109d03a0:				0040: 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000
109d03c0:				0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000
109d03e0:				0080: 00000000 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000
109d0400:				00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202
109d0354:			0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da
109d0374:			0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638
109d0394:			0040: c0d7e173 421b92d5 42288ff0 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e
109d03b4:			0060: 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000
109d03d4:			0080: 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000 00000000
109d03f4:			00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000
109d0414:			00c0: 02020202 02020202 00000202
t3			opcode: CP_LOAD_STATE4 (30) (7 dwords)
				{ DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d042c:				0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000
109d042c:				0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
109d0420:			0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT }
				VFD_FETCH[0].INSTR_1: 0x107cb000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109d043c:			0000: 0003220a 00080c0b 107cb000 00100000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT }
109d0450:			0000: 0000228a 6c0020df
t0			write VFD_FETCH[0x1].INSTR_0 (220e)
				VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 }
				VFD_FETCH[0x1].INSTR_1: 0x107cb00c
				VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 }
				VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 }
109d0458:			0000: 0003220e 00000c0b 107cb00c 000ffff4 00000001
t0			write VFD_DECODE[0x1].INSTR (228b)
				VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109d046c:			0000: 0000228b 2c0060df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109d0474:			0000: 00042200 082a0008 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109d048c:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d0498:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d04a4:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x44
				:0,67,115,68
109d04ac:			0000: 0000057f 00000044
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 240 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0d20 }
				{ INDX_SIZE = 480 }
			draw[11] register values
!+	00000043			CP_SCRATCH[0x5].REG: 0x43
			:0,67,115,68
!+	00000044			CP_SCRATCH[0x7].REG: 0x44
			:0,67,115,68
 +	00000000			UCHE_INVALIDATE0: 0
 +	00000012			UCHE_INVALIDATE1: 0x12
 +	00000000			GRAS_CNTL: { 0 }
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
 +	00000055			VPC_VARYING_INTERP[0].MODE: 0x55
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
!+	082a0008			VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 }
 +	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
 +	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
!+	00080c0b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT }
 +	107cb000			VFD_FETCH[0].INSTR_1: 0x107cb000
 +	00100000			VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
 +	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
 +	00000c0b			VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 }
 +	107cb00c			VFD_FETCH[0x1].INSTR_1: 0x107cb00c
 +	000ffff4			VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 }
 +	00000001			VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 }
!+	6c0020df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT }
 +	2c0060df			VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00201400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	08000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
!+	0010fc0a			SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
!+	00001e0e			SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	10cd5000			SP_VS_OBJ_START: 0x10cd5000
 +	00000004			SP_VS_LENGTH_REG: 4
 +	00340402			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	10cd2000			SP_FS_OBJ_START: 0x10cd2000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
 +	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
 +	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
 +	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109d04b4:			0000: c0053800 00000404 00000001 000000f0 00000000 10bd0d20 000001e0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x45
				:0,67,115,69
109d04d0:			0000: 0000057f 00000045
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x49
				:0,73,115,69
109d04d8:			0000: 0000057d 00000049
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109d04e0:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109d04e8:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
109d04f0:			0000: 00002078 00100012
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
				GRAS_SU_POINT_SIZE: 1.000000
109d04f8:			0000: 00012070 00100010 00000010
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109d0504:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109d0514:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d051c:			0000: 000121c4 02000001 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109d0528:			0000: 0001209c 012b012b 00000000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109d0534:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109d0540:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109d0548:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfc00 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109d0560:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109d0578:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109d0580:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109d0588:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
				SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109d0590:			0000: 000222c4 00201400 08000042 0010fc0a
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109d05a0:			0000: 000022c7 00001e0e
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109d05a8:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd5000
109d05b0:			0000: 000122e0 00000000 10cd5000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109d05bc:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109d05c4:			0000: 000122e8 00340802 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x108cb000
109d05d0:			0000: 000122ea 7e420000 108cb000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d05dc:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d05e4:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d05ec:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { IJ_PERSP }
109d05f4:			0000: 00002003 00000001
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL }
109d05fc:			0000: 000020a3 00001000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109d0604:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109d060c:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 }
109d0614:			0000: 000722f1 0001a002 00000002 00000002 00000002 00000002 00000002 00000002
109d0634:			0020: 00000002
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109d0638:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109d0644:			0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109d0668:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w
				:3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x
				:2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w
				:2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z
				:3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x
				:2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x
				:3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x
				:1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z
				:0:0027:0027[00000200x_00000000x] (rpt2)nop
				:2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w
				:0:0029:0031[00000000x_00000000x] nop
				:4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x
				:2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y
				:2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x
				:0:0035:0039[00000200x_00000000x] (rpt2)nop
				:3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x
				:2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x
				:0:0038:0044[00000200x_00000000x] (rpt2)nop
				:3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x
				:0:0040:0048[00000200x_00000000x] (rpt2)nop
				:2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0043:0053[00000100x_00000000x] (rpt1)nop
				:1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y
				:3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z
				:3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w
				:3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y
				:3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z
				:3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x
				:0:0051:0062[03000000x_00000000x] end
				:0:0052:0063[00000000x_00000000x] nop
				:0:0053:0064[00000000x_00000000x] nop
				:0:0054:0065[00000000x_00000000x] nop
				:0:0055:0066[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-8 10-17 (cnt=17, max=17)
				- input (half): (cnt=0, max=0)
				- input (full): 2-8 (cnt=7, max=8)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 10-17 (cnt=8, max=17)  (estimated)
				- shaderdb: 67 instructions, 23 nops, 44 non-nops, (56 instlen), 0 last-baryf, 0 half, 5 full
				- shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d068c:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109d06ac:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109d06cc:			0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010
109d06ec:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002
109d070c:			0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a
109d072c:			00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d
109d074c:			00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012
109d076c:			00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000
109d078c:			0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006
109d07ac:			0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000
109d07cc:			0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034
109d07ec:			0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021
109d080c:			0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026
109d082c:			01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[47300002x_00002000x] bary.f r0.z, 0, r0.x
				:2:0001:0001[47300003x_00002001x] bary.f r0.w, 1, r0.x
				:2:0002:0002[47300004x_00002002x] bary.f r1.x, 2, r0.x
				:2:0003:0003[47308005x_00002003x] bary.f (ei)r1.y, 3, r0.x
				:0:0004:0004[03000000x_00000000x] end
				:0:0005:0005[00000000x_00000000x] nop
				:0:0006:0006[00000000x_00000000x] nop
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0 2-5 (cnt=5, max=5)
				- input (half): (cnt=0, max=0)
				- input (full): 0 (cnt=1, max=0)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 2-5 (cnt=4, max=5)  (estimated)
				- shaderdb: 9 instructions, 4 nops, 5 non-nops, (9 instlen), 3 last-baryf, 0 half, 2 full
				- shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 0 (ss), 0 (sy)
109d0898:			0000: c0213000 00700000 00000000 00002000 47300002 00002001 47300003 00002002
109d08b8:			0020: 47300004 00002003 47308005 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109d0924:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d0938:				4.276816 0.109522 0.611668 0.517565 0.677381 4.774377 -0.312365 -0.264309
109d0958:				2.500000 -1.480991 -0.961761 -0.813798 13.423393 -6.746271 38.893391 42.140564
109d0978:				0.000000 0.160000 0.040000 1.000000 -0.064448 0.660942 0.747665 0.000000
109d0998:				1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000
109d09b8:				0.000000 0.800000 0.200000 1.000000 0.000000 0.000000 0.000000 1.000000
109d09d8:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000
109d0938:				0000: 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da 4098c7b2 be9fee59 be875387
109d0958:				0020: 40200000 bfbd9119 bf7635f5 bf50550b 4156c638 c0d7e173 421b92d5 42288ff0
109d0978:				0040: 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e 3f293379 3f3f66f5 00000000
109d0998:				0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000
109d09b8:				0080: 00000000 3f4ccccd 3e4ccccd 3f800000 00000000 00000000 00000000 3f800000
109d09d8:				00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202
109d092c:			0000: c0313000 03200000 00000001 4088dbad 3de04cdc 3f1c964b 3f047f2c 3f2d68da
109d094c:			0020: 4098c7b2 be9fee59 be875387 40200000 bfbd9119 bf7635f5 bf50550b 4156c638
109d096c:			0040: c0d7e173 421b92d5 42288ff0 00000000 3e23d70b 3d23d70b 3f800000 bd83fd0e
109d098c:			0060: 3f293379 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000
109d09ac:			0080: 00000000 00000000 3f800000 00000000 3f4ccccd 3e4ccccd 3f800000 00000000
109d09cc:			00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000
109d09ec:			00c0: 02020202 02020202 00000202
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d09f8:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d0a04:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x4a
				:0,73,115,74
109d0a0c:			0000: 0000057f 0000004a
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 60 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0f00 }
				{ INDX_SIZE = 120 }
			draw[12] register values
!+	00000049			CP_SCRATCH[0x5].REG: 0x49
			:0,73,115,74
!+	0000004a			CP_SCRATCH[0x7].REG: 0x4a
			:0,73,115,74
 +	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
!+	00000001			GRAS_CNTL: { IJ_PERSP }
 +	00100010			GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
 +	00000010			GRAS_SU_POINT_SIZE: 1.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
 +	00100012			GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
 +	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	00001000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
 +	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
!+	00000000			VPC_VARYING_INTERP[0].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
 +	00201400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
 +	08000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
 +	0010fc0a			SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
 +	00001e0e			SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
 +	10cd5000			SP_VS_OBJ_START: 0x10cd5000
 +	00000004			SP_VS_LENGTH_REG: 4
!+	00340802			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	108cb000			SP_FS_OBJ_START: 0x108cb000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	0001a002			SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM }
!+	00000002			SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfc00			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109d0a14:			0000: c0053800 00000404 00000001 0000003c 00000000 10bd0f00 00000078
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x4b
				:0,73,115,75
109d0a30:			0000: 0000057f 0000004b
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x4f
				:0,79,115,75
109d0a38:			0000: 0000057d 0000004f
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109d0a40:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109d0a48:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
109d0a50:			0000: 00002078 00100012
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
				GRAS_SU_POINT_SIZE: 1.000000
109d0a58:			0000: 00012070 00100010 00000010
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109d0a64:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109d0a74:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d0a7c:			0000: 000121c4 02000001 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109d0a88:			0000: 0001209c 012b012b 00000000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109d0a94:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109d0aa0:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109d0aa8:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109d0ac0:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109d0ad8:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109d0ae0:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109d0ae8:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
				SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109d0af0:			0000: 000222c4 00201000 04000042 0010fc06
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109d0b00:			0000: 000022c7 00001e0a
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109d0b08:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd0000
109d0b10:			0000: 000122e0 00000000 10cd0000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109d0b1c:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109d0b24:			0000: 000122e8 00340402 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x10cd2000
109d0b30:			0000: 000122ea 7e420000 10cd2000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d0b3c:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d0b44:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d0b4c:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109d0b54:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109d0b5c:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109d0b64:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109d0b6c:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109d0b74:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109d0b98:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0x55
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109d0ba4:			0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109d0bc8:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[63828006x_0000100cx] mad.f32 r1.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[63828009x_0001100fx] mad.f32 r2.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[63828007x_0000100dx] mad.f32 r1.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:1:0015:0015[20244002x_00000015x] mov.f32f32 r0.z, c5.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244003x_00000016x] mov.f32f32 r0.w, c5.z
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000017x] mov.f32f32 r1.x, c5.w
				:3:0020:0020[63828008x_0000100ex] mad.f32 r2.x, c3.z, r1.y, r0.x
				:1:0021:0021[20244000x_00000011x] mov.f32f32 r0.x, c4.y
				:2:0022:0022[40100002x_00021021x] add.f r0.z, c8.y, r0.z
				:2:0023:0023[4050040dx_00041017x] (sat)max.f r3.y, c5.w, r1.x
				:2:0024:0024[40100003x_00031022x] add.f r0.w, c8.z, r0.w
				:2:0025:0025[40700000x_00001011x] mul.f r0.x, c4.y, r0.x
				:0:0026:0026[00000000x_00000000x] nop
				:3:0027:0027[63808000x_00001010x] mad.f32 r0.x, c4.x, r0.y, r0.x
				:1:0028:0028[20244001x_00000012x] mov.f32f32 r0.y, c4.z
				:0:0029:0029[00000200x_00000000x] (rpt2)nop
				:3:0030:0032[63808000x_00001012x] mad.f32 r0.x, c4.z, r0.y, r0.x
				:1:0031:0033[20244001x_00000014x] mov.f32f32 r0.y, c5.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40100001x_00011020x] add.f r0.y, c8.x, r0.y
				:0:0034:0038[00000000x_00000000x] nop
				:4:0035:0039[80300000x_00000000x] rsq r0.x, r0.x
				:2:0036:0040[40701004x_00001011x] (ss)mul.f r1.x, c4.y, r0.x
				:0:0037:0041[00000200x_00000000x] (rpt2)nop
				:2:0038:0044[40700004x_10190004x] mul.f r1.x, r1.x, c6.y
				:2:0039:0045[40700005x_00001010x] mul.f r1.y, c4.x, r0.x
				:0:0040:0046[00000200x_00000000x] (rpt2)nop
				:3:0041:0049[63828004x_00041018x] mad.f32 r1.x, c6.x, r1.y, r1.x
				:2:0042:0050[40700000x_00001012x] mul.f r0.x, c4.z, r0.x
				:0:0043:0051[00000200x_00000000x] (rpt2)nop
				:3:0044:0054[63800000x_0004101ax] mad.f32 r0.x, c6.z, r0.x, r1.x
				:0:0045:0055[00000200x_00000000x] (rpt2)nop
				:2:0046:0058[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0047:0059[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0048:0060[00000100x_00000000x] (rpt1)nop
				:1:0049:0062[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0050:0063[63800001x_00011024x] mad.f32 r0.y, c9.x, r0.x, r0.y
				:3:0051:0064[63800002x_00021025x] mad.f32 r0.z, c9.y, r0.x, r0.z
				:3:0052:0065[63800000x_00031026x] mad.f32 r0.x, c9.z, r0.x, r0.w
				:3:0053:0066[6382040ax_00011028x] (sat)mad.f32 r2.z, c10.x, r1.x, r0.y
				:3:0054:0067[6382040bx_00021029x] (sat)mad.f32 r2.w, c10.y, r1.x, r0.z
				:3:0055:0068[6382040cx_0000102ax] (sat)mad.f32 r3.x, c10.z, r1.x, r0.x
				:0:0056:0069[03000000x_00000000x] end
				:0:0057:0070[00000000x_00000000x] nop
				:0:0058:0071[00000000x_00000000x] nop
				:0:0059:0072[00000000x_00000000x] nop
				:0:0060:0073[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-13 (cnt=14, max=13)
				- input (half): (cnt=0, max=0)
				- input (full): 2-5 (cnt=4, max=5)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 6-13 (cnt=8, max=13)  (estimated)
				- shaderdb: 74 instructions, 27 nops, 47 non-nops, (61 instlen), 0 last-baryf, 0 half, 4 full
				- shaderdb: 28 cat0, 8 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d0bec:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109d0c0c:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109d0c2c:			0040: 63828006 10010002 40700000 0001100f 63828009 00001005 63818000 00000010
109d0c4c:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 63828007 10020002
109d0c6c:			0080: 40700000 00000015 20244002 00001006 63818000 00000016 20244003 0000100a
109d0c8c:			00a0: 63820000 00000017 20244004 0000100e 63828008 00000011 20244000 00021021
109d0cac:			00c0: 40100002 00041017 4050040d 00031022 40100003 00001011 40700000 00000000
109d0ccc:			00e0: 00000000 00001010 63808000 00000012 20244001 00000000 00000200 00001012
109d0cec:			0100: 63808000 00000014 20244001 00000000 00000200 00011020 40100001 00000000
109d0d0c:			0120: 00000000 00000000 80300000 00001011 40701004 00000000 00000200 10190004
109d0d2c:			0140: 40700004 00001010 40700005 00000000 00000200 00041018 63828004 00001012
109d0d4c:			0160: 40700000 00000000 00000200 0004101a 63800000 00000000 00000200 00001034
109d0d6c:			0180: 40b00004 00001034 40500000 00000000 00000100 00000004 200c4004 00011024
109d0d8c:			01a0: 63800001 00021025 63800002 00031026 63800000 00011028 6382040a 00021029
109d0dac:			01c0: 6382040b 0000102a 6382040c 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[00000000x_00000000x] nop
				:6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1
				:6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1
				:6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1
				:6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1
				:2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x
				:0:0006:0006[03000000x_00000000x] end
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				:0:0009:0009[00000000x_00000000x] nop
				:0:0010:0010[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): 0-3 (cnt=4, max=3)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 11 instructions, 5 nops, 6 non-nops, (11 instlen), 5 last-baryf, 0 half, 1 full
				- shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d0df8:			0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002
109d0e18:			0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000
109d0e38:			0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109d0e84:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d0e98:				3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410
109d0eb8:				2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991
109d0ed8:				0.000000 0.000000 1.000000 1.000000 0.040000 0.040000 0.200000 1.000000
109d0ef8:				-0.244131 0.617574 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000
109d0f18:				0.000000 0.000000 0.000000 1.000000 0.200000 0.200000 1.000000 1.000000
109d0f38:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109d0e98:				0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc
109d0eb8:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f
109d0ed8:				0040: 00000000 00000000 3f800000 3f800000 3d23d70b 3d23d70b 3e4ccccd 3f800000
109d0ef8:				0060: be79fd80 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000
109d0f18:				0080: 00000000 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000
109d0f38:				00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000
109d0e8c:			0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23
109d0eac:			0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638
109d0ecc:			0040: 4188a9c2 4203c74b 42146d8f 00000000 00000000 3f800000 3f800000 3d23d70b
109d0eec:			0060: 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000 3f800000
109d0f0c:			0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3e4ccccd
109d0f2c:			00a0: 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000 00000000
109d0f4c:			00c0: 00000000 00000000 3f800000
t3			opcode: CP_LOAD_STATE4 (30) (7 dwords)
				{ DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d0f64:				0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000
109d0f64:				0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
109d0f58:			0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
				VFD_FETCH[0].INSTR_1: 0x107cb000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109d0f74:			0000: 0003220a 0000060b 107cb000 00100000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109d0f88:			0000: 0000228a 2c0020df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109d0f90:			0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109d0fa8:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d0fb4:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d0fc0:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x50
				:0,79,115,80
109d0fc8:			0000: 0000057f 00000050
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd0f78 }
				{ INDX_SIZE = 240 }
			draw[13] register values
!+	0000004f			CP_SCRATCH[0x5].REG: 0x4f
			:0,79,115,80
!+	00000050			CP_SCRATCH[0x7].REG: 0x50
			:0,79,115,80
 +	00000000			UCHE_INVALIDATE0: 0
 +	00000012			UCHE_INVALIDATE1: 0x12
 +	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
!+	00000000			GRAS_CNTL: { 0 }
 +	00100010			GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
 +	00000010			GRAS_SU_POINT_SIZE: 1.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
 +	00100012			GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
 +	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
 +	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
!+	00000055			VPC_VARYING_INTERP[0].MODE: 0x55
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
!+	041a0004			VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
 +	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
 +	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
!+	0000060b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
 +	107cb000			VFD_FETCH[0].INSTR_1: 0x107cb000
 +	00100000			VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
 +	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
!+	2c0020df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00201000			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 4 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	04000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
!+	0010fc06			SP_VS_PARAM_REG: { POSREGID = r1.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
!+	00001e0a			SP_VS_OUT[0].REG: { A_REGID = r2.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	10cd0000			SP_VS_OBJ_START: 0x10cd0000
 +	00000004			SP_VS_LENGTH_REG: 4
!+	00340402			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	10cd2000			SP_FS_OBJ_START: 0x10cd2000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
!+	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109d0fd0:			0000: c0053800 00000404 00000001 00000078 00000000 10bd0f78 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x51
				:0,79,115,81
109d0fec:			0000: 0000057f 00000051
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x55
				:0,85,115,81
109d0ff4:			0000: 0000057d 00000055
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d0ffc:			0000: 000121c4 02000001 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d1008:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d1014:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x56
				:0,85,115,86
109d101c:			0000: 0000057f 00000056
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 60 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd1068 }
				{ INDX_SIZE = 120 }
			draw[14] register values
!+	00000055			CP_SCRATCH[0x5].REG: 0x55
			:0,85,115,86
!+	00000056			CP_SCRATCH[0x7].REG: 0x56
			:0,85,115,86
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109d1024:			0000: c0053800 00000404 00000001 0000003c 00000000 10bd1068 00000078
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x57
				:0,85,115,87
109d1040:			0000: 0000057f 00000057
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x5b
				:0,91,115,87
109d1048:			0000: 0000057d 0000005b
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d1050:			0000: 000121c4 02000001 00000012
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109d105c:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d1070:				3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410
109d1090:				2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991
109d10b0:				0.000000 0.000000 -1.000000 1.000000 0.040000 0.040000 0.200000 1.000000
109d10d0:				-0.244131 0.617574 0.747665 0.000000 1.000000 0.000000 0.000000 0.000000
109d10f0:				0.000000 0.000000 0.000000 1.000000 0.200000 0.200000 1.000000 1.000000
109d1110:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109d1070:				0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc
109d1090:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f
109d10b0:				0040: 00000000 00000000 bf800000 3f800000 3d23d70b 3d23d70b 3e4ccccd 3f800000
109d10d0:				0060: be79fd80 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000
109d10f0:				0080: 00000000 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000
109d1110:				00a0: 00000000 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000
109d1064:			0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23
109d1084:			0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638
109d10a4:			0040: 4188a9c2 4203c74b 42146d8f 00000000 00000000 bf800000 3f800000 3d23d70b
109d10c4:			0060: 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000 3f800000
109d10e4:			0080: 00000000 00000000 00000000 00000000 00000000 00000000 3f800000 3e4ccccd
109d1104:			00a0: 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000 00000000
109d1124:			00c0: 00000000 00000000 3f800000
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d1130:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d113c:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x5c
				:0,91,115,92
109d1144:			0000: 0000057f 0000005c
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 120 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd10e0 }
				{ INDX_SIZE = 240 }
			draw[15] register values
!+	0000005b			CP_SCRATCH[0x5].REG: 0x5b
			:0,91,115,92
!+	0000005c			CP_SCRATCH[0x7].REG: 0x5c
			:0,91,115,92
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109d114c:			0000: c0053800 00000404 00000001 00000078 00000000 10bd10e0 000000f0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x5d
				:0,91,115,93
109d1168:			0000: 0000057f 0000005d
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x61
				:0,97,115,93
109d1170:			0000: 0000057d 00000061
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d1178:			0000: 000121c4 02000001 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d1184:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d1190:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x62
				:0,97,115,98
109d1198:			0000: 0000057f 00000062
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 60 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd11d0 }
				{ INDX_SIZE = 120 }
			draw[16] register values
!+	00000061			CP_SCRATCH[0x5].REG: 0x61
			:0,97,115,98
!+	00000062			CP_SCRATCH[0x7].REG: 0x62
			:0,97,115,98
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
109d11a0:			0000: c0053800 00000404 00000001 0000003c 00000000 10bd11d0 00000078
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x63
				:0,97,115,99
109d11bc:			0000: 0000057f 00000063
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x67
				:0,103,115,99
109d11c4:			0000: 0000057d 00000067
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109d11cc:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109d11d4:			0000: 00002073 00000000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d11dc:			0000: 000121c4 02000001 00000012
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109d11e8:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109d11f0:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109d1208:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109d1220:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109d1228:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109d1230:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
				SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109d1238:			0000: 000222c4 00201400 08000042 0010fc0a
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109d1248:			0000: 000022c7 00001e0e
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109d1250:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd5000
109d1258:			0000: 000122e0 00000000 10cd5000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109d1264:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109d126c:			0000: 000122e8 00340402 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x10cd2000
109d1278:			0000: 000122ea 7e420000 10cd2000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d1284:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d128c:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d1294:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { 0 }
109d129c:			0000: 00002003 00000000
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
109d12a4:			0000: 000020a3 00000000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109d12ac:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109d12b4:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
109d12bc:			0000: 000722f1 0001a000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109d12e0:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0x55
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109d12ec:			0000: 00072142 00000055 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109d1310:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w
				:3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x
				:2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w
				:2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z
				:3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x
				:2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x
				:3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x
				:1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z
				:0:0027:0027[00000200x_00000000x] (rpt2)nop
				:2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w
				:0:0029:0031[00000000x_00000000x] nop
				:4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x
				:2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y
				:2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x
				:0:0035:0039[00000200x_00000000x] (rpt2)nop
				:3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x
				:2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x
				:0:0038:0044[00000200x_00000000x] (rpt2)nop
				:3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x
				:0:0040:0048[00000200x_00000000x] (rpt2)nop
				:2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0043:0053[00000100x_00000000x] (rpt1)nop
				:1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y
				:3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z
				:3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w
				:3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y
				:3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z
				:3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x
				:0:0051:0062[03000000x_00000000x] end
				:0:0052:0063[00000000x_00000000x] nop
				:0:0053:0064[00000000x_00000000x] nop
				:0:0054:0065[00000000x_00000000x] nop
				:0:0055:0066[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-8 10-17 (cnt=17, max=17)
				- input (half): (cnt=0, max=0)
				- input (full): 2-8 (cnt=7, max=8)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 10-17 (cnt=8, max=17)  (estimated)
				- shaderdb: 67 instructions, 23 nops, 44 non-nops, (56 instlen), 0 last-baryf, 0 half, 5 full
				- shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d1334:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109d1354:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109d1374:			0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010
109d1394:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002
109d13b4:			0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a
109d13d4:			00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d
109d13f4:			00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012
109d1414:			00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000
109d1434:			0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006
109d1454:			0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000
109d1474:			0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034
109d1494:			0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021
109d14b4:			0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026
109d14d4:			01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:0:0000:0000[00000000x_00000000x] nop
				:6:0001:0001[c7c60000x_01c00000x] ldlv.u32 r0.x, l[0], 1
				:6:0002:0002[c7c60001x_01c00002x] ldlv.u32 r0.y, l[1], 1
				:6:0003:0003[c7c60002x_01c00004x] ldlv.u32 r0.z, l[2], 1
				:6:0004:0004[c7c60003x_01c00006x] ldlv.u32 r0.w, l[3], 1
				:2:0005:0005[473090fcx_00002000x] (ss)bary.f (ei)r63.x, 0, r0.x
				:0:0006:0006[03000000x_00000000x] end
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				:0:0009:0009[00000000x_00000000x] nop
				:0:0010:0010[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-3 (cnt=4, max=3)
				- input (half): (cnt=0, max=0)
				- input (full): 0-3 (cnt=4, max=3)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): (cnt=0, max=0)  (estimated)
				- shaderdb: 11 instructions, 5 nops, 6 non-nops, (11 instlen), 5 last-baryf, 0 half, 1 full
				- shaderdb: 6 cat0, 0 cat1, 1 cat2, 0 cat3, 0 cat4, 0 cat5, 4 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d1540:			0000: c0213000 00700000 00000000 00000000 00000000 01c00000 c7c60000 01c00002
109d1560:			0020: c7c60001 01c00004 c7c60002 01c00006 c7c60003 00002000 473090fc 00000000
109d1580:			0040: 03000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109d15cc:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d15e0:				3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410
109d1600:				2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991
109d1620:				0.040000 0.040000 0.200000 1.000000 -0.244131 0.617574 0.747665 0.000000
109d1640:				1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000
109d1660:				0.200000 0.200000 1.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109d1680:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000
109d15e0:				0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc
109d1600:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f
109d1620:				0040: 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000
109d1640:				0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000
109d1660:				0080: 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000
109d1680:				00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202
109d15d4:			0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23
109d15f4:			0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638
109d1614:			0040: 4188a9c2 4203c74b 42146d8f 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80
109d1634:			0060: 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000
109d1654:			0080: 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000
109d1674:			00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000
109d1694:			00c0: 02020202 02020202 00000202
t3			opcode: CP_LOAD_STATE4 (30) (7 dwords)
				{ DST_OFF = 13 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d16ac:				0.000000 -28026765312.000000 -28026765312.000000 -28026765312.000000
109d16ac:				0000: 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
109d16a0:			0000: c0053000 0060000d 00000001 00000000 d0d0d0d0 d0d0d0d0 d0d0d0d0
t0			write VFD_FETCH[0].INSTR_0 (220a)
				VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT }
				VFD_FETCH[0].INSTR_1: 0x107cb000
				VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
				VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
109d16bc:			0000: 0003220a 00080c0b 107cb000 00100000 00000001
t0			write VFD_DECODE[0].INSTR (228a)
				VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT }
109d16d0:			0000: 0000228a 6c0020df
t0			write VFD_FETCH[0x1].INSTR_0 (220e)
				VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 }
				VFD_FETCH[0x1].INSTR_1: 0x107cb00c
				VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 }
				VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 }
109d16d8:			0000: 0003220e 00000c0b 107cb00c 000ffff4 00000001
t0			write VFD_DECODE[0x1].INSTR (228b)
				VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
109d16ec:			0000: 0000228b 2c0060df
t0			write VFD_CONTROL_0 (2200)
				VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 }
				VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
				VFD_CONTROL_2: 0
				VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
				VFD_CONTROL_4: 0
109d16f4:			0000: 00042200 082a0008 fcfc0081 00000000 0000fc00 00000000
t0			write UCHE_INVALIDATE0 (0e8a)
				UCHE_INVALIDATE0: 0
				UCHE_INVALIDATE1: 0x12
109d170c:			0000: 00010e8a 00000000 00000012
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d1718:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d1724:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x68
				:0,103,115,104
109d172c:			0000: 0000057f 00000068
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 240 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd1248 }
				{ INDX_SIZE = 480 }
			draw[17] register values
!+	00000067			CP_SCRATCH[0x5].REG: 0x67
			:0,103,115,104
!+	00000068			CP_SCRATCH[0x7].REG: 0x68
			:0,103,115,104
 +	00000000			UCHE_INVALIDATE0: 0
 +	00000012			UCHE_INVALIDATE1: 0x12
 +	00000000			GRAS_CNTL: { 0 }
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
 +	00000055			VPC_VARYING_INTERP[0].MODE: 0x55
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
!+	082a0008			VFD_CONTROL_0: { TOTALATTRTOVS = 8 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 2 | STRMFETCHINSTRCNT = 2 | 0xa0000 }
 +	fcfc0081			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000			VFD_CONTROL_2: 0
 +	0000fc00			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000			VFD_CONTROL_4: 0
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
!+	00080c0b			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 | SWITCHNEXT }
 +	107cb000			VFD_FETCH[0].INSTR_1: 0x107cb000
 +	00100000			VFD_FETCH[0].INSTR_2: { SIZE = 0x100000 }
 +	00000001			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
 +	00000c0b			VFD_FETCH[0x1].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 24 }
 +	107cb00c			VFD_FETCH[0x1].INSTR_1: 0x107cb00c
 +	000ffff4			VFD_FETCH[0x1].INSTR_2: { SIZE = 0xffff4 }
 +	00000001			VFD_FETCH[0x1].INSTR_3: { STEPRATE = 1 }
!+	6c0020df			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID | SWITCHNEXT }
 +	2c0060df			VFD_DECODE[0x1].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r1.z | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00201400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	08000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
!+	0010fc0a			SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
!+	00001e0e			SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	10cd5000			SP_VS_OBJ_START: 0x10cd5000
 +	00000004			SP_VS_LENGTH_REG: 4
 +	00340402			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	10cd2000			SP_FS_OBJ_START: 0x10cd2000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
 +	0001a000			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = RB4_R8G8B8A8_UNORM }
 +	00000000			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	00000000			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
 +	fcfcfcfc			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109d1734:			0000: c0053800 00000404 00000001 000000f0 00000000 10bd1248 000001e0
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x69
				:0,103,115,105
109d1750:			0000: 0000057f 00000069
t0			write CP_SCRATCH[0x5].REG (057d)
				CP_SCRATCH[0x5].REG: 0x6d
				:0,109,115,105
109d1758:			0000: 0000057d 0000006d
t0			write RB_DEPTH_CONTROL (2101)
				RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
109d1760:			0000: 00002101 80000016
t0			write GRAS_ALPHA_CONTROL (2073)
				GRAS_ALPHA_CONTROL: { 0 }
109d1768:			0000: 00002073 00000000
t0			write GRAS_SU_MODE_CONTROL (2078)
				GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
109d1770:			0000: 00002078 00100012
t0			write GRAS_SU_POINT_MINMAX (2070)
				GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
				GRAS_SU_POINT_SIZE: 1.000000
109d1778:			0000: 00012070 00100010 00000010
t0			write GRAS_SU_POLY_OFFSET_SCALE (2074)
				GRAS_SU_POLY_OFFSET_SCALE: 0.000000
				GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
				GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
109d1784:			0000: 00022074 00000000 00000000 00000000
t0			write GRAS_CL_CLIP_CNTL (2000)
				GRAS_CL_CLIP_CNTL: { 0x80000 }
109d1794:			0000: 00002000 00080000
t0			write PC_PRIM_VTX_CNTL (21c4)
				PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
				PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
109d179c:			0000: 000121c4 02000001 00000012
t0			write GRAS_SC_WINDOW_SCISSOR_BR (209c)
				GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
				GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
109d17a8:			0000: 0001209c 012b012b 00000000
t0			write RB_VPORT_Z_CLAMP[0].MIN (2120)
				RB_VPORT_Z_CLAMP[0].MIN: 0
				RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
109d17b4:			0000: 00012120 00000000 00ffffff
t0			write HLSQ_UPDATE_CONTROL (23db)
				HLSQ_UPDATE_CONTROL: 0x3
109d17c0:			0000: 000023db 00000003
t0			write HLSQ_CONTROL_0_REG (23c0)
				HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
				HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
				HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
				HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
				HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
109d17c8:			0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfc00 00fcfcfc
t0			write HLSQ_VS_CONTROL_REG (23c5)
				HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
				HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
				HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
				HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
109d17e0:			0000: 000423c5 04000042 017e423e 007e4200 007e4200 007e4200
t0			write SP_SP_CTRL_REG (22c0)
				SP_SP_CTRL_REG: { 0x140010 }
109d17f8:			0000: 000022c0 00140010
t0			write SP_INSTR_CACHE_CTRL (22c1)
				SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
109d1800:			0000: 000022c1 000005ff
t0			write SP_VS_LENGTH_REG (22e5)
				SP_VS_LENGTH_REG: 4
109d1808:			0000: 000022e5 00000004
t0			write SP_VS_CTRL_REG0 (22c4)
				SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
				SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
				SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
109d1810:			0000: 000222c4 00201400 08000042 0010fc0a
t0			write SP_VS_OUT[0].REG (22c7)
				SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
109d1820:			0000: 000022c7 00001e0e
t0			write SP_VS_VPC_DST[0].REG (22d8)
				SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
109d1828:			0000: 000022d8 08080808
t0			write SP_VS_OBJ_OFFSET_REG (22e0)
				SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
				SP_VS_OBJ_START: 0x10cd5000
109d1830:			0000: 000122e0 00000000 10cd5000
t0			write SP_FS_LENGTH_REG (22ef)
				SP_FS_LENGTH_REG: 1
109d183c:			0000: 000022ef 00000001
t0			write SP_FS_CTRL_REG0 (22e8)
				SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
				SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
109d1844:			0000: 000122e8 00340802 8010003e
t0			write SP_FS_OBJ_OFFSET_REG (22ea)
				SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
				SP_FS_OBJ_START: 0x108cb000
109d1850:			0000: 000122ea 7e420000 108cb000
t0			write SP_HS_OBJ_OFFSET_REG (230d)
				SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d185c:			0000: 0000230d 7e420000
t0			write SP_DS_OBJ_OFFSET_REG (2334)
				SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d1864:			0000: 00002334 7e420000
t0			write SP_GS_OBJ_OFFSET_REG (235b)
				SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
109d186c:			0000: 0000235b 7e420000
t0			write GRAS_CNTL (2003)
				GRAS_CNTL: { IJ_PERSP }
109d1874:			0000: 00002003 00000001
t0			write RB_RENDER_CONTROL2 (20a3)
				RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL }
109d187c:			0000: 000020a3 00001000
t0			write RB_FS_OUTPUT_REG (2100)
				RB_FS_OUTPUT_REG: { MRT = 1 }
109d1884:			0000: 00002100 00000001
t0			write SP_FS_OUTPUT_REG (22f0)
				SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
109d188c:			0000: 000022f0 0000fc01
t0			write SP_FS_MRT[0].REG (22f1)
				SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM }
				SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 }
				SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 }
109d1894:			0000: 000722f1 0001a002 00000002 00000002 00000002 00000002 00000002 00000002
109d18b4:			0020: 00000002
t0			write VPC_ATTR (2140)
				VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
				VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
109d18b8:			0000: 00012140 42001004 00040400
t0			write VPC_VARYING_INTERP[0].MODE (2142)
				VPC_VARYING_INTERP[0].MODE: 0
				VPC_VARYING_INTERP[0x1].MODE: 0
				VPC_VARYING_INTERP[0x2].MODE: 0
				VPC_VARYING_INTERP[0x3].MODE: 0
				VPC_VARYING_INTERP[0x4].MODE: 0
				VPC_VARYING_INTERP[0x5].MODE: 0
				VPC_VARYING_INTERP[0x6].MODE: 0
				VPC_VARYING_INTERP[0x7].MODE: 0
109d18c4:			0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0			write VPC_VARYING_PS_REPL[0].MODE (214a)
				VPC_VARYING_PS_REPL[0].MODE: 0
				VPC_VARYING_PS_REPL[0x1].MODE: 0
				VPC_VARYING_PS_REPL[0x2].MODE: 0
				VPC_VARYING_PS_REPL[0x3].MODE: 0
				VPC_VARYING_PS_REPL[0x4].MODE: 0
				VPC_VARYING_PS_REPL[0x5].MODE: 0
				VPC_VARYING_PS_REPL[0x6].MODE: 0
				VPC_VARYING_PS_REPL[0x7].MODE: 0
109d18e8:			0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (131 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 4 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[40700000x_10000002x] mul.f r0.x, r0.z, c0.x
				:2:0001:0001[40700001x_10030002x] mul.f r0.y, r0.z, c0.w
				:3:0002:0002[63818000x_00001004x] mad.f32 r0.x, c1.x, r0.w, r0.x
				:3:0003:0003[63818001x_00011007x] mad.f32 r0.y, c1.w, r0.w, r0.y
				:3:0004:0004[63820000x_00001008x] mad.f32 r0.x, c2.x, r1.x, r0.x
				:3:0005:0005[63820001x_0001100bx] mad.f32 r0.y, c2.w, r1.x, r0.y
				:3:0006:0006[6382800ax_0000100cx] mad.f32 r2.z, c3.x, r1.y, r0.x
				:2:0007:0007[40700000x_10010002x] mul.f r0.x, r0.z, c0.y
				:3:0008:0008[6382800dx_0001100fx] mad.f32 r3.y, c3.w, r1.y, r0.y
				:3:0009:0009[63818000x_00001005x] mad.f32 r0.x, c1.y, r0.w, r0.x
				:1:0010:0010[20244001x_00000010x] mov.f32f32 r0.y, c4.x
				:3:0011:0011[63820000x_00001009x] mad.f32 r0.x, c2.y, r1.x, r0.x
				:0:0012:0012[00000000x_00000000x] nop
				:3:0013:0013[6382800bx_0000100dx] mad.f32 r2.w, c3.y, r1.y, r0.x
				:2:0014:0014[40700000x_10020002x] mul.f r0.x, r0.z, c0.z
				:2:0015:0015[40100001x_0001101cx] add.f r0.y, c7.x, r0.y
				:3:0016:0016[63818000x_00001006x] mad.f32 r0.x, c1.z, r0.w, r0.x
				:1:0017:0017[20244002x_00000011x] mov.f32f32 r0.z, c4.y
				:3:0018:0018[63820000x_0000100ax] mad.f32 r0.x, c2.z, r1.x, r0.x
				:1:0019:0019[20244004x_00000013x] mov.f32f32 r1.x, c4.w
				:3:0020:0020[6382800cx_0000100ex] mad.f32 r3.x, c3.z, r1.y, r0.x
				:2:0021:0021[40700000x_00070007x] mul.f r0.x, r1.w, r1.w
				:2:0022:0022[40100002x_0002101dx] add.f r0.z, c7.y, r0.z
				:3:0023:0023[63830000x_00000006x] mad.f32 r0.x, r1.z, r1.z, r0.x
				:2:0024:0024[40500411x_00041013x] (sat)max.f r4.y, c4.w, r1.x
				:3:0025:0025[63840000x_00000008x] mad.f32 r0.x, r2.x, r2.x, r0.x
				:1:0026:0026[20244003x_00000012x] mov.f32f32 r0.w, c4.z
				:0:0027:0027[00000200x_00000000x] (rpt2)nop
				:2:0028:0030[40100003x_0003101ex] add.f r0.w, c7.z, r0.w
				:0:0029:0031[00000000x_00000000x] nop
				:4:0030:0032[80300000x_00000000x] rsq r0.x, r0.x
				:2:0031:0033[40701004x_00000007x] (ss)mul.f r1.x, r1.w, r0.x
				:0:0032:0034[00000200x_00000000x] (rpt2)nop
				:2:0033:0037[40700004x_10150004x] mul.f r1.x, r1.x, c5.y
				:2:0034:0038[40700005x_00000006x] mul.f r1.y, r1.z, r0.x
				:0:0035:0039[00000200x_00000000x] (rpt2)nop
				:3:0036:0042[63828004x_00041014x] mad.f32 r1.x, c5.x, r1.y, r1.x
				:2:0037:0043[40700000x_00000008x] mul.f r0.x, r2.x, r0.x
				:0:0038:0044[00000200x_00000000x] (rpt2)nop
				:3:0039:0047[63800000x_00041016x] mad.f32 r0.x, c5.z, r0.x, r1.x
				:0:0040:0048[00000200x_00000000x] (rpt2)nop
				:2:0041:0051[40b00004x_00001034x] cmps.f.lt r1.x, c13.x, r0.x
				:2:0042:0052[40500000x_00001034x] max.f r0.x, c13.x, r0.x
				:0:0043:0053[00000100x_00000000x] (rpt1)nop
				:1:0044:0055[200c4004x_00000004x] cov.u32f32 r1.x, r1.x
				:3:0045:0056[63800001x_00011020x] mad.f32 r0.y, c8.x, r0.x, r0.y
				:3:0046:0057[63800002x_00021021x] mad.f32 r0.z, c8.y, r0.x, r0.z
				:3:0047:0058[63800000x_00031022x] mad.f32 r0.x, c8.z, r0.x, r0.w
				:3:0048:0059[6382040ex_00011024x] (sat)mad.f32 r3.z, c9.x, r1.x, r0.y
				:3:0049:0060[6382040fx_00021025x] (sat)mad.f32 r3.w, c9.y, r1.x, r0.z
				:3:0050:0061[63820410x_00001026x] (sat)mad.f32 r4.x, c9.z, r1.x, r0.x
				:0:0051:0062[03000000x_00000000x] end
				:0:0052:0063[00000000x_00000000x] nop
				:0:0053:0064[00000000x_00000000x] nop
				:0:0054:0065[00000000x_00000000x] nop
				:0:0055:0066[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0-8 10-17 (cnt=17, max=17)
				- input (half): (cnt=0, max=0)
				- input (full): 2-8 (cnt=7, max=8)
				- max const: 52

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 10-17 (cnt=8, max=17)  (estimated)
				- shaderdb: 67 instructions, 23 nops, 44 non-nops, (56 instlen), 0 last-baryf, 0 half, 5 full
				- shaderdb: 24 cat0, 5 cat1, 15 cat2, 22 cat3, 1 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 1 (ss), 0 (sy)
109d190c:			0000: c0813000 01200000 00000000 10000002 40700000 10030002 40700001 00001004
109d192c:			0020: 63818000 00011007 63818001 00001008 63820000 0001100b 63820001 0000100c
109d194c:			0040: 6382800a 10010002 40700000 0001100f 6382800d 00001005 63818000 00000010
109d196c:			0060: 20244001 00001009 63820000 00000000 00000000 0000100d 6382800b 10020002
109d198c:			0080: 40700000 0001101c 40100001 00001006 63818000 00000011 20244002 0000100a
109d19ac:			00a0: 63820000 00000013 20244004 0000100e 6382800c 00070007 40700000 0002101d
109d19cc:			00c0: 40100002 00000006 63830000 00041013 40500411 00000008 63840000 00000012
109d19ec:			00e0: 20244003 00000000 00000200 0003101e 40100003 00000000 00000000 00000000
109d1a0c:			0100: 80300000 00000007 40701004 00000000 00000200 10150004 40700004 00000006
109d1a2c:			0120: 40700005 00000000 00000200 00041014 63828004 00000008 40700000 00000000
109d1a4c:			0140: 00000200 00041016 63800000 00000000 00000200 00001034 40b00004 00001034
109d1a6c:			0160: 40500000 00000000 00000100 00000004 200c4004 00011020 63800001 00021021
109d1a8c:			0180: 63800002 00031022 63800000 00011024 6382040e 00021025 6382040f 00001026
109d1aac:			01a0: 63820410 00000000 03000000 00000000 00000000 00000000 00000000 00000000
*
t3			opcode: CP_LOAD_STATE4 (30) (35 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
				{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
				:2:0000:0000[47300002x_00002000x] bary.f r0.z, 0, r0.x
				:2:0001:0001[47300003x_00002001x] bary.f r0.w, 1, r0.x
				:2:0002:0002[47300004x_00002002x] bary.f r1.x, 2, r0.x
				:2:0003:0003[47308005x_00002003x] bary.f (ei)r1.y, 3, r0.x
				:0:0004:0004[03000000x_00000000x] end
				:0:0005:0005[00000000x_00000000x] nop
				:0:0006:0006[00000000x_00000000x] nop
				:0:0007:0007[00000000x_00000000x] nop
				:0:0008:0008[00000000x_00000000x] nop
				Register Stats:
				- used (half): (cnt=0, max=0)
				- used (full): 0 2-5 (cnt=5, max=5)
				- input (half): (cnt=0, max=0)
				- input (full): 0 (cnt=1, max=0)
				- max const: 0

				- output (half): (cnt=0, max=0)  (estimated)
				- output (full): 2-5 (cnt=4, max=5)  (estimated)
				- shaderdb: 9 instructions, 4 nops, 5 non-nops, (9 instlen), 3 last-baryf, 0 half, 2 full
				- shaderdb: 5 cat0, 0 cat1, 4 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
				- shaderdb: 0 (ss), 0 (sy)
109d1b18:			0000: c0213000 00700000 00000000 00002000 47300002 00002001 47300003 00002002
109d1b38:			0020: 47300004 00002003 47308005 00000000 03000000 00000000 00000000 00000000
*
t3			opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
109d1ba4:			0000: c0002600 00000000
t3			opcode: CP_LOAD_STATE4 (30) (51 dwords)
				{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 12 }
				{ STATE_TYPE = ST4_CONSTANTS | EXT_SRC_ADDR = 0 }
109d1bb8:				3.924428 -1.210718 0.674073 0.570369 1.829991 4.619613 -0.131666 -0.111410
109d1bd8:				2.500000 -1.480991 -0.961761 -0.813798 -13.423393 17.082890 32.944622 37.106991
109d1bf8:				0.040000 0.040000 0.200000 1.000000 -0.244131 0.617574 0.747665 0.000000
109d1c18:				1.000000 0.000000 0.000000 0.000000 0.000000 0.000000 0.000000 1.000000
109d1c38:				0.200000 0.200000 1.000000 1.000000 0.000000 0.000000 0.000000 1.000000
109d1c58:				0.000000 0.000000 0.000000 1.000000 0.000000 0.000000 0.000000 0.000000
109d1bb8:				0000: 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23 4093d3df be06d382 bde42adc
109d1bd8:				0020: 40200000 bfbd9119 bf7635f5 bf50550b c156c638 4188a9c2 4203c74b 42146d8f
109d1bf8:				0040: 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80 3f1e194f 3f3f66f5 00000000
109d1c18:				0060: 3f800000 00000000 00000000 00000000 00000000 00000000 00000000 3f800000
109d1c38:				0080: 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000 00000000 00000000 3f800000
109d1c58:				00a0: 00000000 00000000 00000000 3f800000 02020000 02020202 02020202 00000202
109d1bac:			0000: c0313000 03200000 00000001 407b29d2 bf9af8cb 3f2c9009 3f1203b9 3fea3d23
109d1bcc:			0020: 4093d3df be06d382 bde42adc 40200000 bfbd9119 bf7635f5 bf50550b c156c638
109d1bec:			0040: 4188a9c2 4203c74b 42146d8f 3d23d70b 3d23d70b 3e4ccccd 3f800000 be79fd80
109d1c0c:			0060: 3f1e194f 3f3f66f5 00000000 3f800000 00000000 00000000 00000000 00000000
109d1c2c:			0080: 00000000 00000000 3f800000 3e4ccccd 3e4ccccd 3f800000 3f800000 00000000
109d1c4c:			00a0: 00000000 00000000 3f800000 00000000 00000000 00000000 3f800000 02020000
109d1c6c:			00c0: 02020202 02020202 00000202
t0			write VFD_INDEX_OFFSET (2208)
				VFD_INDEX_OFFSET: 0
				UNKNOWN_2209: 0
109d1c78:			0000: 00012208 00000000 00000000
t0			write PC_RESTART_INDEX (21c6)
				PC_RESTART_INDEX: 0xffffffff
109d1c84:			0000: 000021c6 ffffffff
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x6e
				:0,109,115,110
109d1c8c:			0000: 0000057f 0000006e
t3			opcode: CP_DRAW_INDX_OFFSET (38) (7 dwords)
				{ PRIM_TYPE = DI_PT_TRILIST | SOURCE_SELECT = DI_SRC_SEL_DMA | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_16_BIT | PATCH_TYPE = TESS_QUADS }
				{ NUM_INSTANCES = 1 }
				{ NUM_INDICES = 60 }
				{ FIRST_INDX = 0 }
				{ INDX_BASE = 0x10bd1428 }
				{ INDX_SIZE = 120 }
			draw[18] register values
!+	0000006d			CP_SCRATCH[0x5].REG: 0x6d
			:0,109,115,110
!+	0000006e			CP_SCRATCH[0x7].REG: 0x6e
			:0,109,115,110
 +	00080000			GRAS_CL_CLIP_CNTL: { 0x80000 }
!+	00000001			GRAS_CNTL: { IJ_PERSP }
 +	00100010			GRAS_SU_POINT_MINMAX: { MIN = 1.000000 | MAX = 1.000000 }
 +	00000010			GRAS_SU_POINT_SIZE: 1.000000
 +	00000000			GRAS_ALPHA_CONTROL: { 0 }
 +	00000000			GRAS_SU_POLY_OFFSET_SCALE: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_OFFSET: 0.000000
 +	00000000			GRAS_SU_POLY_OFFSET_CLAMP: 0.000000
 +	00100012			GRAS_SU_MODE_CONTROL: { CULL_BACK | LINEHALFWIDTH = 0.500000 | RENDERING_PASS }
 +	012b012b			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	00001000			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 | IJ_PERSP_PIXEL }
 +	00000001			RB_FS_OUTPUT_REG: { MRT = 1 }
 +	80000016			RB_DEPTH_CONTROL: { Z_ENABLE | Z_WRITE_ENABLE | ZFUNC = FUNC_LESS | Z_TEST_ENABLE }
 +	00000000			RB_VPORT_Z_CLAMP[0].MIN: 0
 +	00ffffff			RB_VPORT_Z_CLAMP[0].MAX: 0xffffff
 +	42001004			VPC_ATTR: { TOTALATTR = 4 | THRDASSIGN = 1 | ENABLE | 0x40000000 }
 +	00040400			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 4 | NUMNONPOSVSVAR = 4 }
!+	00000000			VPC_VARYING_INTERP[0].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000			VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000			VPC_VARYING_PS_REPL[0x7].MODE: 0
 +	02000001			PC_PRIM_VTX_CNTL: { VAROUT = 1 | PROVOKING_VTX_LAST }
 +	00000012			PC_PRIM_VTX_CNTL2: { POLYMODE_FRONT_PTYPE = PC_DRAW_TRIANGLES | POLYMODE_BACK_PTYPE = PC_DRAW_TRIANGLES }
 +	ffffffff			PC_RESTART_INDEX: 0xffffffff
 +	00000000			VFD_INDEX_OFFSET: 0
 +	00000000			UNKNOWN_2209: 0
 +	00140010			SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
 +	00201400			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 5 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
 +	08000042			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 8 }
 +	0010fc0a			SP_VS_PARAM_REG: { POSREGID = r2.z | PSIZEREGID = r63.x | TOTALVSOUTVAR = 1 }
 +	00001e0e			SP_VS_OUT[0].REG: { A_REGID = r3.z | A_COMPMASK = 0xf | B_REGID = r0.x | B_COMPMASK = 0 }
 +	08080808			SP_VS_VPC_DST[0].REG: { OUTLOC0 = 8 | OUTLOC1 = 8 | OUTLOC2 = 8 | OUTLOC3 = 8 }
 +	00000000			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
 +	10cd5000			SP_VS_OBJ_START: 0x10cd5000
 +	00000004			SP_VS_LENGTH_REG: 4
!+	00340802			SP_FS_CTRL_REG0: { THREADMODE = MULTI | VARYING | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 2 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
 +	8010003e			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | VARYING | 0x80000000 }
 +	7e420000			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	108cb000			SP_FS_OBJ_START: 0x108cb000
 +	00000001			SP_FS_LENGTH_REG: 1
 +	0000fc01			SP_FS_OUTPUT_REG: { MRT = 1 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	0001a002			SP_FS_MRT[0].REG: { REGID = r0.z | MRTFORMAT = RB4_R8G8B8A8_UNORM }
!+	00000002			SP_FS_MRT[0x1].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x2].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x3].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x4].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x5].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x6].REG: { REGID = r0.z | MRTFORMAT = 0 }
!+	00000002			SP_FS_MRT[0x7].REG: { REGID = r0.z | MRTFORMAT = 0 }
 +	7e420000			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfc00			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r0.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
 +	04000042			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 4 }
 +	017e423e			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003			HLSQ_UPDATE_CONTROL: 0x3
109d1c94:			0000: c0053800 00000404 00000001 0000003c 00000000 10bd1428 00000078
t0			write CP_SCRATCH[0x7].REG (057f)
				CP_SCRATCH[0x7].REG: 0x6f
				:0,109,115,111
109d1cb0:			0000: 0000057f 0000006f
108ce2d0:		0000: c0013f00 109ce000 00000f2e
t2		nop
t0		write RB_DEPTH_CONTROL (2101)
			RB_DEPTH_CONTROL: { ZFUNC = FUNC_NEVER }
108ce2e8:		0000: 00002101 00000000
t0		write RB_STENCIL_CONTROL (2106)
			RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP }
			RB_STENCIL_CONTROL2: { 0 }
108ce2f0:		0000: 00012106 00000000 00000000
t0		write RB_STENCILREFMASK (210b)
			RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 }
			RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 }
108ce2fc:		0000: 0001210b ffff0000 ffff0000
t0		write GRAS_SU_MODE_CONTROL (2078)
			GRAS_SU_MODE_CONTROL: { LINEHALFWIDTH = 0.000000 }
108ce308:		0000: 00002078 00000000
t3		opcode: CP_WAIT_FOR_IDLE (26) (2 dwords)
108ce310:		0000: c0002600 00000000
t0		write GRAS_CL_CLIP_CNTL (2000)
			GRAS_CL_CLIP_CNTL: { 0x80000 }
108ce318:		0000: 00002000 00080000
t0		write GRAS_CL_VPORT_XOFFSET_0 (2008)
			GRAS_CL_VPORT_XOFFSET_0: 150.000000
			GRAS_CL_VPORT_XSCALE_0: 150.000000
			GRAS_CL_VPORT_YOFFSET_0: 150.000000
			GRAS_CL_VPORT_YSCALE_0: -150.000000
			GRAS_CL_VPORT_ZOFFSET_0: 0.000000
			GRAS_CL_VPORT_ZSCALE_0: 1.000000
108ce320:		0000: 00052008 43160000 43160000 43160000 c3160000 00000000 3f800000
t0		write RB_RENDER_CONTROL (20a1)
			RB_RENDER_CONTROL: { DISABLE_COLOR_PIPE | 0xa }
108ce33c:		0000: 000020a1 0000002a
t0		write GRAS_SC_CONTROL (207b)
			GRAS_SC_CONTROL: { RENDER_MODE = RB_RESOLVE_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0x1 }
108ce344:		0000: 0000207b 00001808
t0		write PC_PRIM_VTX_CNTL (21c4)
			PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST }
108ce34c:		0000: 000021c4 02000000
t0		write GRAS_ALPHA_CONTROL (2073)
			GRAS_ALPHA_CONTROL: { 0x2 }
108ce354:		0000: 00002073 00000002
t0		write GRAS_SC_WINDOW_SCISSOR_BR (209c)
			GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
			GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
108ce35c:		0000: 0001209c 012b012b 00000000
t0		write VFD_INDEX_OFFSET (2208)
			VFD_INDEX_OFFSET: 0
			UNKNOWN_2209: 0
108ce368:		0000: 00012208 00000000 00000000
t0		write HLSQ_UPDATE_CONTROL (23db)
			HLSQ_UPDATE_CONTROL: 0x3
108ce374:		0000: 000023db 00000003
t0		write HLSQ_CONTROL_0_REG (23c0)
			HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
			HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
			HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
			HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
			HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
108ce37c:		0000: 000423c0 28000250 fcfc0100 fff3f3f0 fcfcfcfc 00fcfcfc
t0		write HLSQ_VS_CONTROL_REG (23c5)
			HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 }
			HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
			HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
			HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
			HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
108ce394:		0000: 000423c5 01000042 017e423e 007e4200 007e4200 007e4200
t0		write SP_SP_CTRL_REG (22c0)
			SP_SP_CTRL_REG: { 0x140010 }
108ce3ac:		0000: 000022c0 00140010
t0		write SP_INSTR_CACHE_CTRL (22c1)
			SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
108ce3b4:		0000: 000022c1 000005ff
t0		write SP_VS_LENGTH_REG (22e5)
			SP_VS_LENGTH_REG: 1
108ce3bc:		0000: 000022e5 00000001
t0		write SP_VS_CTRL_REG0 (22c4)
			SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
			SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
			SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 }
108ce3c4:		0000: 000222c4 00200400 04000042 0000fc00
t0		write SP_VS_OBJ_OFFSET_REG (22e0)
			SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
			SP_VS_OBJ_START: 0x1073c000
108ce3d4:		0000: 000122e0 00000000 1073c000
t0		write SP_FS_LENGTH_REG (22ef)
			SP_FS_LENGTH_REG: 1
108ce3e0:		0000: 000022ef 00000001
t0		write SP_FS_CTRL_REG0 (22e8)
			SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
			SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 }
108ce3e8:		0000: 000122e8 00340400 8000003e
t0		write SP_FS_OBJ_OFFSET_REG (22ea)
			SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
			SP_FS_OBJ_START: 0x1073b000
108ce3f4:		0000: 000122ea 7e420000 1073b000
t0		write SP_HS_OBJ_OFFSET_REG (230d)
			SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
108ce400:		0000: 0000230d 7e420000
t0		write SP_DS_OBJ_OFFSET_REG (2334)
			SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
108ce408:		0000: 00002334 7e420000
t0		write SP_GS_OBJ_OFFSET_REG (235b)
			SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
108ce410:		0000: 0000235b 7e420000
t0		write GRAS_CNTL (2003)
			GRAS_CNTL: { 0 }
108ce418:		0000: 00002003 00000000
t0		write RB_RENDER_CONTROL2 (20a3)
			RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
108ce420:		0000: 000020a3 00000000
t0		write RB_FS_OUTPUT_REG (2100)
			RB_FS_OUTPUT_REG: { MRT = 0 }
108ce428:		0000: 00002100 00000000
t0		write SP_FS_OUTPUT_REG (22f0)
			SP_FS_OUTPUT_REG: { MRT = 0 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
108ce430:		0000: 000022f0 0000fc00
t0		write SP_FS_MRT[0].REG (22f1)
			SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
			SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
108ce438:		0000: 000722f1 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0		write VPC_ATTR (2140)
			VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 }
			VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 }
108ce45c:		0000: 00012140 40001000 00000000
t0		write VPC_VARYING_INTERP[0].MODE (2142)
			VPC_VARYING_INTERP[0].MODE: 0
			VPC_VARYING_INTERP[0x1].MODE: 0
			VPC_VARYING_INTERP[0x2].MODE: 0
			VPC_VARYING_INTERP[0x3].MODE: 0
			VPC_VARYING_INTERP[0x4].MODE: 0
			VPC_VARYING_INTERP[0x5].MODE: 0
			VPC_VARYING_INTERP[0x6].MODE: 0
			VPC_VARYING_INTERP[0x7].MODE: 0
108ce468:		0000: 00072142 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t0		write VPC_VARYING_PS_REPL[0].MODE (214a)
			VPC_VARYING_PS_REPL[0].MODE: 0
			VPC_VARYING_PS_REPL[0x1].MODE: 0
			VPC_VARYING_PS_REPL[0x2].MODE: 0
			VPC_VARYING_PS_REPL[0x3].MODE: 0
			VPC_VARYING_PS_REPL[0x4].MODE: 0
			VPC_VARYING_PS_REPL[0x5].MODE: 0
			VPC_VARYING_PS_REPL[0x6].MODE: 0
			VPC_VARYING_PS_REPL[0x7].MODE: 0
108ce48c:		0000: 0007214a 00000000 00000000 00000000 00000000 00000000 00000000 00000000
*
t3		opcode: CP_LOAD_STATE4 (30) (35 dwords)
			{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_VS_SHADER | NUM_UNIT = 1 }
			{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
			:0:0000:0000[03000000x_00000000x] end
			:0:0001:0001[00000000x_00000000x] nop
			:0:0002:0002[00000000x_00000000x] nop
			:0:0003:0003[00000000x_00000000x] nop
			:0:0004:0004[00000000x_00000000x] nop
			Register Stats:
			- used (half): (cnt=0, max=0)
			- used (full): (cnt=0, max=0)
			- input (half): (cnt=0, max=0)
			- input (full): (cnt=0, max=0)
			- max const: 0

			- output (half): (cnt=0, max=0)  (estimated)
			- output (full): (cnt=0, max=0)  (estimated)
			- shaderdb: 5 instructions, 4 nops, 1 non-nops, (5 instlen), 0 last-baryf, 0 half, 0 full
			- shaderdb: 5 cat0, 0 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
			- shaderdb: 0 (ss), 0 (sy)
108ce4b0:		0000: c0213000 00600000 00000000 00000000 03000000 00000000 00000000 00000000
*
t3		opcode: CP_LOAD_STATE4 (30) (35 dwords)
			{ DST_OFF = 0 | STATE_SRC = SS4_DIRECT | STATE_BLOCK = SB4_FS_SHADER | NUM_UNIT = 1 }
			{ STATE_TYPE = ST4_SHADER | EXT_SRC_ADDR = 0 }
			:1:0000:0000[20244000x_00000000x] mov.f32f32 r0.x, c0.x
			:1:0001:0001[20244001x_00000001x] mov.f32f32 r0.y, c0.y
			:1:0002:0002[20244002x_00000002x] mov.f32f32 r0.z, c0.z
			:1:0003:0003[20244003x_00000003x] mov.f32f32 r0.w, c0.w
			:0:0004:0004[03000000x_00000000x] end
			:0:0005:0005[00000000x_00000000x] nop
			:0:0006:0006[00000000x_00000000x] nop
			:0:0007:0007[00000000x_00000000x] nop
			:0:0008:0008[00000000x_00000000x] nop
			Register Stats:
			- used (half): (cnt=0, max=0)
			- used (full): 0-3 (cnt=4, max=3)
			- input (half): (cnt=0, max=0)
			- input (full): (cnt=0, max=0)
			- max const: 3

			- output (half): (cnt=0, max=0)  (estimated)
			- output (full): 0-3 (cnt=4, max=3)  (estimated)
			- shaderdb: 9 instructions, 4 nops, 5 non-nops, (9 instlen), 0 last-baryf, 0 half, 1 full
			- shaderdb: 5 cat0, 4 cat1, 0 cat2, 0 cat3, 0 cat4, 0 cat5, 0 cat6, 0 cat7
			- shaderdb: 0 (ss), 0 (sy)
108ce53c:		0000: c0213000 00700000 00000000 00000000 20244000 00000001 20244001 00000002
108ce55c:		0020: 20244002 00000003 20244003 00000000 03000000 00000000 00000000 00000000
*
t0		write VFD_FETCH[0].INSTR_0 (220a)
			VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
			VFD_FETCH[0].INSTR_1: 0x1074a000
			VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 }
			VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
108ce5c8:		0000: 0003220a 0000060b 1074a000 00001000 00000001
t0		write VFD_DECODE[0].INSTR (228a)
			VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
108ce5dc:		0000: 0000228a 2c0000df
t0		write VFD_CONTROL_0 (2200)
			VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
			VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
			VFD_CONTROL_2: 0
			VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
			VFD_CONTROL_4: 0
108ce5e4:		0000: 00042200 041a0004 fcfc0081 00000000 0000fc00 00000000
t0		write UCHE_INVALIDATE0 (0e8a)
			UCHE_INVALIDATE0: 0
			UCHE_INVALIDATE1: 0x12
108ce5fc:		0000: 00010e8a 00000000 00000012
t0		write RB_COPY_CONTROL (20fc)
			RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0x64000 }
			RB_COPY_DEST_BASE: { BASE = 0x10edc000 }
			RB_COPY_DEST_PITCH: { PITCH = 1280 }
			RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WZYX | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR }
108ce608:		0000: 000320fc 00064010 10edc000 00000028 0003c068
t0		write CP_SCRATCH[0x7].REG (057f)
			CP_SCRATCH[0x7].REG: 0x75
			:0,109,115,117
108ce61c:		0000: 0000057f 00000075
t3		opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
			{ PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_8_BIT | PATCH_TYPE = TESS_QUADS }
			{ NUM_INSTANCES = 1 }
			{ NUM_INDICES = 2 }
		draw[19] register values
!+	00000075		CP_SCRATCH[0x7].REG: 0x75
		:0,109,115,117
 +	00000000		UCHE_INVALIDATE0: 0
 +	00000012		UCHE_INVALIDATE1: 0x12
 +	00080000		GRAS_CL_CLIP_CNTL: { 0x80000 }
!+	00000000		GRAS_CNTL: { 0 }
 +	43160000		GRAS_CL_VPORT_XOFFSET_0: 150.000000
 +	43160000		GRAS_CL_VPORT_XSCALE_0: 150.000000
 +	43160000		GRAS_CL_VPORT_YOFFSET_0: 150.000000
 +	c3160000		GRAS_CL_VPORT_YSCALE_0: -150.000000
!+	00000000		GRAS_CL_VPORT_ZOFFSET_0: 0.000000
!+	3f800000		GRAS_CL_VPORT_ZSCALE_0: 1.000000
!+	00000002		GRAS_ALPHA_CONTROL: { 0x2 }
!+	00000000		GRAS_SU_MODE_CONTROL: { LINEHALFWIDTH = 0.000000 }
!+	00001808		GRAS_SC_CONTROL: { RENDER_MODE = RB_RESOLVE_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0x1 }
 +	012b012b		GRAS_SC_WINDOW_SCISSOR_BR: { X = 299 | Y = 299 }
 +	00000000		GRAS_SC_WINDOW_SCISSOR_TL: { X = 0 | Y = 0 }
!+	0000002a		RB_RENDER_CONTROL: { DISABLE_COLOR_PIPE | 0xa }
!+	00000000		RB_RENDER_CONTROL2: { COORD_MASK = 0 | MSAA_SAMPLES = 0 }
!+	00064010		RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0x64000 }
!+	10edc000		RB_COPY_DEST_BASE: { BASE = 0x10edc000 }
!+	00000028		RB_COPY_DEST_PITCH: { PITCH = 1280 }
!+	0003c068		RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WZYX | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR }
!+	00000000		RB_FS_OUTPUT_REG: { MRT = 0 }
!+	00000000		RB_DEPTH_CONTROL: { ZFUNC = FUNC_NEVER }
 +	00000000		RB_STENCIL_CONTROL: { FUNC = FUNC_NEVER | FAIL = STENCIL_KEEP | ZPASS = STENCIL_KEEP | ZFAIL = STENCIL_KEEP | FUNC_BF = FUNC_NEVER | FAIL_BF = STENCIL_KEEP | ZPASS_BF = STENCIL_KEEP | ZFAIL_BF = STENCIL_KEEP }
 +	00000000		RB_STENCIL_CONTROL2: { 0 }
!+	ffff0000		RB_STENCILREFMASK: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 }
!+	ffff0000		RB_STENCILREFMASK_BF: { STENCILREF = 0 | STENCILMASK = 0 | STENCILWRITEMASK = 0xff | 0xff000000 }
!+	40001000		VPC_ATTR: { TOTALATTR = 0 | THRDASSIGN = 1 | 0x40000000 }
!+	00000000		VPC_PACK: { NUMBYPASSVAR = 0 | NUMFPNONPOSVAR = 0 | NUMNONPOSVSVAR = 0 }
 +	00000000		VPC_VARYING_INTERP[0].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x1].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x2].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x3].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x4].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x5].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x6].MODE: 0
 +	00000000		VPC_VARYING_INTERP[0x7].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x1].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x2].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x3].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x4].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x5].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x6].MODE: 0
 +	00000000		VPC_VARYING_PS_REPL[0x7].MODE: 0
!+	02000000		PC_PRIM_VTX_CNTL: { VAROUT = 0 | PROVOKING_VTX_LAST }
!+	041a0004		VFD_CONTROL_0: { TOTALATTRTOVS = 4 | BYPASSATTROVS = 0 | STRMDECINSTRCNT = 1 | STRMFETCHINSTRCNT = 1 | 0xa0000 }
 +	fcfc0081		VFD_CONTROL_1: { MAXSTORAGE = 129 | REGID4VTX = r63.x | REGID4INST = r63.x }
 +	00000000		VFD_CONTROL_2: 0
 +	0000fc00		VFD_CONTROL_3: { REGID_VTXCNT = r63.x | REGID_TESSX = r0.x | REGID_TESSY = r0.x }
 +	00000000		VFD_CONTROL_4: 0
 +	00000000		VFD_INDEX_OFFSET: 0
 +	00000000		UNKNOWN_2209: 0
!+	0000060b		VFD_FETCH[0].INSTR_0: { FETCHSIZE = 11 | BUFSTRIDE = 12 }
!+	1074a000		VFD_FETCH[0].INSTR_1: 0x1074a000
!+	00001000		VFD_FETCH[0].INSTR_2: { SIZE = 0x1000 }
 +	00000001		VFD_FETCH[0].INSTR_3: { STEPRATE = 1 }
!+	2c0000df		VFD_DECODE[0].INSTR: { WRITEMASK = 0xf | CONSTFILL | FORMAT = VFMT4_32_32_32_FLOAT | REGID = r0.x | SWAP = WZYX | SHIFTCNT = 12 | LASTCOMPVALID }
 +	00140010		SP_SP_CTRL_REG: { 0x140010 }
 +	000005ff		SP_INSTR_CACHE_CTRL: { VS_BUFFER | FS_BUFFER | INSTR_BUFFER | 0x7f }
!+	00200400		SP_VS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 0 | THREADSIZE = TWO_QUADS | SUPERTHREADMODE }
!+	04000042		SP_VS_CTRL_REG1: { CONSTLENGTH = 66 | INITIALOUTSTANDING = 4 }
!+	0000fc00		SP_VS_PARAM_REG: { POSREGID = r0.x | PSIZEREGID = r63.x | TOTALVSOUTVAR = 0 }
 +	00000000		SP_VS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 }
!+	1073c000		SP_VS_OBJ_START: 0x1073c000
!+	00000001		SP_VS_LENGTH_REG: 1
!+	00340400		SP_FS_CTRL_REG0: { THREADMODE = MULTI | HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 1 | INOUTREGOVERLAP = 1 | THREADSIZE = FOUR_QUADS | SUPERTHREADMODE }
!+	8000003e		SP_FS_CTRL_REG1: { CONSTLENGTH = 62 | 0x80000000 }
 +	7e420000		SP_FS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
!+	1073b000		SP_FS_OBJ_START: 0x1073b000
 +	00000001		SP_FS_LENGTH_REG: 1
!+	0000fc00		SP_FS_OUTPUT_REG: { MRT = 0 | DEPTH_REGID = r63.x | SAMPLEMASK_REGID = r0.x }
!+	00000000		SP_FS_MRT[0].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x1].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x2].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x3].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x4].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x5].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x6].REG: { REGID = r0.x | MRTFORMAT = 0 }
!+	00000000		SP_FS_MRT[0x7].REG: { REGID = r0.x | MRTFORMAT = 0 }
 +	7e420000		SP_HS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000		SP_DS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	7e420000		SP_GS_OBJ_OFFSET_REG: { CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 }
 +	28000250		HLSQ_CONTROL_0_REG: { FSTHREADSIZE = FOUR_QUADS | FSSUPERTHREADENABLE | SPSHADERRESTART | CONSTMODE = 1 | SPCONSTFULLUPDATE }
 +	fcfc0100		HLSQ_CONTROL_1_REG: { VSTHREADSIZE = TWO_QUADS | VSSUPERTHREADENABLE | COORDREGID = r63.x | ZWCOORDREGID = r63.x }
 +	fff3f3f0		HLSQ_CONTROL_2_REG: { PRIMALLOCTHRESHOLD = 63 | FACEREGID = r63.x | SAMPLEID_REGID = r63.x | SAMPLEMASK_REGID = r63.x }
!+	fcfcfcfc		HLSQ_CONTROL_3_REG: { IJ_PERSP_PIXEL = r63.x | IJ_LINEAR_PIXEL = r63.x | IJ_PERSP_CENTROID = r63.x | IJ_LINEAR_CENTROID = r63.x }
 +	00fcfcfc		HLSQ_CONTROL_4_REG: { IJ_PERSP_SAMPLE = r63.x | IJ_LINEAR_SAMPLE = r63.x | 0xfc0000 }
!+	01000042		HLSQ_VS_CONTROL_REG: { CONSTLENGTH = 66 | CONSTOBJECTOFFSET = 0 | SHADEROBJOFFSET = 0 | INSTRLENGTH = 1 }
 +	017e423e		HLSQ_FS_CONTROL_REG: { CONSTLENGTH = 62 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 1 }
 +	007e4200		HLSQ_HS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200		HLSQ_DS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	007e4200		HLSQ_GS_CONTROL_REG: { CONSTLENGTH = 0 | CONSTOBJECTOFFSET = 66 | SHADEROBJOFFSET = 63 | INSTRLENGTH = 0 }
 +	00000003		HLSQ_UPDATE_CONTROL: 0x3
108ce624:		0000: c0023800 00000088 00000001 00000002
t0		write CP_SCRATCH[0x7].REG (057f)
			CP_SCRATCH[0x7].REG: 0x76
			:0,109,115,118
108ce634:		0000: 0000057f 00000076
t0		write RB_COPY_CONTROL (20fc)
			RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0 }
			RB_COPY_DEST_BASE: { BASE = 0x10f3c000 }
			RB_COPY_DEST_PITCH: { PITCH = 1280 }
			RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WXYZ | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR }
108ce63c:		0000: 000320fc 00000010 10f3c000 00000028 0003c168
t0		write CP_SCRATCH[0x7].REG (057f)
			CP_SCRATCH[0x7].REG: 0x77
			:0,109,115,119
108ce650:		0000: 0000057f 00000077
t3		opcode: CP_DRAW_INDX_OFFSET (38) (4 dwords)
			{ PRIM_TYPE = DI_PT_RECTLIST | SOURCE_SELECT = DI_SRC_SEL_AUTO_INDEX | VIS_CULL = IGNORE_VISIBILITY | INDEX_SIZE = INDEX4_SIZE_8_BIT | PATCH_TYPE = TESS_QUADS }
			{ NUM_INSTANCES = 1 }
			{ NUM_INDICES = 2 }
		draw[20] register values
!+	00000077		CP_SCRATCH[0x7].REG: 0x77
		:0,109,115,119
!+	00000010		RB_COPY_CONTROL: { MSAA_RESOLVE = MSAA_ONE | MODE = RB_COPY_RESOLVE | FASTCLEAR = 0 | GMEM_BASE = 0 }
!+	10f3c000		RB_COPY_DEST_BASE: { BASE = 0x10f3c000 }
 +	00000028		RB_COPY_DEST_PITCH: { PITCH = 1280 }
!+	0003c168		RB_COPY_DEST_INFO: { FORMAT = RB4_R8G8B8A8_UNORM | SWAP = WXYZ | DITHER_MODE = DITHER_DISABLE | COMPONENT_ENABLE = 0xf | ENDIAN = ENDIAN_NONE | TILE = TILE4_LINEAR }
108ce658:		0000: c0023800 00000088 00000001 00000002
t0		write CP_SCRATCH[0x7].REG (057f)
			CP_SCRATCH[0x7].REG: 0x78
			:0,109,115,120
108ce668:		0000: 0000057f 00000078
t0		write GRAS_SC_CONTROL (207b)
			GRAS_SC_CONTROL: { RENDER_MODE = RB_RENDERING_PASS | MSAA_SAMPLES = 0 | MSAA_DISABLE | RASTER_MODE = 0 }
108ce670:		0000: 0000207b 00000800
############################################################
vertices: 0
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