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authorKevin Brace <kevinbrace@gmx.com>2017-07-06 23:45:26 -0500
committerKevin Brace <kevinbrace@gmx.com>2017-07-06 23:45:26 -0500
commitea9544d56d005c4d7ff2a073403b9612c3460480 (patch)
tree890899d8b558cadbdbf656513839ac1c226d38de
parent508159caae82f03d5fa25622ea88a8be8eda1530 (diff)
Added via_fp_set_secondary_direct_display_period
This is an inline function. Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
-rw-r--r--drivers/gpu/drm/via/crtc_hw.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h
index 4becfc8350a8..5f578e458110 100644
--- a/drivers/gpu/drm/via/crtc_hw.h
+++ b/drivers/gpu/drm/via/crtc_hw.h
@@ -539,6 +539,23 @@ via_fp_set_secondary_direct_back_light_ctrl(void __iomem *regs,
}
/*
+ * Sets CX700 / VX700 or later chipset's FP secondary direct
+ * display period control.
+ */
+static inline void
+via_fp_set_secondary_direct_display_period(void __iomem *regs,
+ bool direct_on)
+{
+ /* 3X5.D3[7] - FP Secondary Direct Display Period Control
+ * 0: On
+ * 1: Off */
+ svga_wcrt_mask(regs, 0xD3,
+ direct_on ? 0x00 : BIT(7), BIT(7));
+ DRM_DEBUG_KMS("FP Secondary Direct Display Period "
+ "Control: %s\n", direct_on ? "On" : "Off");
+}
+
+/*
* Sets FPDP (Flat Panel Display Port) Low I/O pad state.
*/
static inline void