diff options
| author | Kevin Brace <kevinbrace@gmx.com> | 2017-07-06 20:43:11 -0500 |
|---|---|---|
| committer | Kevin Brace <kevinbrace@gmx.com> | 2017-07-06 20:43:11 -0500 |
| commit | de23a40d47a06c2f7eb8ea6c02e2417c03fab668 (patch) | |
| tree | 77f149333c1f0ef3f0fbbe0d8dacdd23c077b8ea | |
| parent | 5696b4ae31a68b6260fb9ed4e08558dcc11f6f5b (diff) | |
Added via_fp_set_primary_power_seq_type
This is an inline function.
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
| -rw-r--r-- | drivers/gpu/drm/via/crtc_hw.h | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h index b7394a9df466..e4e780fed3e2 100644 --- a/drivers/gpu/drm/via/crtc_hw.h +++ b/drivers/gpu/drm/via/crtc_hw.h @@ -307,6 +307,23 @@ via_analog_set_display_source(void __iomem *regs, u8 display_source) } /* + * Sets KM400 or later chipset's FP primary power sequence control + * type. + */ +static inline void +via_fp_set_primary_power_seq_type(void __iomem *regs, bool ctrl_type) +{ + /* 3X5.91[0] - FP Primary Power Sequence Control Type + * 0: Hardware Control + * 1: Software Control */ + svga_wcrt_mask(regs, 0x91, + ctrl_type ? 0x00 : BIT(0), BIT(0)); + DRM_DEBUG_KMS("FP Primary Power Sequence Control Type: " + "%s Control\n", + ctrl_type ? "Hardware" : "Software"); +} + +/* * Sets FPDP (Flat Panel Display Port) Low I/O pad state. */ static inline void |