diff options
| author | Kevin Brace <kevinbrace@gmx.com> | 2017-07-04 13:29:12 -0500 |
|---|---|---|
| committer | Kevin Brace <kevinbrace@gmx.com> | 2017-07-04 13:29:12 -0500 |
| commit | b6b5325157aab6cb173762435dd49059230698e4 (patch) | |
| tree | 27003ef1d9f1768fa1bfb63dcafd0a69334d18c7 | |
| parent | b7281b509bf267049951992bfeffc0f6541ba5a1 (diff) | |
Added via_dvp1_set_clock_drive_strength
This is an inline function.
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
| -rw-r--r-- | drivers/gpu/drm/via/crtc_hw.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h index af17c05c3ec8..bd8fbd28907c 100644 --- a/drivers/gpu/drm/via/crtc_hw.h +++ b/drivers/gpu/drm/via/crtc_hw.h @@ -184,6 +184,24 @@ via_dvp1_set_io_pad_state(void __iomem *regs, u8 io_pad_state) } /* + * Sets DVP1 (Digital Video Port 1) clock I/O pad drive strength. + */ +static inline void +via_dvp1_set_clock_drive_strength(void __iomem *regs, + u8 clock_drive_strength) +{ + /* 3C5.65[3:2] - DVP1 Clock Pads Driving Select [1:0] + * 00: lowest + * 01: low + * 10: high + * 11: highest */ + svga_wseq_mask(regs, 0x65, + clock_drive_strength << 2, BIT(3) | BIT(2)); + DRM_DEBUG_KMS("DVP1 Clock I/O Pad Drive Strength: %lu\n", + clock_drive_strength & (BIT(1) | BIT(0))); +} + +/* * Sets the display source of DVP1 (Digital Video Port 1) interface. */ static inline void |