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| author | Kevin Brace <kevinbrace@gmx.com> | 2017-07-06 22:02:57 -0500 |
|---|---|---|
| committer | Kevin Brace <kevinbrace@gmx.com> | 2017-07-06 22:02:57 -0500 |
| commit | 69888e5b0301de2234f38d5266233e85a3e1e0bc (patch) | |
| tree | 4ab374d764a10abd4a5f267381625a9980c899c7 | |
| parent | 19847441af97646d7164b5cd6713bf646d231bba (diff) | |
Added via_fp_set_primary_direct_display_period
This is an inline function.
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
| -rw-r--r-- | drivers/gpu/drm/via/crtc_hw.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h index 4c8378cdffce..8786840fdf49 100644 --- a/drivers/gpu/drm/via/crtc_hw.h +++ b/drivers/gpu/drm/via/crtc_hw.h @@ -404,6 +404,22 @@ via_fp_set_primary_direct_back_light_ctrl(void __iomem *regs, bool direct_on) } /* + * Sets KM400 or later chipset's FP primary direct display + * period control. + */ +static inline void +via_fp_set_primary_direct_display_period(void __iomem *regs, bool direct_on) +{ + /* 3X5.91[7] - FP Primary Direct Display Period Control + * 0: On + * 1: Off */ + svga_wcrt_mask(regs, 0x91, + direct_on ? 0x00 : BIT(7), BIT(7)); + DRM_DEBUG_KMS("FP Primary Direct Display Period Control: %s\n", + direct_on ? "On" : "Off"); +} + +/* * Sets FPDP (Flat Panel Display Port) Low I/O pad state. */ static inline void |