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authorJason Ekstrand <jason.ekstrand@intel.com>2015-01-31 14:05:50 -0800
committerJason Ekstrand <jason.ekstrand@intel.com>2015-01-31 14:05:50 -0800
commit6937556da9d7f42706b473497121bd6e45336965 (patch)
treeb041b97f7c17b89dbbd92a7b97380009da2c8ef8 /nir.xml
parenta0ee5238fae1ee768ecd9aba218676004529281e (diff)
Add more stuff to the NIR todo
Diffstat (limited to 'nir.xml')
-rw-r--r--nir.xml16
1 files changed, 16 insertions, 0 deletions
diff --git a/nir.xml b/nir.xml
index f6adb27..a9abb19 100644
--- a/nir.xml
+++ b/nir.xml
@@ -29,6 +29,11 @@
<task name="ARBvp" mesa="no">
Add support for ARB vertex programs.
</task>
+ <task name="fs-indirect" mesa="no">
+ Add support for indirect local variable accesses to the i965 FS
+ back-end. We already do this in vec4 by using our spill
+ scratch-space. We could do the same for the FS back-end.
+ </task>
</category>
<category name="Optimization and Analysis Passes">
<task name="GCM" mesa="no">
@@ -46,5 +51,16 @@
<task name="range" mesa="no">
Implement a control-flow and range analysis pass.
</task>
+ <task name="indirect" mesa="no">
+ Port the indirect local variable lowering pass to NIR. We have a
+ pass right now that lowers indirect local variable accesses to
+ binary-search if-ladders. It would be nice to be able to do that in
+ NIR so that NIR's superior alias analysis can be put to good use.
+ </task>
+ </category>
+ <category name="Wishlist">
+ <task name="i965-FS-SSA" mesa="no">
+ Convert the i965 FS backend to use SSA
+ </task>
</category>
</tasks>