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authorMatthias Hopf <mhopf@suse.de>2009-02-14 23:05:49 +0100
committerMatthias Hopf <mhopf@suse.de>2009-02-16 14:09:33 +0100
commit72840e2876c8dfd22ed087d6a25ba2edf3660cac (patch)
tree466c6612393aac6fdb21c65dc21db25552f14f12
parent507b29c4977527f76f5ab2781db84a350acd56fe (diff)
Allow more fine granular cache flushes.
-rw-r--r--r600_lib.c15
-rw-r--r--r600_lib.h10
2 files changed, 13 insertions, 12 deletions
diff --git a/r600_lib.c b/r600_lib.c
index 946238c..99c7605 100644
--- a/r600_lib.c
+++ b/r600_lib.c
@@ -205,7 +205,7 @@ void flush_cmds (void)
}
-void flush_gpu_source_cache (adapter_t *adapt, uint64_t lower, uint64_t upper)
+void flush_gpu_source_cache (adapter_t *adapt, uint32_t type, uint64_t lower, uint64_t upper)
{
/* To be used after texture uploads etc. */
#if 0
@@ -213,9 +213,7 @@ void flush_gpu_source_cache (adapter_t *adapt, uint64_t lower, uint64_t upper)
lower = lower & ~0xffULL;
upper = (upper + 0xff) & ~0xffULL;
- EREG (CP_COHER_CNTL, TC_ACTION_ENA_bit | VC_ACTION_ENA_bit |
- CB_ACTION_ENA_bit | DB_ACTION_ENA_bit |
- SH_ACTION_ENA_bit | SMX_ACTION_ENA_bit);
+ EREG (CP_COHER_CNTL, type);
EREG (CP_COHER_SIZE, (upper - lower) >> 8);
EREG (CP_COHER_BASE, lower >> 8);
PACK3 (IT_WAIT_REG_MEM, 6);
@@ -234,20 +232,19 @@ void flush_gpu_source_cache (adapter_t *adapt, uint64_t lower, uint64_t upper)
(uint32_t) (lower >> 8), (uint32_t)(upper >> 8));
PACK3 (IT_SURFACE_SYNC, 4);
- E32 (TC_ACTION_ENA_bit | VC_ACTION_ENA_bit | CB_ACTION_ENA_bit | DB_ACTION_ENA_bit |
- SH_ACTION_ENA_bit | SMX_ACTION_ENA_bit); /* CNTL */
+ E32 (type);
E32 ((upper-lower) >> 8); /* SIZE */
E32 (lower >> 8); /* BASE */
E32 (10); /* POLL_INTERVAL */
}
-void flush_gpu_dest_cache (adapter_t *adapt, uint64_t lower, uint64_t upper)
+void flush_gpu_dest_cache (adapter_t *adapt, uint32_t type, uint64_t lower, uint64_t upper)
{
// TODO: not correct at all yet
/* To be used before readpixels, copy-to-texture etc. */
pack3 (IT_SURFACE_SYNC, 4);
- e32 (TC_ACTION_ENA_bit | VC_ACTION_ENA_bit | SH_ACTION_ENA_bit | CR0_ACTION_ENA_bit);
+ e32 (type);
e32 (0xffffffff); /* SIZE */
e32 (0); /* BASE */
e32 (1); /* POLL_INTERVAL useful value? */
@@ -282,7 +279,7 @@ uint64_t upload (adapter_t *adapt, void *shader, int size, int offset)
if ((i & 7) != 0)
printf ("\n");
}
- flush_gpu_source_cache (adapt, addr, addr + size);
+ flush_gpu_source_cache (adapt, FLUSH_GPU_INPUT_TYPE_ALL, addr, addr + size);
return addr;
}
diff --git a/r600_lib.h b/r600_lib.h
index 20a748d..05c08c7 100644
--- a/r600_lib.h
+++ b/r600_lib.h
@@ -101,9 +101,13 @@ extern uint32_t *vtx, *tex;
extern uint64_t vtx_gpu, tex_gpu;
-void flush_gpu_source_cache (adapter_t *adapt, uint64_t lower, uint64_t upper);
-void flush_gpu_dest_cache (adapter_t *adapt, uint64_t lower, uint64_t upper);
-#define FLUSH_GPU_ALL_SOURCE_CACHE(adapt) flush_gpu_source_cache (adapt, 0, 0xffffffff00ULL)
+void flush_gpu_source_cache (adapter_t *adapt, uint32_t type, uint64_t lower, uint64_t upper);
+void flush_gpu_dest_cache (adapter_t *adapt, uint32_t type, uint64_t lower, uint64_t upper);
+
+#define FLUSH_GPU_INPUT_TYPE_ALL (TC_ACTION_ENA_bit | VC_ACTION_ENA_bit | \
+ CB_ACTION_ENA_bit | DB_ACTION_ENA_bit | \
+ SH_ACTION_ENA_bit | SMX_ACTION_ENA_bit)
+#define FLUSH_GPU_ALL_SOURCE_CACHE(adapt) flush_gpu_source_cache (adapt, FLUSH_GPU_INPUT_TYPE_ALL, 0, 0xffffffff00ULL)
uint64_t upload (adapter_t *adapt, void *shader, int size, int offset);
void dump_shader (adapter_t *adapt, uint32_t *shader, int size, char *what);