Remove redundant file

No need for a new file to be installed. The only use
of this file for orcx86insn.[ch]

Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/148>

4 files changed, 25 insertions, 40 deletions

diff --git a/orc/meson.build b/orc/meson.build
index 71e33e9..361c468 100644
--- a/orc/meson.build
+++ b/orc/meson.build
@@ -27,7 +27,6 @@ orc_headers = [
   'orccompiler.h',
   'orcconstant.h',
   'orccpu.h',
-  'orccpuinsn.h',
   'orcdebug.h',
   'orcemulateopcodes.h', # FIXME: this probably shouldn't be installed, symbols are not exported or useful
   'orcexecutor.h',
diff --git a/orc/orccpuinsn.h b/orc/orccpuinsn.h
deleted file mode 100644
index 163f224..0000000
--- a/orc/orccpuinsn.h
+++ /dev/null
@@ -1,37 +0,0 @@
-
-#ifndef _ORC_ORC_CPUINSN_H_
-#define _ORC_ORC_CPUINSN_H_
-
-#ifdef ORC_ENABLE_UNSTABLE_API
-
-#include <orc/orcutils.h>
-
-struct _OrcSysOpcode {
-  // Mnemonic
-  char name[16];
-  // Type of instruction (source instruction set, operation type)
-  int type;
-  // (x86 only) Escape prefix (0F) 3A or 38
-  // See ss. 3.1.1.2 Intel® 64 and IA-32 Architectures Software Developer’s
-  // Manual
-  int flags;
-  // (x86 only) Instruction set prefix (EVEX, VEX, 2-byte SSE...)
-  // See ss. 2.3.5 Intel® 64 and IA-32 Architectures Software Developer’s
-  // Manual
-  orc_uint8 prefix;
-  // Opcode (may include the last byte of the prefix as an opcode extension)
-  // For x86, see ss. 2.1.2 Intel® 64 and IA-32 Architectures Software
-  // Developer’s Manual
-  orc_uint32 code;
-  // Additional opcode (if any)
-  int code2;
-};
-
-typedef struct _OrcSysOpcode OrcSysOpcode;
-
-#define ORC_SYS_OPCODE_FLAG_FIXED (1<<0)
-
-#endif
-
-#endif
-
diff --git a/orc/orcx86insn.c b/orc/orcx86insn.c
index cff27d5..a843993 100644
--- a/orc/orcx86insn.c
+++ b/orc/orcx86insn.c
@@ -8,7 +8,6 @@
 #include <string.h>
 
 #include <orc/orc.h>
-#include <orc/orccpuinsn.h>
 #include <orc/orcx86.h>
 #include <orc/orcavx.h>
 #include <orc/orcsse.h>
diff --git a/orc/orcx86insn.h b/orc/orcx86insn.h
index dd37015..65d8a00 100644
--- a/orc/orcx86insn.h
+++ b/orc/orcx86insn.h
@@ -3,7 +3,6 @@
 #define ORC_ORC_X86_INSN_H_
 
 #include <orc/orc.h>
-#include <orc/orccpuinsn.h>
 
 ORC_BEGIN_DECLS
 
@@ -321,6 +320,31 @@ typedef enum {
   ORC_X86_AVX_VEX256_PREFIX,
 } OrcX86OpcodePrefix;
 
+struct _OrcSysOpcode {
+  // Mnemonic
+  char name[16];
+  // Type of instruction (source instruction set, operation type)
+  int type;
+  // (x86 only) Escape prefix (0F) 3A or 38
+  // See ss. 3.1.1.2 Intel® 64 and IA-32 Architectures Software Developer’s
+  // Manual
+  int flags;
+  // (x86 only) Instruction set prefix (EVEX, VEX, 2-byte SSE...)
+  // See ss. 2.3.5 Intel® 64 and IA-32 Architectures Software Developer’s
+  // Manual
+  orc_uint8 prefix;
+  // Opcode (may include the last byte of the prefix as an opcode extension)
+  // For x86, see ss. 2.1.2 Intel® 64 and IA-32 Architectures Software
+  // Developer’s Manual
+  orc_uint32 code;
+  // Additional opcode (if any)
+  int code2;
+};
+
+typedef struct _OrcSysOpcode OrcSysOpcode;
+
+#define ORC_SYS_OPCODE_FLAG_FIXED (1<<0)
+
 typedef struct _OrcX86Insn OrcX86Insn;
 struct _OrcX86Insn {
   // Index into the opcode table