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authorJorge Zapata <jorgeluis.zapata@gmail.com>2024-01-04 01:55:09 +0100
committerJorge Zapata <jorgeluis.zapata@gmail.com>2024-01-04 17:27:36 +0100
commit167848a25e1e58e291124d671be2195568f82040 (patch)
treefb6bf648a6d8eb5791d27e7052cc3217b358e45f
parent23c36d52df371c100311f4f790639e9a7c8af033 (diff)
Add and/or instructions for SSE and AVX
Part-of: <https://gitlab.freedesktop.org/gstreamer/orc/-/merge_requests/141>
-rw-r--r--orc/orcx86insn.c2
-rw-r--r--orc/orcx86insn.h10
2 files changed, 12 insertions, 0 deletions
diff --git a/orc/orcx86insn.c b/orc/orcx86insn.c
index 0ae3344..b5a4ae2 100644
--- a/orc/orcx86insn.c
+++ b/orc/orcx86insn.c
@@ -300,6 +300,8 @@ static const OrcSysOpcode orc_x86_opcodes[] = {
{ "perm2i128", ORC_X86_INSN_TYPE_IMM8_MMXM_MMX, ORC_VEX_W0 | ORC_VEX_ESCAPE_3A, ORC_VEX_SIMD_PREFIX_66, 0x46 },
{ "pblendd", ORC_X86_INSN_TYPE_IMM8_MMXM_MMX, ORC_VEX_W0 | ORC_VEX_ESCAPE_3A, ORC_VEX_SIMD_PREFIX_66, 0x02 },
{ "blendvpd", ORC_X86_INSN_TYPE_MMXM_MMX, ORC_VEX_W0 | ORC_VEX_ESCAPE_3A, ORC_VEX_SIMD_PREFIX_66, 0x4b },
+ { "andps", ORC_X86_INSN_TYPE_MMXM_MMX, 0, ORC_SIMD_PREFIX_ESCAPE_ONLY, 0x54 },
+ { "orps", ORC_X86_INSN_TYPE_MMXM_MMX, 0, ORC_SIMD_PREFIX_ESCAPE_ONLY, 0x56 },
};
static void
diff --git a/orc/orcx86insn.h b/orc/orcx86insn.h
index 4db30db..45ba6a0 100644
--- a/orc/orcx86insn.h
+++ b/orc/orcx86insn.h
@@ -303,6 +303,8 @@ typedef enum
ORC_X86_permute2i128_avx,
ORC_X86_pblendd_avx,
ORC_X86_blendvpd_avx,
+ ORC_X86_andps,
+ ORC_X86_orps,
} OrcX86Opcode;
typedef enum {
@@ -625,6 +627,7 @@ ORC_API void orc_vex_emit_blend_size (OrcCompiler *p, int opcode, int size,
#define orc_sse_emit_pcmpgtq(p,a,b) orc_x86_emit_cpuinsn_size(p, ORC_X86_pcmpgtq, 16, a, b)
#define orc_avx_sse_emit_pcmpgtq(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_pcmpgtq, 32, s1, s2, d, ORC_X86_AVX_VEX128_PREFIX)
#define orc_avx_emit_pcmpgtq(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_pcmpgtq, 32, s1, s2, d, ORC_X86_AVX_VEX256_PREFIX)
+
#define orc_sse_emit_addps(p,a,b) orc_x86_emit_cpuinsn_size(p, ORC_X86_addps, 16, a, b)
#define orc_avx_sse_emit_addps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_addps, 32, s1, s2, d, ORC_X86_AVX_VEX128_PREFIX)
#define orc_avx_emit_addps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_addps, 32, s1, s2, d, ORC_X86_AVX_VEX256_PREFIX)
@@ -640,6 +643,13 @@ ORC_API void orc_vex_emit_blend_size (OrcCompiler *p, int opcode, int size,
#define orc_sse_emit_sqrtps(p,a,b) orc_x86_emit_cpuinsn_size(p, ORC_X86_sqrtps, 16, a, b)
#define orc_avx_sse_emit_sqrtps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_sqrtps, 32, s1, s2, d, ORC_X86_AVX_VEX128_PREFIX)
#define orc_avx_emit_sqrtps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_sqrtps, 32, s1, s2, d, ORC_X86_AVX_VEX256_PREFIX)
+#define orc_sse_emit_andps(p,a,b) orc_x86_emit_cpuinsn_size(p, ORC_X86_andps, 16, a, b)
+#define orc_avx_sse_emit_andps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_andps, 32, s1, s2, d, ORC_X86_AVX_VEX128_PREFIX)
+#define orc_avx_emit_andps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_andps, 32, s1, s2, d, ORC_X86_AVX_VEX256_PREFIX)
+#define orc_sse_emit_orps(p,a,b) orc_x86_emit_cpuinsn_size(p, ORC_X86_orps, 16, a, b)
+#define orc_avx_sse_emit_orps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_orps, 32, s1, s2, d, ORC_X86_AVX_VEX128_PREFIX)
+#define orc_avx_emit_orps(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_orps, 32, s1, s2, d, ORC_X86_AVX_VEX256_PREFIX)
+
#define orc_sse_emit_addpd(p,a,b) orc_x86_emit_cpuinsn_size(p, ORC_X86_addpd, 16, a, b)
#define orc_avx_sse_emit_addpd(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_addpd, 32, s1, s2, d, ORC_X86_AVX_VEX128_PREFIX)
#define orc_avx_emit_addpd(p,s1,s2,d) orc_vex_emit_cpuinsn_size(p, ORC_X86_addpd, 32, s1, s2, d, ORC_X86_AVX_VEX256_PREFIX)