diff options
| author | Manasi Navare <manasi.d.navare@intel.com> | 2020-12-02 10:27:27 -0800 |
|---|---|---|
| committer | Manasi Navare <manasi.d.navare@intel.com> | 2020-12-03 14:49:47 -0800 |
| commit | 97ffcd0d1eeca8b123453a900e7768d07408ebf9 (patch) | |
| tree | 37d7e8d5c8996ae4c4519a35dfff86a1e4b97455 | |
| parent | cf977e18610e66e48c31619e7e0cfa871be9eada (diff) | |
drm/i915: Add VRR_CTL_LINE_COUNT field to VRR_CTL register def
VRR_CTL register only had a GENMASK but no field prep
define for TRANS_VRR_CTL_LINE_COUNT field so add that
Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201202182727.26158-1-manasi.d.navare@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a8c4d16b7c30..593b6c97dcbd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4352,6 +4352,7 @@ enum { #define VRR_CTL_IGN_MAX_SHIFT REG_BIT(30) #define VRR_CTL_FLIP_LINE_EN REG_BIT(29) #define VRR_CTL_LINE_COUNT_MASK REG_GENMASK(10, 3) +#define VRR_CTL_LINE_COUNT(x) REG_FIELD_PREP(VRR_CTL_LINE_COUNT_MASK, (x)) #define VRR_CTL_SW_FULLLINE_COUNT REG_BIT(0) #define _TRANS_VRR_VMAX_A 0x60424 |