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5 hoursdrm/i915/pciids: don't include RPL-U PCI IDs in RPL-Pfor-linux-nextdrm-intel-nextJani Nikula5-1/+4
5 hoursdrm/i915/pciids: remove 12 from INTEL_TGL_IDS()Jani Nikula5-9/+9
5 hoursdrm/i915/pciids: remove 11 from INTEL_ICL_IDS()Jani Nikula4-4/+4
5 hoursdrm/i915/pciids: don't include WHL/CML PCI IDs in CFLJani Nikula3-13/+21
5 hoursdrm/i915/pciids: add INTEL_IVB_IDS()Jani Nikula3-4/+6
5 hoursdrm/i915/pciids: add INTEL_SNB_IDS()Jani Nikula3-4/+6
5 hoursdrm/i915/pciids: add INTEL_ILK_IDS(), use acronymJani Nikula4-8/+11
5 hoursdrm/i915/pciids: add INTEL_PNV_IDS(), use acronymJani Nikula4-8/+10
10 hoursdrm/i915: Handle SKL+ WM/DDB registers next to all other plane registersVille Syrjälä5-98/+107
10 hoursdrm/i915: Nuke skl_write_wm_level() and skl_ddb_entry_write()Ville Syrjälä1-35/+22
10 hoursdrm/i915: Extract skl_plane_{wm,ddb}_reg_val()Ville Syrjälä1-10/+19
10 hoursdrm/i915: Refactor skl+ plane register offset calculationsVille Syrjälä1-92/+93
10 hoursdrm/i915: Drop a few unwanted tabs from skl+ plane reg definesVille Syrjälä1-3/+3
10 hoursdrm/i915: Use REG_BIT for PLANE_WM bitsVille Syrjälä1-2/+2
10 hoursdrm/i915: Shuffle the skl+ plane register definitionsVille Syrjälä1-283/+202
10 hoursdrm/i915: Drop useless PLANE_FOO_3 register definesVille Syrjälä1-19/+0
10 hoursdrm/i915/gvt: Use PLANE_CTL and PLANE_SURF definesVille Syrjälä1-6/+6
10 hoursdrm/i915/gvt: Use the full PLANE_KEY*() definesVille Syrjälä1-9/+9
10 hoursdrm/i915/gvt: Use the proper PLANE_AUX_OFFSET() defineVille Syrjälä3-28/+26
10 hoursdrm/i915/gvt: Use the proper PLANE_AUX_DIST() defineVille Syrjälä3-27/+26
10 hoursdrm/i915: Move skl+ wm/ddb registers to proper headersVille Syrjälä5-83/+86
10 hoursdrm/i915: Extract intel_cursor_regs.hVille Syrjälä8-70/+84
10 hoursdrm/i915: Extract skl_universal_plane_regs.hVille Syrjälä10-396/+414
10 hoursdrm/i915: Nuke _MMIO_PLANE_GAMC()Ville Syrjälä1-2/+0
13 hoursdrm/i915/psr: Add panel replay sel update support to debugfs interfaceJouni Högander1-3/+6
13 hoursdrm/i915/psr: Split intel_psr2_config_valid for panel replayJouni Högander1-30/+46
13 hoursdrm/i915/psr: Update PSR module parameter descriptionsJouni Högander1-2/+3
13 hoursdrm/i915/psr: Do not apply workarounds in case of panel replayJouni Högander3-9/+15
13 hoursdrm/i915/psr: Panel replay uses SRD_STATUS to track it's statusJouni Högander1-4/+16
13 hoursdrm/i915/psr: Modify intel_dp_get_su_granularity to support panel replayJouni Högander1-7/+55
13 hoursdrm/i915/psr: Detect panel replay selective update supportJouni Högander3-2/+10
13 hoursdrm/panelreplay: dpcd register definition for panelreplay SUJouni Högander1-0/+6
13 hoursdrm/i915/psr: Rename psr2_enabled as sel_update_enabledJouni Högander2-27/+27
13 hoursdrm/i915/dp: Use always vsc revision 0x6 for Panel ReplayJouni Högander1-8/+8
13 hoursdrm/i915/display: Do not print "psr: enabled" for on Panel ReplayJouni Högander1-1/+2
13 hoursdrm/i915/psr: Rename has_psr2 as has_sel_updateJouni Högander6-11/+11
33 hoursDocumentation/i915: remove kernel-doc for DMC wakelocksLuca Coelho1-3/+0
2 daysdrm/xe/display: remove unused xe->sb_lockJani Nikula2-5/+0
2 daysdrm/xe/display: remove unused xe->enabled_irq_maskJani Nikula2-3/+0
2 daysdrm/i915: Rename the fb pinning functions to indicate the address spaceVille Syrjälä7-47/+47
2 daysdrm/i915: Cleanup fbdev fb setupVille Syrjälä1-18/+20
2 daysdrm/i915: Change intel_fbdev_fb_alloc() return typeVille Syrjälä4-14/+14
2 daysdrm/i915: Constify 'fb' in during pinningVille Syrjälä3-22/+21
2 daysdrm/i915: Implement Audio WA_14020863754Uma Shankar2-0/+18
2 daysdrm/i915/dp: Write panel override luminance valuesSuraj Kandpal1-0/+25
2 daysdrm/i915/dp: Enable AUX based backlight for HDRSuraj Kandpal1-11/+87
2 daysdrm/i915/dp: Drop comments on EDP HDR DPCD registersSuraj Kandpal1-2/+2
2 daysdrm/i915/dp: Fix Register bit namingSuraj Kandpal1-1/+1
2 daysdrm/i915/dp: Add TCON HDR capability checksSuraj Kandpal2-0/+15
2 daysdrm/i915/dp: Rename intel struct inside intel_panelSuraj Kandpal2-8/+8
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