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-rw-r--r--include/radeon_reg.h16
1 files changed, 14 insertions, 2 deletions
diff --git a/include/radeon_reg.h b/include/radeon_reg.h
index ac92ef7..a375295 100644
--- a/include/radeon_reg.h
+++ b/include/radeon_reg.h
@@ -3181,8 +3181,20 @@
*/
#define AVIVO_VGA_MEMORY_BASE 0x0134
#define AVIVO_VGA_FB_START 0x0310
-#define AVIVO_VGA_MYSTERY0 0x0330
-#define AVIVO_VGA_MYSTERY1 0x0338
+#define AVIVO_VGA1_CONTROL 0x0330
+ #define AVIVO_VGA1_CONTROL_MODE_ENABLE (1<<0)
+ #define AVIVO_VGA1_CONTROL_TIMING_SELECT (1<<8)
+ #define AVIVO_VGA1_CONTROL_SYNC_POLARITY_SELECT (1<<9)
+ #define AVIVO_VGA1_CONTROL_OVERSCAN_TIMING_SELECT (1<<10)
+ #define AVIVO_VGA1_CONTROL_OVERSCAN_COLOR_EN (1<<16)
+ #define AVIVO_VGA1_CONTROL_ROTATE (1<<24)
+#define AVIVO_VGA2_CONTROL 0x0338
+ #define AVIVO_VGA2_CONTROL_MODE_ENABLE (1<<0)
+ #define AVIVO_VGA2_CONTROL_TIMING_SELECT (1<<8)
+ #define AVIVO_VGA2_CONTROL_SYNC_POLARITY_SELECT (1<<9)
+ #define AVIVO_VGA2_CONTROL_OVERSCAN_TIMING_SELECT (1<<10)
+ #define AVIVO_VGA2_CONTROL_OVERSCAN_COLOR_EN (1<<16)
+ #define AVIVO_VGA2_CONTROL_ROTATE (1<<24)
/*
* We believe reference clock is 108Mhz, we likely can change that using