diff options
author | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-12 23:17:49 +0100 |
---|---|---|
committer | Matthew Garrett <mjg59@srcf.ucam.org> | 2007-09-12 23:17:49 +0100 |
commit | bd16c437c2da436ba6294b188dc47d2f3bc5eaa4 (patch) | |
tree | 05b25137e95bb480b38d54610aeb4cd3f8e4f681 | |
parent | 8a43d83914917daed2f878d78df7380829c38a77 (diff) |
Mark up dithering control registers. Attempt to make it work with LVDS. Fail.
Cry self to sleep.
-rw-r--r-- | avivotool/avivotool.c | 104 | ||||
-rw-r--r-- | include/radeon_reg.h | 31 | ||||
-rw-r--r-- | xorg/avivo_output.c | 5 | ||||
-rw-r--r-- | xorg/avivo_state.c | 8 |
4 files changed, 77 insertions, 71 deletions
diff --git a/avivotool/avivotool.c b/avivotool/avivotool.c index ca6e702..87ee007 100644 --- a/avivotool/avivotool.c +++ b/avivotool/avivotool.c @@ -464,34 +464,30 @@ void radeon_output_set(char *output, char *status) if (strcmp(output, "tmds1") == 0) { if (on) { - SET_REG(AVIVO_TMDS1_MYSTERY1, AVIVO_TMDS_MYSTERY1_EN); - SET_REG(AVIVO_TMDS1_MYSTERY2, AVIVO_TMDS_MYSTERY2_EN); - SET_REG(AVIVO_TMDS1_MYSTERY3, 0x10000011); - SET_REG(AVIVO_TMDS1_CLOCK_CNTL, 0x0000001f); - SET_REG(AVIVO_TMDS1_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); + SET_REG(AVIVO_TMDSA_MYSTERY3, 0x10000011); + SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x0000001f); + SET_REG(AVIVO_TMDSA_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); } else { - SET_REG(AVIVO_TMDS1_CNTL, 0x00001010); - SET_REG(AVIVO_TMDS1_MYSTERY1, 0x04000000); - SET_REG(AVIVO_TMDS1_MYSTERY2, 0x00000000); - SET_REG(AVIVO_TMDS1_MYSTERY3, 0x10000011); - SET_REG(AVIVO_TMDS1_CLOCK_CNTL, 0x00060000); + SET_REG(AVIVO_TMDSA_CNTL, 0x00001010); + SET_REG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, 0x04000000); + SET_REG(AVIVO_TMDSA_MYSTERY2, 0x00000000); + SET_REG(AVIVO_TMDSA_MYSTERY3, 0x10000011); + SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x00060000); } } else if (strcmp(output, "tmds2") == 0) { if (on) { - SET_REG(AVIVO_TMDS2_MYSTERY1, AVIVO_TMDS_MYSTERY1_EN); - SET_REG(AVIVO_TMDS2_MYSTERY2, AVIVO_TMDS_MYSTERY2_EN); - SET_REG(AVIVO_TMDS2_MYSTERY3, 0x30000011); - SET_REG(AVIVO_TMDS2_CLOCK_CNTL, 0x0000003e); - SET_REG(AVIVO_TMDS2_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); + SET_REG(AVIVO_LVTMA_MYSTERY3, 0x30000011); + SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x0000003e); + SET_REG(AVIVO_LVTMA_CNTL, 0x00001010 | AVIVO_TMDS_CNTL_UNK0); } else { - SET_REG(AVIVO_TMDS2_CNTL, 0x1010); - SET_REG(AVIVO_TMDS2_MYSTERY1, 0x04000000); - SET_REG(AVIVO_TMDS2_MYSTERY2, 0x00000000); - SET_REG(AVIVO_TMDS2_MYSTERY3, 0x10000011); - SET_REG(AVIVO_TMDS2_CLOCK_CNTL, 0x00060000); + SET_REG(AVIVO_LVTMA_CNTL, 0x1010); + SET_REG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, 0x04000000); + SET_REG(AVIVO_LVTMA_MYSTERY2, 0x00000000); + SET_REG(AVIVO_LVTMA_MYSTERY3, 0x10000011); + SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x00060000); } } else if (strcmp(output, "dac1") == 0) { @@ -796,18 +792,18 @@ static struct { REGLIST(AVIVO_DAC2_CNTL), REGLIST(AVIVO_DAC2_MYSTERY1), REGLIST(AVIVO_DAC2_MYSTERY2), - REGLIST(AVIVO_TMDS1_CNTL), - REGLIST(AVIVO_TMDS1_CLOCK_ENABLE), - REGLIST(AVIVO_TMDS1_CLOCK_CNTL), - REGLIST(AVIVO_TMDS1_MYSTERY1), - REGLIST(AVIVO_TMDS1_MYSTERY2), - REGLIST(AVIVO_TMDS1_MYSTERY3), - REGLIST(AVIVO_TMDS2_CNTL), - REGLIST(AVIVO_TMDS2_CLOCK_ENABLE), - REGLIST(AVIVO_TMDS2_CLOCK_CNTL), - REGLIST(AVIVO_TMDS2_MYSTERY1), - REGLIST(AVIVO_TMDS2_MYSTERY2), - REGLIST(AVIVO_TMDS2_MYSTERY3), + REGLIST(AVIVO_TMDSA_CNTL), + REGLIST(AVIVO_TMDSA_CLOCK_ENABLE), + REGLIST(AVIVO_TMDSA_CLOCK_CNTL), + REGLIST(AVIVO_TMDSA_BIT_DEPTH_CONTROL), + REGLIST(AVIVO_TMDSA_MYSTERY2), + REGLIST(AVIVO_TMDSA_MYSTERY3), + REGLIST(AVIVO_LVTMA_CNTL), + REGLIST(AVIVO_LVTMA_CLOCK_ENABLE), + REGLIST(AVIVO_LVTMA_CLOCK_CNTL), + REGLIST(AVIVO_LVTMA_BIT_DEPTH_CONTROL), + REGLIST(AVIVO_LVTMA_MYSTERY2), + REGLIST(AVIVO_LVTMA_MYSTERY3), REGLIST(AVIVO_TMDS_STATUS), REGLIST(AVIVO_LVDS_CNTL), REGLIST(AVIVO_LVDS_BACKLIGHT_CNTL), @@ -905,9 +901,9 @@ void radeon_cmd_regs(const char *type) show_dac1 = 1; if (GET_REG(AVIVO_DAC2_CNTL) & AVIVO_DAC_EN) show_dac2 = 1; - if (GET_REG(AVIVO_TMDS1_CNTL) & AVIVO_TMDS_CNTL_UNK0) + if (GET_REG(AVIVO_TMDSA_CNTL) & AVIVO_TMDS_CNTL_UNK0) show_tmds1 = 1; - if (GET_REG(AVIVO_TMDS2_CNTL) & AVIVO_TMDS_CNTL_UNK0) + if (GET_REG(AVIVO_LVTMA_CNTL) & AVIVO_TMDS_CNTL_UNK0) show_tmds2 = 1; if (GET_REG(AVIVO_LVDS_EN) & AVIVO_LVDS_EN) show_lvds = 1; @@ -1167,45 +1163,45 @@ void radeon_cmd_regs(const char *type) } if (show_tmds1) { - printf("\nTMDS1:\n"); - SHOW_REG_BITS(AVIVO_TMDS1_CNTL, + printf("\nTMDSA:\n"); + SHOW_REG_BITS(AVIVO_TMDSA_CNTL, 0, 0, "Enable", 0, 0, NULL); SHOW_REG_BITS(AVIVO_TMDS_STATUS, - 0, 0, "TMDS1 connected", + 0, 0, "TMDSA connected", 0, 0, NULL); - SHOW_REG(AVIVO_TMDS1_CLOCK_ENABLE); - SHOW_REG(AVIVO_TMDS1_CLOCK_CNTL); - SHOW_REG(AVIVO_TMDS1_MYSTERY1); - SHOW_REG(AVIVO_TMDS1_MYSTERY2); - SHOW_REG(AVIVO_TMDS1_MYSTERY3); + SHOW_REG(AVIVO_TMDSA_CLOCK_ENABLE); + SHOW_REG(AVIVO_TMDSA_CLOCK_CNTL); + SHOW_REG(AVIVO_TMDSA_BIT_DEPTH_CONTROL); + SHOW_REG(AVIVO_TMDSA_MYSTERY2); + SHOW_REG(AVIVO_TMDSA_MYSTERY3); } else { if (!shut_up) - printf("\nTMDS1 disabled (%spresent)\n", + printf("\nTMDSA disabled (%spresent)\n", (GET_REG(AVIVO_TMDS_STATUS) & - AVIVO_TMDS1_CONNECTED) ? "" : "not "); + AVIVO_TMDSA_CONNECTED) ? "" : "not "); } if (show_tmds2) { - printf("\nTMDS2:\n"); - SHOW_REG_BITS(AVIVO_TMDS2_CNTL, + printf("\nLVTMA:\n"); + SHOW_REG_BITS(AVIVO_LVTMA_CNTL, 0, 0, "Enable", 0, 0, NULL); SHOW_REG_BITS(AVIVO_TMDS_STATUS, - 8, 8, "TMDS2 connected", + 8, 8, "LVTMA connected", 0, 0, NULL); - SHOW_REG(AVIVO_TMDS2_CLOCK_ENABLE); - SHOW_REG(AVIVO_TMDS2_CLOCK_CNTL); - SHOW_REG(AVIVO_TMDS2_MYSTERY1); - SHOW_REG(AVIVO_TMDS2_MYSTERY2); - SHOW_REG(AVIVO_TMDS2_MYSTERY3); + SHOW_REG(AVIVO_LVTMA_CLOCK_ENABLE); + SHOW_REG(AVIVO_LVTMA_CLOCK_CNTL); + SHOW_REG(AVIVO_LVTMA_BIT_DEPTH_CONTROL); + SHOW_REG(AVIVO_LVTMA_MYSTERY2); + SHOW_REG(AVIVO_LVTMA_MYSTERY3); } else { if (!shut_up) - printf("\nTMDS2 disabled (%spresent)\n", + printf("\nLVTMA disabled (%spresent)\n", (GET_REG(AVIVO_TMDS_STATUS) & - AVIVO_TMDS2_CONNECTED) ? "" : "not "); + AVIVO_LVTMA_CONNECTED) ? "" : "not "); } if (show_lvds) { diff --git a/include/radeon_reg.h b/include/radeon_reg.h index 82c0e3f..43e3ffb 100644 --- a/include/radeon_reg.h +++ b/include/radeon_reg.h @@ -3379,18 +3379,15 @@ /* 78a8 appears to be some kind of (reasonably tolerant) clock? * 78d0 definitely hits the transmitter, definitely clock. */ /* MYSTERY1 This appears to control dithering? */ -#define AVIVO_TMDSA_MYSTERY1 0x7894 -# define AVIVO_TMDS_MYSTERY1_UNK0 (1 << 0) -# define AVIVO_TMDS_MYSTERY1_UNK1 (1 << 4) -# define AVIVO_TMDS_MYSTERY1_UNK2 (1 << 8) -# define AVIVO_TMDS_MYSTERY1_UNK3 (1 << 12) -# define AVIVO_TMDS_MYSTERY1_UNK4 (1 << 16) -# define AVIVO_TMDS_MYSTERY1_UNK5 (1 << 20) -# define AVIVO_TMDS_MYSTERY1_UNK6 (1 << 24) -# define AVIVO_TMDS_MYSTERY1_UNK7 (1 << 26) -# define AVIVO_TMDS_MYSTERY1_UNK8_SHIFT 28 -# define AVIVO_TMDS_MYSTERY1_UNK8_MASK (0xF << 28) -# define AVIVO_TMDS_MYSTERY1_EN ((1 << 8) | (1 << 12)) +#define AVIVO_TMDSA_BIT_DEPTH_CONTROL 0x7894 +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH (1 << 4) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN (1 << 8) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH (1 << 12) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN (1 << 16) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) +# define AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) #define AVIVO_TMDSA_MYSTERY2 0x78d8 # define AVIVO_TMDS_MYSTERY2_EN ((1 << 24) | (1 << 16) | (1 << 0)) #define AVIVO_TMDSA_CLOCK_ENABLE 0x7900 @@ -3411,7 +3408,15 @@ #define AVIVO_LVTMA_CNTL 0x7a80 #define AVIVO_LVTMA_CRTC_SOURCE 0x7a84 -#define AVIVO_LVTMA_MYSTERY1 0x7a94 +#define AVIVO_LVTMA_BIT_DEPTH_CONTROL 0x7a94 +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_EN (1 << 0) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TRUNCATE_DEPTH (1 << 4) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_EN (1 << 8) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_SPATIAL_DITHER_DEPTH (1 << 12) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN (1 << 16) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_DEPTH (1 << 20) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_LEVEL (1 << 24) +# define AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET (1 << 26) #define AVIVO_LVTMA_MYSTERY2 0x7ad8 #define AVIVO_LVTMA_CLOCK_ENABLE 0x7b00 #define AVIVO_LVTMA_CLOCK_CNTL 0x7b04 diff --git a/xorg/avivo_output.c b/xorg/avivo_output.c index c650600..b407e4b 100644 --- a/xorg/avivo_output.c +++ b/xorg/avivo_output.c @@ -101,6 +101,9 @@ avivo_output_tmds1_setup(xf86OutputPtr output) OUTREG(AVIVO_TMDSA_MYSTERY2, 0x1); OUTREG(AVIVO_TMDSA_MYSTERY2, 0x101); OUTREG(AVIVO_TMDSA_MYSTERY2, 0x1); + OUTREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, (AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN + |AVIVO_TMDS_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET)); + } static void @@ -132,6 +135,8 @@ avivo_output_tmds2_setup(xf86OutputPtr output) OUTREG(AVIVO_LVTMA_MYSTERY2, 0x1); OUTREG(AVIVO_LVTMA_MYSTERY2, 0x101); OUTREG(AVIVO_LVTMA_MYSTERY2, 0x1); + OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, (AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_EN + |AVIVO_LVTMA_BIT_DEPTH_CONTROL_TEMPORAL_DITHER_RESET)); } static void diff --git a/xorg/avivo_state.c b/xorg/avivo_state.c index 6ac1dd7..1d2e610 100644 --- a/xorg/avivo_state.c +++ b/xorg/avivo_state.c @@ -162,7 +162,7 @@ avivo_restore_state(ScrnInfoPtr screen_info) OUTREG(AVIVO_DAC1_MYSTERY1, state->dac1_mystery1); OUTREG(AVIVO_DAC1_MYSTERY2, state->dac1_mystery2); OUTREG(AVIVO_TMDSA_CNTL, state->tmds1_cntl); - OUTREG(AVIVO_TMDSA_MYSTERY1, state->tmds1_mystery1); + OUTREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, state->tmds1_mystery1); OUTREG(AVIVO_TMDSA_MYSTERY2, state->tmds1_mystery2); OUTREG(AVIVO_TMDSA_CLOCK_CNTL, state->tmds1_clock_cntl); OUTREG(AVIVO_TMDSA_MYSTERY3, state->tmds1_mystery3); @@ -170,7 +170,7 @@ avivo_restore_state(ScrnInfoPtr screen_info) OUTREG(AVIVO_DAC2_MYSTERY1, state->dac2_mystery1); OUTREG(AVIVO_DAC2_MYSTERY2, state->dac2_mystery2); OUTREG(AVIVO_LVTMA_CNTL, state->tmds2_cntl); - OUTREG(AVIVO_LVTMA_MYSTERY1, state->tmds2_mystery1); + OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, state->tmds2_mystery1); OUTREG(AVIVO_LVTMA_MYSTERY2, state->tmds2_mystery2); OUTREG(AVIVO_LVTMA_CLOCK_CNTL, state->tmds2_clock_cntl); OUTREG(AVIVO_LVTMA_MYSTERY3, state->tmds2_mystery3); @@ -280,7 +280,7 @@ avivo_save_state(ScrnInfoPtr screen_info) state->dac1_mystery2 = INREG(AVIVO_DAC1_MYSTERY2); state->tmds1_cntl = INREG(AVIVO_TMDSA_CNTL); - state->tmds1_mystery1 = INREG(AVIVO_TMDSA_MYSTERY1); + state->tmds1_mystery1 = INREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL); state->tmds1_mystery2 = INREG(AVIVO_TMDSA_MYSTERY2); state->tmds1_clock_cntl = INREG(AVIVO_TMDSA_CLOCK_CNTL); state->tmds1_mystery3 = INREG(AVIVO_TMDSA_MYSTERY3); @@ -290,7 +290,7 @@ avivo_save_state(ScrnInfoPtr screen_info) state->dac2_mystery2 = INREG(AVIVO_DAC2_MYSTERY2); state->tmds2_cntl = INREG(AVIVO_LVTMA_CNTL); - state->tmds2_mystery1 = INREG(AVIVO_LVTMA_MYSTERY1); + state->tmds2_mystery1 = INREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL); state->tmds2_mystery2 = INREG(AVIVO_LVTMA_MYSTERY2); state->tmds2_clock_cntl = INREG(AVIVO_LVTMA_CLOCK_CNTL); state->tmds2_mystery3 = INREG(AVIVO_LVTMA_MYSTERY3); |