Magic? No, less magic.

4 files changed, 64 insertions, 23 deletions

diff --git a/avivotool/avivotool.c b/avivotool/avivotool.c
index 3fa5bd0..7ca60dc 100644
--- a/avivotool/avivotool.c
+++ b/avivotool/avivotool.c
@@ -465,7 +465,7 @@ void radeon_output_set(char *output, char *status)
     if (strcmp(output, "tmds1") == 0) {
         if (on) {
             SET_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL, 0x10000011);
-            SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x0000001f);
+            SET_REG(AVIVO_TMDSA_TRANSMITTER_ENABLE, 0x0000001f);
             SET_REG(AVIVO_TMDSA_CNTL, 0x00001010 | AVIVO_TMDSA_CNTL_ENABLE);
         }
         else {
@@ -473,13 +473,13 @@ void radeon_output_set(char *output, char *status)
             SET_REG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, 0x04000000);
             SET_REG(AVIVO_TMDSA_DATA_SYNCHRONIZATION, 0x00000000);
             SET_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL, 0x10000011);
-            SET_REG(AVIVO_TMDSA_CLOCK_CNTL, 0x00060000);
+            SET_REG(AVIVO_TMDSA_TRANSMITTER_ENABLE, 0x00060000);
         }
     }
     else if (strcmp(output, "tmds2") == 0) {
         if (on) {
             SET_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL, 0x30000011);
-            SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x0000003e);
+            SET_REG(AVIVO_LVTMA_TRANSMITTER_ENABLE, 0x0000003e);
             SET_REG(AVIVO_LVTMA_CNTL, 0x00001010 | AVIVO_TMDSA_CNTL_ENABLE);
         }
         else {
@@ -487,7 +487,7 @@ void radeon_output_set(char *output, char *status)
             SET_REG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, 0x04000000);
             SET_REG(AVIVO_LVTMA_DATA_SYNCHRONIZATION, 0x00000000);
             SET_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL, 0x10000011);
-            SET_REG(AVIVO_LVTMA_CLOCK_CNTL, 0x00060000);
+            SET_REG(AVIVO_LVTMA_TRANSMITTER_ENABLE, 0x00060000);
         }
     }
     else if (strcmp(output, "dac1") == 0) {
@@ -793,14 +793,13 @@ static struct {
     REGLIST(AVIVO_DAC2_MYSTERY1),
     REGLIST(AVIVO_DAC2_MYSTERY2),
     REGLIST(AVIVO_TMDSA_CNTL),
-    REGLIST(AVIVO_TMDSA_CLOCK_ENABLE),
-    REGLIST(AVIVO_TMDSA_CLOCK_CNTL),
+    REGLIST(AVIVO_TMDSA_TRANSMITTER_ENABLE),
     REGLIST(AVIVO_TMDSA_BIT_DEPTH_CONTROL),
     REGLIST(AVIVO_TMDSA_DATA_SYNCHRONIZATION),
     REGLIST(AVIVO_TMDSA_TRANSMITTER_CONTROL),
     REGLIST(AVIVO_LVTMA_CNTL),
     REGLIST(AVIVO_LVTMA_CLOCK_ENABLE),
-    REGLIST(AVIVO_LVTMA_CLOCK_CNTL),
+    REGLIST(AVIVO_LVTMA_TRANSMITTER_ENABLE),
     REGLIST(AVIVO_LVTMA_BIT_DEPTH_CONTROL),
     REGLIST(AVIVO_LVTMA_DATA_SYNCHRONIZATION),
     REGLIST(AVIVO_LVTMA_TRANSMITTER_CONTROL),
@@ -1171,7 +1170,7 @@ void radeon_cmd_regs(const char *type)
                       0, 0, "TMDSA connected",
                       0, 0, NULL);
         SHOW_REG(AVIVO_TMDSA_CLOCK_ENABLE);
-        SHOW_REG(AVIVO_TMDSA_CLOCK_CNTL);
+        SHOW_REG(AVIVO_TMDSA_TRANSMITTER_ENABLE);
         SHOW_REG(AVIVO_TMDSA_BIT_DEPTH_CONTROL);
         SHOW_REG(AVIVO_TMDSA_DATA_SYNCHRONIZATION);
         SHOW_REG(AVIVO_TMDSA_TRANSMITTER_CONTROL);
@@ -1192,7 +1191,7 @@ void radeon_cmd_regs(const char *type)
                       8, 8, "LVTMA connected",
                       0, 0, NULL);
         SHOW_REG(AVIVO_LVTMA_CLOCK_ENABLE);
-        SHOW_REG(AVIVO_LVTMA_CLOCK_CNTL);
+        SHOW_REG(AVIVO_LVTMA_TRANSMITTER_ENABLE);
         SHOW_REG(AVIVO_LVTMA_BIT_DEPTH_CONTROL);
         SHOW_REG(AVIVO_LVTMA_DATA_SYNCHRONIZATION);
         SHOW_REG(AVIVO_LVTMA_TRANSMITTER_CONTROL);
diff --git a/include/radeon_reg.h b/include/radeon_reg.h
index 49e27ee..e65ead2 100644
--- a/include/radeon_reg.h
+++ b/include/radeon_reg.h
@@ -3397,7 +3397,20 @@
 #   define AVIVO_TMDSA_DATA_SYNCHRONIZATION_DSYNSEL           (1 << 0)
 #   define AVIVO_TMDSA_DATA_SYNCHRONIZATION_PFREQCHG          (1 << 8)
 #define AVIVO_TMDSA_CLOCK_ENABLE            0x7900
-#define AVIVO_TMDSA_CLOCK_CNTL              0x7904
+#define AVIVO_TMDSA_TRANSMITTER_ENABLE              0x7904
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX0_ENABLE          (1 << 0)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKC0EN             (1 << 1)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD00EN            (1 << 2)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD01EN            (1 << 3)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD02EN            (1 << 4)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX1_ENABLE          (1 << 8)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD10EN            (1 << 10)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD11EN            (1 << 11)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD12EN            (1 << 12)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_TX_ENABLE_HPD_MASK  (1 << 16)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK     (1 << 17)
+#   define AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK     (1 << 18)
+
 /* I don't know any of the bits here, only that enabling (1 << 5)
  * without (1 << 4) makes things go utterly mental ... seems to be
  * the transmitter clock again. */
@@ -3450,7 +3463,19 @@
 #   define AVIVO_LVTMA_DATA_SYNCHRONIZATION_DSYNSEL           (1 << 0)
 #   define AVIVO_LVTMA_DATA_SYNCHRONIZATION_PFREQCHG          (1 << 8)
 #define AVIVO_LVTMA_CLOCK_ENABLE			0x7b00
-#define AVIVO_LVTMA_CLOCK_CNTL				0x7b04
+
+#define AVIVO_LVTMA_TRANSMITTER_ENABLE              0x7b04
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN             (1 << 1)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN            (1 << 2)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN            (1 << 3)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN            (1 << 4)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD03EN            (1 << 5)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN             (1 << 9)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN            (1 << 10)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN            (1 << 11)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN            (1 << 12)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKCEN_HPD_MASK     (1 << 17)
+#   define AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKDEN_HPD_MASK     (1 << 18)
 
 #define AVIVO_LVTMA_TRANSMITTER_CONTROL			        0x7b10
 #	define AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE	(1 << 0)
diff --git a/xorg/avivo_output.c b/xorg/avivo_output.c
index 5ca41b8..1aae462 100644
--- a/xorg/avivo_output.c
+++ b/xorg/avivo_output.c
@@ -93,7 +93,7 @@ avivo_output_tmds1_setup(xf86OutputPtr output)
 
     tmp = (tmp & ~(AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_TMDSA_TRANSMITTER_CONTROL_PLL_RESET)) | 1;
     OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, tmp);
-    OUTREG(AVIVO_TMDSA_CLOCK_CNTL, 0x1F);
+    OUTREG(AVIVO_TMDSA_TRANSMITTER_ENABLE, (AVIVO_TMDSA_TRANSMITTER_ENABLE_TX0_ENABLE | AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKC0EN | AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD00EN | AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD01EN | AVIVO_TMDSA_TRANSMITTER_ENABLE_LNKD02EN));
 
     /* FIXME - this should be set from scratch, not just read and reset */
     OUTREG(AVIVO_TMDSA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | AVIVO_TMDSA_CNTL_ENABLE));
@@ -132,7 +132,14 @@ avivo_output_tmds2_setup(xf86OutputPtr output)
     tmp = INREG(AVIVO_LVTMA_TRANSMITTER_CONTROL);
     tmp = (tmp & ~(AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_ENABLE | AVIVO_LVTMA_TRANSMITTER_CONTROL_PLL_RESET)) | 1;
     OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, tmp);
-    OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0x1E1F);
+    OUTREG(AVIVO_LVTMA_TRANSMITTER_ENABLE, (AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN | 
+					    AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN));
 
     /* FIXME: This is wrong, surely? Or are we assuming that the TMDS is set up properly? */
     OUTREG(AVIVO_LVTMA_CNTL, (INREG(AVIVO_TMDSA_CNTL) | AVIVO_LVTMA_CNTL_ENABLE));
@@ -194,12 +201,12 @@ avivo_output_tmds1_dpms(xf86OutputPtr output, int mode)
     switch(mode) {
     case DPMSModeOn:
         OUTREG(AVIVO_TMDSA_CLOCK_ENABLE, 1);
-        OUTREG(AVIVO_TMDSA_CLOCK_CNTL, 0x1F);
+        OUTREG(AVIVO_TMDSA_TRANSMITTER_ENABLE, 0x1F);
         break;
     case DPMSModeStandby:
     case DPMSModeSuspend:
     case DPMSModeOff:
-        OUTREG(AVIVO_TMDSA_CLOCK_CNTL, 0);
+        OUTREG(AVIVO_TMDSA_TRANSMITTER_ENABLE, 0);
         OUTREG(AVIVO_TMDSA_CLOCK_ENABLE, 0);
         break;
     }
@@ -213,12 +220,15 @@ avivo_output_tmds2_dpms(xf86OutputPtr output, int mode)
     switch(mode) {
     case DPMSModeOn:
         OUTREG(AVIVO_LVTMA_CLOCK_ENABLE, 1);
-        OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0x1F);
+	OUTREG(AVIVO_LVTMA_TRANSMITTER_ENABLE, (AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN));
         break;
     case DPMSModeStandby:
     case DPMSModeSuspend:
     case DPMSModeOff:
-        OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0);
+        OUTREG(AVIVO_LVTMA_TRANSMITTER_ENABLE, 0);
         OUTREG(AVIVO_LVTMA_CLOCK_ENABLE, 0);
         break;
     }
@@ -234,7 +244,14 @@ avivo_output_lvds_dpms(xf86OutputPtr output, int mode)
     case DPMSModeOn:
         xf86DrvMsg(output->scrn->scrnIndex, X_INFO, "ENABLE LVTMA\n");
         OUTREG(AVIVO_LVDS_CNTL, AVIVO_LVDS_EN | AVIVO_LVDS_MYSTERY);
-        OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0x1E1E);
+	OUTREG(AVIVO_LVTMA_TRANSMITTER_ENABLE, (AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC0EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD00EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD01EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD02EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKC1EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD10EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD11EN | 
+						AVIVO_LVTMA_TRANSMITTER_ENABLE_LNKD12EN));
         break;
     case DPMSModeStandby:
     case DPMSModeSuspend:
@@ -245,7 +262,7 @@ avivo_output_lvds_dpms(xf86OutputPtr output, int mode)
             tmp = INREG(AVIVO_LVTMA_PWRSEQ_STATE);
             usleep(100);
         } while (tmp != 0x8 << AVIVO_LVTMA_PWRSEQ_STATE);
-        OUTREG(AVIVO_LVTMA_CLOCK_CNTL, 0);
+        OUTREG(AVIVO_LVTMA_TRANSMITTER_ENABLE, 0);
         OUTREG(AVIVO_LVTMA_CLOCK_ENABLE, 0);
         break;
     }
diff --git a/xorg/avivo_state.c b/xorg/avivo_state.c
index 947b143..ef0ba95 100644
--- a/xorg/avivo_state.c
+++ b/xorg/avivo_state.c
@@ -164,7 +164,7 @@ avivo_restore_state(ScrnInfoPtr screen_info)
     OUTREG(AVIVO_TMDSA_CNTL, state->tmds1_cntl);
     OUTREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL, state->tmds1_mystery1);
     OUTREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION, state->tmds1_mystery2);
-    OUTREG(AVIVO_TMDSA_CLOCK_CNTL, state->tmds1_clock_cntl);
+    OUTREG(AVIVO_TMDSA_TRANSMITTER_ENABLE, state->tmds1_clock_cntl);
     OUTREG(AVIVO_TMDSA_TRANSMITTER_CONTROL, state->tmds1_mystery3);
     OUTREG(AVIVO_DAC2_CNTL, state->dac2_cntl);
     OUTREG(AVIVO_DAC2_MYSTERY1, state->dac2_mystery1);
@@ -172,7 +172,7 @@ avivo_restore_state(ScrnInfoPtr screen_info)
     OUTREG(AVIVO_LVTMA_CNTL, state->tmds2_cntl);
     OUTREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL, state->tmds2_mystery1);
     OUTREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION, state->tmds2_mystery2);
-    OUTREG(AVIVO_LVTMA_CLOCK_CNTL, state->tmds2_clock_cntl);
+    OUTREG(AVIVO_LVTMA_TRANSMITTER_ENABLE, state->tmds2_clock_cntl);
     OUTREG(AVIVO_LVTMA_TRANSMITTER_CONTROL, state->tmds2_mystery3);
 #ifdef WITH_VGAHW
     vgaHWPtr hwp = VGAHWPTR(screen_info);
@@ -282,7 +282,7 @@ avivo_save_state(ScrnInfoPtr screen_info)
     state->tmds1_cntl = INREG(AVIVO_TMDSA_CNTL);
     state->tmds1_mystery1 = INREG(AVIVO_TMDSA_BIT_DEPTH_CONTROL);
     state->tmds1_mystery2 = INREG(AVIVO_TMDSA_DATA_SYNCHRONIZATION);
-    state->tmds1_clock_cntl = INREG(AVIVO_TMDSA_CLOCK_CNTL);
+    state->tmds1_clock_cntl = INREG(AVIVO_TMDSA_TRANSMITTER_ENABLE);
     state->tmds1_mystery3 = INREG(AVIVO_TMDSA_TRANSMITTER_CONTROL);
 
     state->dac2_cntl = INREG(AVIVO_DAC2_CNTL);
@@ -292,6 +292,6 @@ avivo_save_state(ScrnInfoPtr screen_info)
     state->tmds2_cntl = INREG(AVIVO_LVTMA_CNTL);
     state->tmds2_mystery1 = INREG(AVIVO_LVTMA_BIT_DEPTH_CONTROL);
     state->tmds2_mystery2 = INREG(AVIVO_LVTMA_DATA_SYNCHRONIZATION);
-    state->tmds2_clock_cntl = INREG(AVIVO_LVTMA_CLOCK_CNTL);
+    state->tmds2_clock_cntl = INREG(AVIVO_LVTMA_TRANSMITTER_ENABLE);
     state->tmds2_mystery3 = INREG(AVIVO_LVTMA_TRANSMITTER_CONTROL);
 }