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authorTom St Denis <tom.stdenis@amd.com>2019-04-05 11:05:33 -0400
committerTom St Denis <tom.stdenis@amd.com>2019-04-05 11:05:33 -0400
commit961ca1471036c1c6a2f67fe666b39257fc1db085 (patch)
treeb3ee53e7869ba7b5373d54ddcfa963c4baee14ca
parentd15c81aab05f322632fce0aac162e0d8ff98de52 (diff)
Add gpu bus to cpu bus translation function to the mem_funcs callback
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
-rw-r--r--src/lib/read_vram.c21
-rw-r--r--src/umr.h11
2 files changed, 28 insertions, 4 deletions
diff --git a/src/lib/read_vram.c b/src/lib/read_vram.c
index c219953..24fbac0 100644
--- a/src/lib/read_vram.c
+++ b/src/lib/read_vram.c
@@ -221,7 +221,10 @@ static int umr_access_vram_vi(struct umr_asic *asic, uint32_t vmid,
goto invalid_page;
// compute starting address
- start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & 0xFFF);
+ if (!asic->mem_funcs.gpu_bus_to_cpu_address)
+ start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & 0xFFF);
+ else
+ start_addr = asic->mem_funcs.gpu_bus_to_cpu_address(asic, pte_fields.page_base_addr) + (address & 0xFFF);
if (!pte_fields.system)
start_addr = start_addr - vm_fb_offset;
@@ -250,7 +253,10 @@ static int umr_access_vram_vi(struct umr_asic *asic, uint32_t vmid,
goto invalid_page;
// compute starting address
- start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & 0xFFF);
+ if (!asic->mem_funcs.gpu_bus_to_cpu_address)
+ start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & 0xFFF);
+ else
+ start_addr = asic->mem_funcs.gpu_bus_to_cpu_address(asic, pte_fields.page_base_addr) + (address & 0xFFF);
}
next_page:
@@ -601,7 +607,11 @@ pde_is_pte:
// compute starting address
offset_mask = (1ULL << ((current_depth * 9) + (12 + page_table_size))) - 1;
- start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & offset_mask);
+
+ if (!asic->mem_funcs.gpu_bus_to_cpu_address)
+ start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & offset_mask);
+ else
+ start_addr = asic->mem_funcs.gpu_bus_to_cpu_address(asic, pte_fields.page_base_addr) + (address & offset_mask);
DEBUG("phys address to read from: %" PRIx64 "\n\n\n", start_addr);
} else {
// in AI+ the BASE_ADDR is treated like a PDE entry...
@@ -651,7 +661,10 @@ pde_is_pte:
goto invalid_page;
// compute starting address
- start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & 0xFFF);
+ if (!asic->mem_funcs.gpu_bus_to_cpu_address)
+ start_addr = umr_vm_dma_to_phys(asic, pte_fields.page_base_addr) + (address & 0xFFF);
+ else
+ start_addr = asic->mem_funcs.gpu_bus_to_cpu_address(asic, pte_fields.page_base_addr) + (address & 0xFFF);
}
next_page:
diff --git a/src/umr.h b/src/umr.h
index d7d48ad..5578c6f 100644
--- a/src/umr.h
+++ b/src/umr.h
@@ -269,6 +269,17 @@ struct umr_memory_access_funcs {
*/
int (*access_linear_vram)(struct umr_asic *asic, uint64_t address, uint32_t size, void *data, int write_en);
+ /** gpu_bus_to_cpu_address -- convert a GPU bound address for
+ * system memory pages to CPU bound
+ * addresses
+ * @asic: The device the memory is bound to
+ * @dma_addr: The GPU bound address
+ *
+ * Returns: The address the CPU can use to access the memory in
+ * system memory
+ */
+ uint64_t (*gpu_bus_to_cpu_address)(struct umr_asic *asic, uint64_t dma_addr);
+
/** data -- opaque pointer the callbacks can use for state tracking */
void *data;
};