diff options
| author | Zhao Yakui <yakui.zhao@intel.com> | 2010-06-01 16:33:37 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2010-06-11 21:06:38 +0800 |
| commit | d447bb8745fc4a683b1b04e55ed0c3dc1fde367d (patch) | |
| tree | dac22b813be5134165b34623bf07a9edcc3c23e2 | |
| parent | b3c122515b4f4ed9eb5cc06cb0f8a093de77fa43 (diff) | |
drm/i915: Configure dither for eDP
The non-8 BPC can be used for the eDP output device that is
connected through DP-A or DP-D on PCH. In such case we should
set the PIPECONF dither correctly.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Tested-by: Jan-Hendrik Zab <jan@jhz.name>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7ffd51cf4f0..c7570195518 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3627,6 +3627,18 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, /* setup pipeconf */ pipeconf = I915_READ(pipeconf_reg); + /* configure the dither for eDP */ + if (HAS_PCH_SPLIT(dev) && + (is_edp || (is_dp && intel_pch_has_edp(crtc)))) { + pipeconf &= ~PIPE_DITHER_TYPE_MASK; + if ((pipeconf & PIPE_BPC_MASK) != PIPE_8BPC) { + pipeconf |= PIPE_ENABLE_DITHER; + pipeconf |= PIPE_DITHER_TYPE_ST01; + } else { + pipeconf &= ~PIPE_ENABLE_DITHER; + } + } + /* Set up the display plane register */ dspcntr = DISPPLANE_GAMMA_ENABLE; |