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authorJesse Barnes <jbarnes@virtuousgeek.org>2010-05-21 09:40:45 -0700
committerEric Anholt <eric@anholt.net>2010-05-26 13:48:43 -0700
commit9517a92f48b08bb02cfb616825850b82b28461cc (patch)
tree03b77b31d47a5e2ebfc9fb37cf2fd294873531bb
parentd1b851fc0d105caa6b6e3e7c92d2987dfb52cbe0 (diff)
drm/i915: add timeout to FBC disable waits
FBC disable on 965 can take long enough to trigger latency checks in the kernel so be sure to timeout after a reasonable period. Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15015. Tested-by: James Ettle <theholyettlz@googlemail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b867f3c7840..36afe940996 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1029,19 +1029,28 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
void i8xx_disable_fbc(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
+ unsigned long timeout = jiffies + msecs_to_jiffies(1);
u32 fbc_ctl;
if (!I915_HAS_FBC(dev))
return;
+ if (!(I915_READ(FBC_CONTROL) & FBC_CTL_EN))
+ return; /* Already off, just return */
+
/* Disable compression */
fbc_ctl = I915_READ(FBC_CONTROL);
fbc_ctl &= ~FBC_CTL_EN;
I915_WRITE(FBC_CONTROL, fbc_ctl);
/* Wait for compressing bit to clear */
- while (I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING)
- ; /* nothing */
+ while (I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) {
+ if (time_after(jiffies, timeout)) {
+ DRM_DEBUG_DRIVER("FBC idle timed out\n");
+ break;
+ }
+ ; /* do nothing */
+ }
intel_wait_for_vblank(dev);