| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
When exynos_mipi_update_cfg() is called, mipi dsi registers were become
sw reset. So, It needs to enable interrupt again.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
|
The exynos_mipi_dsi_set_main_disp_[hv]porch() functions take front and
back porch arguments in that order. This maps to the fb_videomode
right/lower_margin and left/upper_margin respectively. Fix the caller
accordingly.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Donghwa Lee <dh09.lee@samsung.com>
|
|
This patch adds analog and pll control setting. This control setting
is used for DP TX PHY block to set the values as below. It is beneficial
to improve analog characteristics.
- TX terminal registor is 50 Ohm.
- Reference clock of PHY is 24 MHz.
- Power source for TX digital logic is 1.0625 V.
- Power source for internal clock driver is 1.0625 V.
- PLL VCO range setting is 600 uA.
- Power down ring osc is turned off.
- AUX terminal resistor is 50 Ohm.
- AUX channel current is 8 mA and multiplied by 2.
- TX channel output amplitude is 400 mV.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
|
variable
The char pointer for adjust_request variable is replaced with char array
to fix possible null pointer dereference when clock recovery is failed.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
|
DP PLL Lock status should be checked in order to prevent unlocked PLL.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
|
Samsung EXYNOS SoC such Exynos5 has DP controller and embedded DP
panel can be used. This patch supports DP driver based on Samsung
EXYNOS SoC chip.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
|
An moled panel driver based MIPI DSI interface. S6E8AX0 means it may
includes many other ldi controllers, for example, S6E8AA0, S6E8AB0, and so
on.
This patch can be modified depending on each panel properites. For
example, second parameter of panel condition register can be changed
depending on ldi controller or amoled type.
[akpm@linux-foundation.org: fix Kconfig syntax error]
[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
|
Samsung S5PC210 and EXYNOS SoC platform has MIPI-DSI controller and
MIPI-DSI based LCD Panel could be used with it. This patch supports
MIPI-DSI driver based Samsung SoC chip.
LCD panel driver based MIPI-DSI should be registered to MIPI-DSI driver at
machine code and LCD panel driver specific function registered to
mipi_dsim_ddi structure at lcd panel init function called system init. In
the MIPI-DSI driver, find lcd panel driver by using registered lcd panel
name, and then initialize lcd panel driver.
Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jingoo Han <jg1.han@samsung.com>
Cc: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
|
