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2009-06-17x86-64: move clts into batch cpu state updates when preloading fpuJeremy Fitzhardinge1-9/+18
When a task is likely to be using the fpu, we preload its state during the context switch, rather than waiting for it to run an fpu instruction. Make sure the clts() happens while we're doing batched fpu state updates to optimise paravirtualized context switches. [ Impact: optimise paravirtual FPU context switch ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Rusty Russell <rusty@rustcorp.com.au>
2009-06-17x86-64: move unlazy_fpu() into lazy cpu state part of context switchJeremy Fitzhardinge1-3/+3
Make sure that unlazy_fpu()'s stts gets batched along with the other cpu state changes during context switch. (32-bit already does this.) This makes sure it gets batched when running paravirtualized. [ Impact: optimise paravirtual FPU context switch ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Rusty Russell <rusty@rustcorp.com.au>
2009-06-17x86-32: make sure clts is batched during context switchJeremy Fitzhardinge1-11/+16
If we're preloading the fpu state during context switch, make sure the clts happens while we're batching the cpu context update, then do the actual __math_state_restore once the updates are flushed. This allows more efficient context switches when running paravirtualized, as all the hypercalls can be folded together into one. [ Impact: optimise paravirtual FPU context switch ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Rusty Russell <rusty@rustcorp.com.au>
2009-06-17x86: split out core __math_state_restoreJeremy Fitzhardinge2-10/+24
Split the core fpu state restoration out into __math_state_restore, which assumes that cr0.TS is clear and that the fpu context has been initialized. This will be used during context switch. There are two reasons this is desireable: - There's a small clarification. When __switch_to() calls math_state_restore, it relies on the fact that tsk_used_math() returns true, and so will never do a blocking init_fpu(). __math_state_restore() does not have (or need) that logic, so the question never arises. - It allows the clts() to be moved earler in __switch_to() so it can be performed while cpu context updates are batched (will be done in a later patch). [ Impact: refactor code to make reuse cleaner; no functional change ] Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com> Cc: Alok Kataria <akataria@vmware.com> Cc: Rusty Russell <rusty@rustcorp.com.au>
2009-06-17Merge branch 'kmemleak' of git://linux-arm.org/linux-2.6Linus Torvalds1-12/+15
* 'kmemleak' of git://linux-arm.org/linux-2.6: kmemleak: Fix some typos in comments kmemleak: Rename kmemleak_panic to kmemleak_stop kmemleak: Only use GFP_KERNEL|GFP_ATOMIC for the internal allocations
2009-06-17kmemleak: Fix some typos in commentsCatalin Marinas1-4/+4
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2009-06-17kmemleak: Rename kmemleak_panic to kmemleak_stopCatalin Marinas1-6/+6
This is to avoid the confusion created by the "panic" word. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Pekka Enberg <penberg@cs.helsinki.fi>
2009-06-17kmemleak: Only use GFP_KERNEL|GFP_ATOMIC for the internal allocationsCatalin Marinas1-2/+5
Kmemleak allocates memory for pointer tracking and it tries to avoid using GFP_ATOMIC if the caller doesn't require it. However other gfp flags may be passed by the caller which aren't required by kmemleak. This patch filters the gfp flags so that only GFP_KERNEL | GFP_ATOMIC are used. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Pekka Enberg <penberg@cs.helsinki.fi>
2009-06-17Merge branch 'fixes' of ↵Linus Torvalds11-287/+235
git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq * 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq: [CPUFREQ] cpumask: new cpumask operators for arch/x86/kernel/cpu/cpufreq/powernow-k8.c [CPUFREQ] cpumask: avoid playing with cpus_allowed in powernow-k8.c [CPUFREQ] cpumask: avoid cpumask games in arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c [CPUFREQ] cpumask: avoid playing with cpus_allowed in speedstep-ich.c [CPUFREQ] powernow-k8: get drv data for correct CPU [CPUFREQ] powernow-k8: read P-state from HW [CPUFREQ] reduce scope of ACPI_PSS_BIOS_BUG_MSG[] [CPUFREQ] Clean up convoluted code in arch/x86/kernel/tsc.c:time_cpufreq_notifier() [CPUFREQ] minor correction to cpu-freq documentation [CPUFREQ] powernow-k8.c: mess cleanup [CPUFREQ] Only set sampling_rate_max deprecated, sampling_rate_min is useful [CPUFREQ] powernow-k8: Set transition latency to 1 if ACPI tables export 0 [CPUFREQ] ondemand: Uncouple minimal sampling rate from HZ in NO_HZ case
2009-06-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6Linus Torvalds42-505/+1888
* git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6: [SCSI] aic79xx: make driver respect nvram for IU and QAS settings [SCSI] don't attach ULD to Dell Universal Xport [SCSI] lpfc 8.3.3 : Update driver version to 8.3.3 [SCSI] lpfc 8.3.3 : Add support for Target Reset handler entrypoint [SCSI] lpfc 8.3.3 : Fix a couple of spin_lock and memory issues and a crash [SCSI] lpfc 8.3.3 : FC/FCOE discovery fixes [SCSI] lpfc 8.3.3 : Fix various SLI-3 vs SLI-4 differences [SCSI] qla2xxx: Resolve a performance issue in interrupt [SCSI] cnic, bnx2i: Fix build failure when CONFIG_PCI is not set. [SCSI] nsp_cs: time_out reaches -1 [SCSI] qla2xxx: fix printk format warnings [SCSI] ncr53c8xx: div reaches -1 [SCSI] compat: don't perform unneeded copy in sg_io code [SCSI] zfcp: Update FC pass-through support [SCSI] zfcp: Add FC pass-through support [SCSI] FC Pass Thru support
2009-06-17Merge branch 'linux-next' of git://git.infradead.org/ubi-2.6Linus Torvalds13-335/+922
* 'linux-next' of git://git.infradead.org/ubi-2.6: (21 commits) UBI: add reboot notifier UBI: handle more error codes UBI: fix multiple spelling typos UBI: fix kmem_cache_free on error patch UBI: print amount of reserved PEBs UBI: improve messages in the WL worker UBI: make gluebi a separate module UBI: remove built-in gluebi UBI: add notification API UBI: do not switch to R/O mode on read errors UBI: fix and clean-up error paths in WL worker UBI: introduce new constants UBI: fix race condition UBI: minor serialization fix UBI: do not panic if volume check fails UBI: add dump_stack in checking code UBI: fix races in I/O debugging checks UBI: small debugging code optimization UBI: improve debugging messages UBI: re-name volumes_mutex to device_mutex ...
2009-06-17Merge branch 'linux-next' of git://git.infradead.org/ubifs-2.6Linus Torvalds7-72/+104
* 'linux-next' of git://git.infradead.org/ubifs-2.6: UBIFS: start using hrtimers hrtimer: export ktime_add_safe UBIFS: do not forget to register BDI device UBIFS: allow sync option in rootflags UBIFS: remove dead code UBIFS: use anonymous device UBIFS: return proper error code if the compr is not present UBIFS: return error if link and unlink race UBIFS: reset no_space flag after inode deletion
2009-06-17Documentation/vm/Makefile: don't try to build slqbinfoAndrew Morton1-1/+1
For it is only in linux-next at this stage. Cc: Wu Fengguang <fengguang.wu@intel.com> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: Andi Kleen <andi@firstfloor.org> Cc: Matt Mackall <mpm@selenic.com> Cc: Alexey Dobriyan <adobriyan@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-06-17drm/radeon/kms: remove the _DRM_DRIVER from the KMS paths.Dave Airlie1-1/+1
This causes an issue since we fixed the drm mappings to do the right thing, so its just a copy and pasto. Signed-off-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-06-17Merge branch 'for-linus' of ↵Linus Torvalds5-28/+98
git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6: SLUB: Fix early boot GFP_DMA allocations SLUB: Don't print out OOM warning for __GFP_NOFAIL SLUB: fix build when !SLUB_DEBUG SLUB: Out-of-memory diagnostics slab: document kzfree() zeroing behavior slab: fix generic PAGE_POISONING conflict with SLAB_RED_ZONE slob: use PG_slab for identifying SLOB pages
2009-06-17Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linusLinus Torvalds184-677/+42642
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (47 commits) MIPS: Add hibernation support MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h MIPS: Allow CPU specific overriding of CP0 hwrena impl bits. MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems. Hugetlbfs: Enable hugetlbfs for more systems in Kconfig. MIPS: TLB support for hugetlbfs. MIPS: Add hugetlbfs page defines. MIPS: Add support files for hugetlbfs. MIPS: Remove unused parameters from iPTE_LW. Staging: Add octeon-ethernet driver files. MIPS: Export erratum function needed by octeon-ethernet driver. MIPS: Cavium-Octeon: Add more chip specific feature tests. MIPS: Cavium-Octeon: Add more board type constants. MIPS: Export cvmx_sysinfo_get needed by octeon-ethernet driver. MIPS: Add named alloc functions to OCTEON boot monitor memory allocator. MIPS: Alchemy: devboards: Convert to gpio calls. MIPS: Alchemy: xxs1500: use linux gpio api. MIPS: Alchemy: MTX-1: Use linux gpio api. MIPS: Alchemy: Rewrite GPIO support. MIPS: Alchemy: Remove unused au1000_gpio.h header ...
2009-06-17Merge branch 'for-linus' of ↵Linus Torvalds27-219/+95
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6 * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6: get rid of BKL in fs/sysv get rid of BKL in fs/minix get rid of BKL in fs/efs befs ->pust_super() doesn't need BKL Cleanup of adfs headers 9P doesn't need BKL in ->umount_begin() fuse doesn't need BKL in ->umount_begin() No instance of ->bmap() needs BKL remove unlock_kernel() left accidentally ext4: avoid unnecessary spinlock in critical POSIX ACL path ext3: avoid unnecessary spinlock in critical POSIX ACL path
2009-06-17MIPS: Add hibernation supportWu Zhangjin7-0/+143
[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't support. As implemented in this patch cache and tlb flushing will also be invoked with interrupts disabled so smp_call_function() will blow up in charming ways. So limit to !SMP.] Reviewed-by: Pavel Machek <pavel@ucw.cz> Reviewed-by: Yan Hua <yanh@lemote.com> Reviewed-by: Arnaud Patard <apatard@mandriva.com> Reviewed-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Wu Zhangjin <wuzj@lemote.com> Signed-off-by: Hu Hongbing <huhb@lemote.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.hDavid Daney2-4/+1
We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove it to mach-cavium-octeon/cpu-feature-overrides.h Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.David Daney2-1/+5
Some CPUs have implementation dependent rdhwr registers. Allow them to be enabled on a per CPU basis. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems.David Daney1-0/+11
Add new kconfig variables SYS_SUPPORTS_HUGETLBFS and CPU_SUPPORTS_HUGEPAGES. They are enabled for systems that are known to support huge pages. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17Hugetlbfs: Enable hugetlbfs for more systems in Kconfig.David Daney1-1/+1
As part of adding hugetlbfs support for MIPS, I am adding a new kconfig variable 'SYS_SUPPORTS_HUGETLBFS'. Since some mips cpu varients don't yet support it, we can enable selection of HUGETLBFS on a system by system basis from the arch/mips/Kconfig. Signed-off-by: David Daney <ddaney@caviumnetworks.com> CC: William Irwin <wli@holomorphy.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: TLB support for hugetlbfs.David Daney2-12/+196
The TLB handlers need to check for huge pages and give them special handling. Huge pages consist of two contiguous sub-pages of physical memory. * Loading entrylo0 and entrylo1 need to be handled specially. * The page mask must be set for huge pages and then restored after writing the TLB entries. * The PTE for huge pages resides in the PMD, we halt traversal of the tables there. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Add hugetlbfs page defines.David Daney4-0/+32
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Add support files for hugetlbfs.David Daney3-0/+216
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Remove unused parameters from iPTE_LW.David Daney1-14/+14
The l parameter to iPTE_LW() is unused. Remove it and from some of its callers as well. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17Staging: Add octeon-ethernet driver files.David Daney76-0/+26149
The octeon-ethernet driver supports the sgmii, rgmii, spi, and xaui ports present on the Cavium OCTEON family of SOCs. These SOCs are multi-core mips64 processors with existing support over in arch/mips. The driver files can be categorized into three basic groups: 1) Register definitions, these are named cvmx-*-defs.h 2) Main driver code, these have names that don't start cvmx-. 3) Interface specific functions and other utility code, names starting with cvmx- Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Export erratum function needed by octeon-ethernet driver.David Daney1-0/+3
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Cavium-Octeon: Add more chip specific feature tests.David Daney1-0/+27
The octeon-ethernet driver needs to check for additional chip specific features, we add them to the octeon_has_feature() framework. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Cavium-Octeon: Add more board type constants.David Daney1-0/+13
The bootloader now uses additional board type constants. The octeon-ethernet driver needs some of the new values. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Export cvmx_sysinfo_get needed by octeon-ethernet driver.David Daney1-0/+2
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Add named alloc functions to OCTEON boot monitor memory allocator.David Daney2-0/+189
The various Octeon ethernet drivers use these new functions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Alchemy: devboards: Convert to gpio calls.Manuel Lauss6-17/+26
Replace a few open-coded GPIO register accesses with gpio calls. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Alchemy: xxs1500: use linux gpio api.Manuel Lauss1-9/+12
Replace a few GPIO register accesses in the board init code with calls to the gpio api. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Alchemy: MTX-1: Use linux gpio api.Manuel Lauss1-11/+13
Replace a few GPIO register accesses in the board init code with calls to the gpio api. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Alchemy: Rewrite GPIO support.Manuel Lauss7-233/+770
The current in-kernel Alchemy GPIO support is far too inflexible for all my use cases. To address this, the following changes are made: * create generic functions which deal with manipulating the on-chip GPIO1/2 blocks. Such functions are universally useful. * Macros for GPIO2 shared interrupt management and block control. * support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros. If CONFIG_GPIOLIB is not enabled, provide linux gpio framework compatibility by directly inlining the GPIO1/2 functions. GPIO access is limited to on-chip ones and they can be accessed as documented in the datasheets (GPIO0-31 and 200-215). If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and one for GPIO2, are registered. GPIOs can still be accessed by using the numberspace established in the databooks. However this is not yet flexible enough for my uses: My Alchemy systems have a documented "external" gpio interface (fixed, different numberspace) and can support a variety of baseboards, some of which are equipped with I2C gpio expanders. I want to be able to provide the default 16 GPIOs of the CPU board numbered as 0..15 and also support gpio expanders, if present, starting as gpio16. To achieve this, a new Kconfig symbol for Alchemy is introduced, CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal that they don't want the Alchemy numberspace exposed to the outside world, but instead want to provide their own. Boards are now respon- sible for providing the linux gpio interface glue code (either in a custom gpio.h header (in board include directory) or with gpio_chips). To make the board-specific inlined gpio functions work, the MIPS Makefile must be changed so that the mach-au1x00/gpio.h header is included _after_ the board headers, by moving the inclusion of the mach-au1x00/ to the end of the header list. See arch/mips/include/asm/mach-au1x00/gpio.h for more info. Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Acked-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Alchemy: Remove unused au1000_gpio.h headerManuel Lauss1-56/+0
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: BCM47xx: Fix gpio_direction_outputMatthieu Castet1-0/+3
gpio_direction_output should also set an output value according to the API. Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: ioctl.h: Cleanup.Ralf Baechle1-78/+7
o Rewrite to use <asm-generic/ioctl.h>. Cuts down the file from 40 to 16 lines. o Delete _IOC_VOID, _IOC_OUT, _IOC_IN and _IOC_INOUT. They were added for 2.1.14 but I was not able to find any user - not even historical ones. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: TXx9: Add TX4939 RNG supportAtsushi Nemoto3-0/+21
Add platform support for RNG of TX4939 SoC. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: hwrng: Add TX4939 RNG driverAtsushi Nemoto3-0/+198
This patch adds support for the integrated RNG of the TX4939 SoC. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Acked-by: Matt Mackall <mpm@selenic.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: TXx9: Add SRAMC supportAtsushi Nemoto8-0/+101
Add a sysdev to access SRAM in TXx9 SoCs via sysfs. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Sibyte: Remove standalone kernel supportImre Kaloz9-133/+5
CFE is the only supported and used bootloader on the SiByte boards, the standalone kernel support has been never used outside Broadcom. Remove it and make the kernel use CFE by default. Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Sibyte: Remove simulator optionImre Kaloz2-11/+0
This patch removes the SiByte simulation Kconfig option, which only modified a printk. Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: RB532: Check irq number when handling GPIO interruptsFlorian Fainelli1-2/+3
This patch makes sure that we are not going to clear or change the interrupt status of a GPIO interrupt superior to 13 as this is the maximum number of GPIO interrupt source (p.232 of the RC32434 reference manual). Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: RB532: Cleanup cpu-features-overridesFlorian Fainelli1-5/+0
Remove commented out definitions. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Remove dead case label.David Daney1-1/+0
CPU_CAVIUM_OCTEON is mips_r2 which is handled before the switch. This label in the switch statement is dead code, so we remove it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Reviewed by: David VomLehn <dvomlehn@cisco.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Remove execution hazard barriers for Octeon.David Daney1-0/+1
The Octeon has no execution hazards, so we can remove them and save an instruction per TLB handler invocation. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Reviewed by: David VomLehn <dvomlehn@cisco.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.David Daney2-1/+6
Some CPUs do not need ehb instructions after writing CP0 registers. By allowing ehb generation to be overridden in cpu-feature-overrides.h, we can save a few instructions in the TLB handler hot paths. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-06-17MIPS: Fold the TLB refill at the vmalloc path if possible.David Daney1-24/+49
Try to fold the 64-bit TLB refill handler opportunistically at the beginning of the vmalloc path so as to avoid splitting execution flow in half and wasting cycles for a branch required at that point then. Resort to doing the split if either of the newly created parts would not fit into its designated slot. Original-patch-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>