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author | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-19 21:10:07 +0000 |
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committer | tstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8> | 2012-10-19 21:10:07 +0000 |
commit | 400a07eff8fceeba767972c37c837d77ad7529e0 (patch) | |
tree | d8468135f462a8d0bb0ecd941331c4f27b3db313 /lib/Target/AMDGPU/R600InstrInfo.h | |
parent | e801ffc5c0a1133fb973654af657d227ff10c9bd (diff) |
R600: Use native operands for MOV_IMM_* instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@166328 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/AMDGPU/R600InstrInfo.h')
-rw-r--r-- | lib/Target/AMDGPU/R600InstrInfo.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/lib/Target/AMDGPU/R600InstrInfo.h b/lib/Target/AMDGPU/R600InstrInfo.h index 33899ce6a9..faef05363a 100644 --- a/lib/Target/AMDGPU/R600InstrInfo.h +++ b/lib/Target/AMDGPU/R600InstrInfo.h @@ -120,6 +120,11 @@ namespace llvm { unsigned DstReg, unsigned Src0Reg) const; + MachineInstr *buildMovImm(MachineBasicBlock &BB, + MachineBasicBlock::iterator I, + unsigned DstReg, + uint64_t Imm) const; + /// getOperandIdx - Get the index of Op in the MachineInstr. Returns -1 /// if the Instruction does not contain the specified Op. int getOperandIdx(const MachineInstr &MI, R600Operands::Ops Op) const; |