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authortstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>2012-10-22 14:55:38 +0000
committertstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>2012-10-22 14:55:38 +0000
commit46937a921e47cb16a8516a63f3e891dc4bac2ef9 (patch)
treec953bea4d7d63abdd6d72a0ad1292e1e8cc0e6d1
parent81d3998812b5977a220d62076cc446822747af21 (diff)
AMDGPU: Fix build after merge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@166412 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/AMDGPU/SILowerFlowControl.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/SILowerFlowControl.cpp b/lib/Target/AMDGPU/SILowerFlowControl.cpp
index 62b059f74a..25f113eb62 100644
--- a/lib/Target/AMDGPU/SILowerFlowControl.cpp
+++ b/lib/Target/AMDGPU/SILowerFlowControl.cpp
@@ -97,7 +97,7 @@ bool SILowerFlowControlPass::runOnMachineFunction(MachineFunction &MF) {
S = AMDGPU::SReg_64RegClass.end();
I != S; ++I) {
unsigned Reg = *I;
- if (!MF.getRegInfo().isPhysRegOrOverlapUsed(Reg)) {
+ if (!MF.getRegInfo().isPhysRegUsed(Reg)) {
UnusedRegisters.insert(UnusedRegisters.begin(), Reg);
}
}