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2012-12-27[ASan] Fix lifetime intrinsics handling. Now for each intrinsic we check if ↵Alexey Samsonov1-1/+24
it describes one of 'interesting' allocas. Assume that allocas can go through casts and phi-nodes before apperaring as llvm.lifetime arguments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sizedNadav Rotem1-0/+38
register. In most cases we actually compare or select YMM-sized registers and mixing the two types creates horrible code. This commit optimizes some of the transition sequences. PR14657. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27For the dwarf5 split debug info code split out the string sectionEric Christopher2-4/+4
per compile unit/skeleton compile unit. Update tests accordingly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171133 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27FileCheck-ize.Eric Christopher1-5/+8
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27FileCheck-ize.Eric Christopher1-7/+11
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Right now all of the relocations are 32-bit dwarf, and the relocationEric Christopher1-3/+4
information doesn't return an addend for Rel relocations. Go ahead and use this information to fix relocation handling inside dwarfdump for 32-bit ELF REL. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171126 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26If all of the write objects are identified then we can vectorize the loop ↵Nadav Rotem1-0/+53
even if the read objects are unidentified. PR14719. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26LoopVectorizer: Optimize the vectorization of consecutive memory access when ↵Nadav Rotem1-1/+2
the iteration step is -1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26[msan] Raise alignment of origin stores/loads when possible.Evgeniy Stepanov1-2/+9
Origin alignment is as high as the alignment of the corresponding application location, but never less than 4. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26llvm/test/CodeGen/X86: FileCheck-ize two tests in r171083.NAKAMURA Takumi2-2/+17
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26llvm/test/CodeGen/X86: Disable avx in two tests corresponding to r171082.NAKAMURA Takumi2-2/+2
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26BBVectorize: Use VTTI to compute costs for intrinsics vectorizationHal Finkel1-0/+79
For the time being this includes only some dummy test cases. Once the generic implementation of the intrinsics cost function does something other than assuming scalarization in all cases, or some target specializes the interface, some real test cases can be added. Also, for consistency, I changed the type of IID from unsigned to Intrinsic::ID in a few other places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171079 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25LoopVectorize: Enable vectorization of the fmuladd intrinsicHal Finkel1-0/+60
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171076 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25BBVectorize: Enable vectorization of the fmuladd intrinsicHal Finkel1-0/+28
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Loosen scheduling restrictions on the PPC dcbt intrinsicHal Finkel1-0/+22
As with the prefetch intrinsic to which it maps, simply have dcbt marked as reading from and writing to its arguments instead of having unmodeled side effects. While this might cause unwanted code motion (because aliasing checks don't really capture cache-line sharing), it is more important that prefetches in unrolled loops don't block the scheduler from rearranging the unrolled loop body. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171073 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Expand PPC64 atomic load and storeHal Finkel1-0/+20
Use of store or load with the atomic specifier on 64-bit types would cause instruction-selection failures. As with the 32-bit case, these can use the default expansion in terms of cmp-and-swap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25[msan] Fix handling of vectors of pointers.Evgeniy Stepanov1-0/+15
VectorType::getInteger() can not be used with them, because pointer size depends on the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171070 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25[msan] Fix handling of select with vector condition.Evgeniy Stepanov1-0/+17
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Harden test so it's not affected by changes to compare lowering.Benjamin Kramer1-1/+1
This only failed on hosts that don't have SSE41. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171066 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use ↵Benjamin Kramer1-4/+2
of and commutativity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25X86: Custom lower <2 x i64> eq and ne when SSE41 is not available.Benjamin Kramer1-0/+26
pcmpeqd, pshufd, pshufd, pand is cheaper than unpack + cmpq, sbbq, cmpq, sbbq + pack. Small speedup on loop-vectorized viterbi (-march=core2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24Fix typo "Makre" -> "Make".Nick Lewycky1-6/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171043 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24llvm/test/CodeGen/X86/fold-vex.ll: Add explicit triple.NAKAMURA Takumi1-1/+1
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24Some x86 instructions can load/store one of the operands to memory. On SSE, ↵Nadav Rotem1-0/+16
this memory needs to be aligned. When these instructions are encoded in VEX (on AVX) there is no such requirement. This changes the folding tables and removes the alignment restrictions from VEX-encoded instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171024 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24LoopVectorizer: When checking for vectorizable types, also checkNadav Rotem1-0/+29
the StoreInst operands. PR14705. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24LoopVectorizer: Fix an endless loop in the code that looks for reductions.Nadav Rotem1-0/+44
The bug was in the code that detects PHIs in if-then-else block sequence. PR14701. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171008 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-23CostModel: Change the default target-independent implementation for findingNadav Rotem1-3/+3
the cost of arithmetic functions. We now assume that the cost of arithmetic operations that are marked as Legal or Promote is low, but ops that are marked as custom are higher. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171002 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-23We are not ready to estimate the cost of integer expansions based on the ↵Nadav Rotem1-2/+0
number of parts. This test is too noisy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170999 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-23Loop Vectorizer: Update the cost model of scatter/gather operations and makeNadav Rotem1-1/+4
them more expensive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170995 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-22X86: Turn mul of <4 x i32> into pmuludq when no SSE4.1 is available.Benjamin Kramer1-0/+14
pmuludq is slow, but it turns out that all the unpacking and packing of the scalarized mul is even slower. 10% speedup on loop-vectorized paq8p. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170985 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-22X86: Emit vector sext as shuffle + sra if vpmovsx is not available.Benjamin Kramer1-23/+96
Also loosen the SSSE3 dependency a bit, expanded pshufb + psra is still better than scalarized loads. Fixes PR14590. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21In some cases, due to scheduling constraints we copy the EFLAGS.Nadav Rotem1-0/+37
The only way to read the eflags is using push and pop. If we don't adjust the stack then we run over the first frame index. This is not something that we want to do, so we have to make sure that our machine function does not copy the flags. If it does then we have to emit the prolog that adjusts the stack. rdar://12896831 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170961 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21[mips] Fix encoding of BAL instruction. Also, fix assembler test case whichAkira Hatanaka1-1/+1
was not catching the error. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21try to unbreak ppc buildbots.Benjamin Kramer1-4/+4
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170913 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21X86: Match pmin/pmax as a target specific dag combine. This occurs during ↵Benjamin Kramer2-3/+2790
vectorization. Part of PR14667. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170908 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21R600: Expand vec4 INT <-> FP conversionsTom Stellard1-0/+52
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170901 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21[msan] Remove unreachable blocks before instrumenting a function.Evgeniy Stepanov1-0/+23
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21Improve the X86 cost model for loads and stores.Nadav Rotem2-2/+67
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170830 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21Add test case for r170674Reed Kotler1-0/+29
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170823 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21Fix a bug in the code that checks if we can vectorize loops while using dynamicNadav Rotem2-48/+110
memory bound checks. Before the fix we were able to vectorize this loop from the Livermore Loops benchmark: for ( k=1 ; k<n ; k++ ) x[k] = x[k-1] + y[k]; git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170811 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-21Move these files over to the debug info directory.Eric Christopher2-0/+0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170810 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Revert "Adding support for llvm.arm.neon.vaddl[su].* and"Bob Wilson2-128/+0
This reverts r170694. The operations can be represented in IR without adding any new intrinsics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170765 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20LoopVectorize: Fix a bug in the scalarization of instructions.Nadav Rotem1-0/+48
Before if-conversion we could check if a value is loop invariant if it was declared inside the basic block. Now that loops have multiple blocks this check is incorrect. This fixes External/SPEC/CINT95/099_go/099_go git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170756 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20On some ARM cpus, flags setting movs with shifter operand, i.e. lsl, lsr, asr,Evan Cheng1-13/+69
are more expensive than the non-flag setting variant. Teach thumb2 size reduction pass to avoid generating them unless we are optimizing for size. rdar://12892707 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170728 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Change Lit error redirection to FileCheck to a more common syntax since itEli Bendersky6-6/+6
can potentially cause some bots to fail. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170726 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Add a largish auto-generated test for the aligned bundling feature, along withEli Bendersky1-0/+2674
the script generating it. The test should never be modified manually. If anyone needs to change it, please change the script and re-run it. The script is placed into utils/testgen - I couldn't think of a better place, and after some discussion on IRC this looked like a logical location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170720 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Tests for the aligned bundling support added in r170718Eli Bendersky13-0/+289
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170719 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Simplify the testcase a bit.Rafael Espindola1-15/+4
I checked that it would still crash llc before the corresponding fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170709 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Add a new attribute, 'noduplicate'. If a function contains a noduplicate ↵James Molloy5-1/+168
call, the call cannot be duplicated - Jump threading, loop unrolling, loop unswitching, and loop rotation are inhibited if they would duplicate the call. Similarly inlining of the function is inhibited, if that would duplicate the call (in particular inlining is still allowed when there is only one callsite and the function has internal linkage). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170704 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-20Adding support for llvm.arm.neon.vaddl[su].* andRenato Golin2-0/+128
llvm.arm.neon.vsub[su].* intrinsics. Patch by Pete Couperus <pjcoup@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170694 91177308-0d34-0410-b5e6-96231b3b80d8
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