summaryrefslogtreecommitdiff
path: root/drivers/usb/otg
diff options
context:
space:
mode:
authorAnji jonnala <anjir@codeaurora.org>2011-05-04 10:19:46 +0530
committerGreg Kroah-Hartman <gregkh@suse.de>2011-05-06 18:27:48 -0700
commit0f73cac8e41723d600c91a0f5b481dc3202f4f82 (patch)
tree23d6bbcbe623c6bc5863149935724614ef1f248c /drivers/usb/otg
parent3db7739c80990ef53621f76f6095a91e70d88546 (diff)
USB: OTG: msm: vote for dayatona fabric clock
HSUSB core clock is derived from daytona fabric clock and for HSUSB operational require minimum core clock at 55MHz. Since, HSUSB cannot tolerate daytona fabric clock change in the middle of HSUSB operational, vote for maximum Daytona fabric clock while usb is operational Signed-off-by: Anji jonnala <anjir@codeaurora.org> Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/otg')
-rw-r--r--drivers/usb/otg/msm_otg.c36
1 files changed, 35 insertions, 1 deletions
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index f58b7dab75aa..7792fef0be5e 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -324,6 +324,9 @@ static int msm_otg_suspend(struct msm_otg *motg)
if (motg->core_clk)
clk_disable(motg->core_clk);
+ if (!IS_ERR(motg->pclk_src))
+ clk_disable(motg->pclk_src);
+
if (device_may_wakeup(otg->dev))
enable_irq_wake(motg->irq);
if (bus)
@@ -347,6 +350,9 @@ static int msm_otg_resume(struct msm_otg *motg)
if (!atomic_read(&motg->in_lpm))
return 0;
+ if (!IS_ERR(motg->pclk_src))
+ clk_enable(motg->pclk_src);
+
clk_enable(motg->pclk);
clk_enable(motg->clk);
if (motg->core_clk)
@@ -862,12 +868,31 @@ static int __init msm_otg_probe(struct platform_device *pdev)
ret = PTR_ERR(motg->clk);
goto put_phy_reset_clk;
}
+ clk_set_rate(motg->clk, 60000000);
+
+ /*
+ * If USB Core is running its protocol engine based on CORE CLK,
+ * CORE CLK must be running at >55Mhz for correct HSUSB
+ * operation and USB core cannot tolerate frequency changes on
+ * CORE CLK. For such USB cores, vote for maximum clk frequency
+ * on pclk source
+ */
+ if (motg->pdata->pclk_src_name) {
+ motg->pclk_src = clk_get(&pdev->dev,
+ motg->pdata->pclk_src_name);
+ if (IS_ERR(motg->pclk_src))
+ goto put_clk;
+ clk_set_rate(motg->pclk_src, INT_MAX);
+ clk_enable(motg->pclk_src);
+ } else
+ motg->pclk_src = ERR_PTR(-ENOENT);
+
motg->pclk = clk_get(&pdev->dev, "usb_hs_pclk");
if (IS_ERR(motg->pclk)) {
dev_err(&pdev->dev, "failed to get usb_hs_pclk\n");
ret = PTR_ERR(motg->pclk);
- goto put_clk;
+ goto put_pclk_src;
}
/*
@@ -955,6 +980,11 @@ put_core_clk:
if (motg->core_clk)
clk_put(motg->core_clk);
clk_put(motg->pclk);
+put_pclk_src:
+ if (!IS_ERR(motg->pclk_src)) {
+ clk_disable(motg->pclk_src);
+ clk_put(motg->pclk_src);
+ }
put_clk:
clk_put(motg->clk);
put_phy_reset_clk:
@@ -1004,6 +1034,10 @@ static int __devexit msm_otg_remove(struct platform_device *pdev)
clk_disable(motg->clk);
if (motg->core_clk)
clk_disable(motg->core_clk);
+ if (!IS_ERR(motg->pclk_src)) {
+ clk_disable(motg->pclk_src);
+ clk_put(motg->pclk_src);
+ }
iounmap(motg->regs);
pm_runtime_set_suspended(&pdev->dev);