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authorEric Anholt <eric@anholt.net>2011-08-16 14:18:51 -0700
committerEric Anholt <eric@anholt.net>2011-08-19 16:55:02 -0700
commiteb5454f20a7ad998f2789d9b2a91adcd41c887b6 (patch)
tree22c9736b7c01179c68cde9060135ce76cbe62b59
parentdb71537f01e0e6fd19e90bda6cfd727bb18832df (diff)
i965/vs: Remove stale comment about compressed instructions.
This was copy'n'paste from the fragment shader, and didn't make sense here.
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index d5fd21d99a4..70395533119 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -63,7 +63,6 @@ vec4_visitor::reg_allocate_trivial()
}
}
- /* Note that compressed instructions require alignment to 2 registers. */
hw_reg_mapping[0] = this->first_non_payload_grf;
next = hw_reg_mapping[0] + this->virtual_grf_sizes[0];
for (i = 1; i < this->virtual_grf_count; i++) {