i965/blorp/gen6: Move surface setup for the parameter type to handle

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

2 files changed, 34 insertions, 21 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h b/src/mesa/drivers/dri/i965/brw_blorp.h
index 2f6cd23449..fde4a2c26c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -215,6 +215,8 @@ public:
 
    virtual void gen6_emit_wm_constants(struct brw_context *brw);
 
+   virtual void gen6_emit_surface_states(struct brw_context *brw);
+
    virtual void gen6_emit_wm_config(struct brw_context *brw) const;
    virtual void gen7_emit_wm_config(struct brw_context *brw) const;
 
@@ -356,6 +358,8 @@ public:
 
    virtual void gen6_emit_wm_constants(struct brw_context *brw);
 
+   virtual void gen6_emit_surface_states(struct brw_context *brw);
+
    virtual void gen6_emit_wm_config(struct brw_context *brw) const;
    virtual void gen7_emit_wm_config(struct brw_context *brw) const;
 
@@ -371,6 +375,7 @@ private:
    brw_blorp_prog_data *prog_data;
    uint32_t prog_offset;
    uint32_t wm_push_const_offset;
+   uint32_t wm_bind_bo_offset;
 };
 
 /**
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index 231076ad27..a6d2098475 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -1011,6 +1011,11 @@ brw_blorp_params::gen6_emit_wm_constants(struct brw_context *)
 }
 
 void
+brw_blorp_params::gen6_emit_surface_states(struct brw_context *brw)
+{
+}
+
+void
 brw_blorp_params::gen6_emit_wm_config(struct brw_context *brw) const
 {
    gen6_blorp_emit_constant_ps_disable(brw, this);
@@ -1029,10 +1034,33 @@ brw_blorp_blit_params::gen6_emit_wm_constants(struct brw_context *brw)
 }
 
 void
+brw_blorp_blit_params::gen6_emit_surface_states(struct brw_context *brw)
+{
+   uint32_t wm_surf_offset_renderbuffer;
+   uint32_t wm_surf_offset_texture = 0;
+   intel_miptree_used_for_rendering(dst.mt);
+   wm_surf_offset_renderbuffer =
+      gen6_blorp_emit_surface_state(brw, this, &dst,
+                                    I915_GEM_DOMAIN_RENDER,
+                                    I915_GEM_DOMAIN_RENDER);
+   if (src.mt) {
+      wm_surf_offset_texture =
+         gen6_blorp_emit_surface_state(brw, this, &src,
+                                       I915_GEM_DOMAIN_SAMPLER, 0);
+   }
+
+   wm_bind_bo_offset =
+      gen6_blorp_emit_binding_table(brw,
+                                    wm_surf_offset_texture,
+                                    wm_surf_offset_renderbuffer);
+}
+
+void
 brw_blorp_blit_params::gen6_emit_wm_config(struct brw_context *brw) const
 {
    gen6_blorp_emit_constant_ps(brw, this, wm_push_const_offset);
    gen6_blorp_emit_wm_config(brw, this, prog_offset, prog_data);
+   gen6_blorp_emit_binding_table_pointers(brw, wm_bind_bo_offset);
 }
 
 void
@@ -1059,7 +1087,6 @@ gen6_blorp_exec(struct brw_context *brw,
    uint32_t cc_blend_state_offset = 0;
    uint32_t cc_state_offset = 0;
    uint32_t depthstencil_offset;
-   uint32_t wm_bind_bo_offset = 0;
 
    /* Emit workaround flushes when we switch from drawing to blorping. */
    intel_emit_post_sync_nonzero_flush(brw);
@@ -1079,32 +1106,13 @@ gen6_blorp_exec(struct brw_context *brw,
    gen6_blorp_emit_cc_state_pointers(brw, params, cc_blend_state_offset,
                                      depthstencil_offset, cc_state_offset);
    params->gen6_emit_wm_constants(brw);
-   if (params->use_wm_prog) {
-      uint32_t wm_surf_offset_renderbuffer;
-      uint32_t wm_surf_offset_texture = 0;
-      intel_miptree_used_for_rendering(params->dst.mt);
-      wm_surf_offset_renderbuffer =
-         gen6_blorp_emit_surface_state(brw, params, &params->dst,
-                                       I915_GEM_DOMAIN_RENDER,
-                                       I915_GEM_DOMAIN_RENDER);
-      if (params->src.mt) {
-         wm_surf_offset_texture =
-            gen6_blorp_emit_surface_state(brw, params, &params->src,
-                                          I915_GEM_DOMAIN_SAMPLER, 0);
-      }
-      wm_bind_bo_offset =
-         gen6_blorp_emit_binding_table(brw,
-                                       wm_surf_offset_renderbuffer,
-                                       wm_surf_offset_texture);
-   }
+   params->gen6_emit_surface_states(brw);
    params->gen6_emit_sampler_state(brw);
    gen6_blorp_emit_vs_disable(brw, params);
    gen6_blorp_emit_gs_disable(brw, params);
    gen6_blorp_emit_clip_disable(brw);
    gen6_blorp_emit_sf_config(brw, params);
    params->gen6_emit_wm_config(brw);
-   if (params->use_wm_prog)
-      gen6_blorp_emit_binding_table_pointers(brw, wm_bind_bo_offset);
    gen6_blorp_emit_viewport_state(brw, params);
 
    if (params->depth.mt)