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authorTopi Pohjolainen <topi.pohjolainen@intel.com>2018-04-19 07:52:55 -0400
committerTopi Pohjolainen <topi.pohjolainen@intel.com>2018-04-19 07:52:55 -0400
commit8bb8721172a61651b5800e423d572e7bd04cdfc9 (patch)
tree6fe7f68b1789590c958fdc85ae48a6a9ceaa0482
parent36041ee03568d5e5edfb1d2130a7a740704178ca (diff)
i965/urb/cnl: Apply gen7+ CS stallicl
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
-rw-r--r--src/mesa/drivers/dri/i965/gen7_urb.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 2e5f8e60ba..9e12657313 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -145,8 +145,15 @@ gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
* in the ring after this instruction.
*
* No such restriction exists for Haswell or Baytrail.
+ *
+ * From the CNL Bspec, Windower -
+ * 3DSTATE_PUSH_CONSTANT_ALLOC_PS/VS/GS/DS/HS:
+ *
+ * This command must be followed by a PIPE_CONTROL with CS Stall bit
+ * set.
*/
- if (devinfo->gen < 8 && !devinfo->is_haswell && !devinfo->is_baytrail)
+ if ((devinfo->gen < 8 && !devinfo->is_haswell && !devinfo->is_baytrail) ||
+ devinfo->gen >= 10)
gen7_emit_cs_stall_flush(brw);
}