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author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2018-04-19 07:43:01 -0400 |
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committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2018-04-19 07:43:01 -0400 |
commit | 36041ee03568d5e5edfb1d2130a7a740704178ca (patch) | |
tree | bc660214de7e229b7ebc3e8dd2a40eea2ac9b19e | |
parent | 78de8668296c3f90cb462c37cb9f9b255209976f (diff) |
Revert "disable blorp clears"
This reverts commit 4d20b65841852d056fcd479d9f2b9c2335dad533.
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index aa882c9352..487de9b899 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -315,14 +315,12 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) mt->stencil_mt->r8stencil_needs_update = true; } -#if 0 if (mask & BUFFER_BITS_COLOR) { brw_blorp_clear_color(brw, fb, mask, partial_clear, ctx->Color.sRGBEnabled); debug_mask("blorp color", mask & BUFFER_BITS_COLOR); mask &= ~BUFFER_BITS_COLOR; } -#endif if (devinfo->gen >= 6 && (mask & BUFFER_BITS_DEPTH_STENCIL)) { brw_blorp_clear_depth_stencil(brw, fb, mask, partial_clear); @@ -330,8 +328,7 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) mask &= ~BUFFER_BITS_DEPTH_STENCIL; } - GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR | - BUFFER_BIT_STENCIL | + GLbitfield tri_mask = mask & (BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH); if (tri_mask) { |