i965: Port gen7+ 3DSTATE_TE to genxml.

Emit 3DSTATE_TE on Gen7+ using brw_batch_emit helper.

Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

4 files changed, 39 insertions, 71 deletions

diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index 0c67170734..012391348b 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -96,7 +96,6 @@ i965_FILES = \
 	gen7_l3_state.c \
 	gen7_misc_state.c \
 	gen7_sol_state.c \
-	gen7_te_state.c \
 	gen7_urb.c \
 	gen7_wm_surface_state.c \
 	gen8_depth_state.c \
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index cf043a027a..322d76766a 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -125,7 +125,6 @@ extern const struct brw_tracked_state gen7_depthbuffer;
 extern const struct brw_tracked_state gen7_tcs_push_constants;
 extern const struct brw_tracked_state gen7_l3_state;
 extern const struct brw_tracked_state gen7_push_constant_space;
-extern const struct brw_tracked_state gen7_te_state;
 extern const struct brw_tracked_state gen7_tes_push_constants;
 extern const struct brw_tracked_state gen7_urb;
 extern const struct brw_tracked_state haswell_cut_index;
diff --git a/src/mesa/drivers/dri/i965/gen7_te_state.c b/src/mesa/drivers/dri/i965/gen7_te_state.c
deleted file mode 100644
index e56fdcf4e8..0000000000
--- a/src/mesa/drivers/dri/i965/gen7_te_state.c
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "intel_batchbuffer.h"
-
-static void
-upload_te_state(struct brw_context *brw)
-{
-   /* BRW_NEW_TESS_PROGRAMS */
-   bool active = brw->tess_eval_program;
-
-   const struct brw_tes_prog_data *tes_prog_data =
-      brw_tes_prog_data(brw->tes.base.prog_data);
-
-   if (active) {
-      BEGIN_BATCH(4);
-      OUT_BATCH(_3DSTATE_TE << 16 | (4 - 2));
-      OUT_BATCH((tes_prog_data->partitioning << GEN7_TE_PARTITIONING_SHIFT) |
-                (tes_prog_data->output_topology << GEN7_TE_OUTPUT_TOPOLOGY_SHIFT) |
-                (tes_prog_data->domain << GEN7_TE_DOMAIN_SHIFT) |
-                GEN7_TE_ENABLE);
-      OUT_BATCH_F(63.0);
-      OUT_BATCH_F(64.0);
-      ADVANCE_BATCH();
-   } else {
-      BEGIN_BATCH(4);
-      OUT_BATCH(_3DSTATE_TE << 16 | (4 - 2));
-      OUT_BATCH(0);
-      OUT_BATCH_F(0);
-      OUT_BATCH_F(0);
-      ADVANCE_BATCH();
-   }
-}
-
-const struct brw_tracked_state gen7_te_state = {
-   .dirty = {
-      .mesa  = 0,
-      .brw   = BRW_NEW_BLORP |
-               BRW_NEW_CONTEXT |
-               BRW_NEW_TES_PROG_DATA |
-               BRW_NEW_TESS_PROGRAMS,
-   },
-   .emit = upload_te_state,
-};
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index f51036d41f..27414eb248 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -2305,6 +2305,43 @@ static const struct brw_tracked_state genX(ds_state) = {
    .emit = genX(upload_ds_state),
 };
 
+/* ---------------------------------------------------------------------- */
+
+static void
+upload_te_state(struct brw_context *brw)
+{
+   /* BRW_NEW_TESS_PROGRAMS */
+   bool active = brw->tess_eval_program;
+
+   /* BRW_NEW_TES_PROG_DATA */
+   const struct brw_tes_prog_data *tes_prog_data =
+      brw_tes_prog_data(brw->tes.base.prog_data);
+
+   if (active) {
+      brw_batch_emit(brw, GENX(3DSTATE_TE), te) {
+         te.Partitioning = tes_prog_data->partitioning;
+         te.OutputTopology = tes_prog_data->output_topology;
+         te.TEDomain = tes_prog_data->domain;
+         te.TEEnable = true;
+         te.MaximumTessellationFactorOdd = 63.0;
+         te.MaximumTessellationFactorNotOdd = 64.0;
+      }
+   } else {
+      brw_batch_emit(brw, GENX(3DSTATE_TE), te);
+   }
+}
+
+static const struct brw_tracked_state genX(te_state) = {
+   .dirty = {
+      .mesa  = 0,
+      .brw   = BRW_NEW_BLORP |
+               BRW_NEW_CONTEXT |
+               BRW_NEW_TES_PROG_DATA |
+               BRW_NEW_TESS_PROGRAMS,
+   },
+   .emit = upload_te_state,
+};
+
 #endif
 
 /* ---------------------------------------------------------------------- */
@@ -2798,7 +2835,7 @@ genX(init_atoms)(struct brw_context *brw)
 
       &genX(vs_state),
       &genX(hs_state),
-      &gen7_te_state,
+      &genX(te_state),
       &genX(ds_state),
       &genX(gs_state),
       &genX(sol_state),
@@ -2885,7 +2922,7 @@ genX(init_atoms)(struct brw_context *brw)
 
       &genX(vs_state),
       &genX(hs_state),
-      &gen7_te_state,
+      &genX(te_state),
       &genX(ds_state),
       &genX(gs_state),
       &genX(sol_state),