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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2021-02-26 09:18:07 +0000
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>2021-02-26 18:05:36 +0100
commit597f89f20acc7f4981c80fa819f3ff5a1240dc32 (patch)
tree2ca56d3e86a67f2404eed08d30e801d7f01cf763 /include
parent23b87b56b6f3454a8c746f04b5b13a48e5003ebe (diff)
include/drm-uapi: bump AMDGPU headers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9303>
Diffstat (limited to 'include')
-rw-r--r--include/drm-uapi/amdgpu_drm.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/include/drm-uapi/amdgpu_drm.h b/include/drm-uapi/amdgpu_drm.h
index c5ff2b275fc..7fb9c09ee93 100644
--- a/include/drm-uapi/amdgpu_drm.h
+++ b/include/drm-uapi/amdgpu_drm.h
@@ -667,7 +667,7 @@ struct drm_amdgpu_cs_chunk_data {
};
};
-/**
+/*
* Query h/w info: Flag that this is integrated (a.h.a. fusion) GPU
*
*/
@@ -724,6 +724,8 @@ struct drm_amdgpu_cs_chunk_data {
#define AMDGPU_INFO_FW_TA 0x13
/* Subquery id: Query DMCUB firmware version */
#define AMDGPU_INFO_FW_DMCUB 0x14
+ /* Subquery id: Query TOC firmware version */
+ #define AMDGPU_INFO_FW_TOC 0x15
/* number of bytes moved for TTM migration */
#define AMDGPU_INFO_NUM_BYTES_MOVED 0x0f
@@ -946,6 +948,7 @@ struct drm_amdgpu_info_firmware {
#define AMDGPU_VRAM_TYPE_DDR3 7
#define AMDGPU_VRAM_TYPE_DDR4 8
#define AMDGPU_VRAM_TYPE_GDDR6 9
+#define AMDGPU_VRAM_TYPE_DDR5 10
struct drm_amdgpu_info_device {
/** PCI Device ID */
@@ -1083,6 +1086,7 @@ struct drm_amdgpu_info_vce_clock_table {
#define AMDGPU_FAMILY_AI 141 /* Vega10 */
#define AMDGPU_FAMILY_RV 142 /* Raven */
#define AMDGPU_FAMILY_NV 143 /* Navi10 */
+#define AMDGPU_FAMILY_VGH 144 /* Van Gogh */
#if defined(__cplusplus)
}