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2009-12-11fix broken aliasing checks for MAP_FIXED on sparc32, mips, arm and shAl Viro1-1/+2
We want addr - (pgoff << PAGE_SHIFT) consistently coloured... Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Hugh Dickins <hugh.dickins@tiscali.co.uk> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2009-08-15sh: rework nommu for generic cache.c use.Paul Mundt1-1/+1
This does a bit of reorganizing for allowing nommu to use the new and generic cache.c, no functional changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-05-07sh: Handle shm_align_mask also for HAVE_ARCH_UNMAPPED_AREA_TOPDOWN.Paul Mundt1-4/+132
Presently shm_align_mask is only looked at for the bottom up case, but we still want this for proper colouring constraints in the topdown case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-12-22sh: Move arch_get_unmapped_area() in to arch/sh/mm/mmap.c.Paul Mundt1-0/+94
Now that arch/sh/mm/mmap.c exists, move arch_get_unmapped_area() there. Follows the ARM change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-11-13sh: Don't factor in PAGE_OFFSET for valid_phys_addr_range() check.Paul Mundt1-1/+1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-11-12sh: Provide a sane valid_phys_addr_range() to prevent TLB reset with PMB.Paul Mundt1-0/+31
With the PMB enabled, only P1SEG and up are covered by the PMB mappings, meaning that situations where out-of-bounds physical addresses are read from will lead to TLB reset after the PMB miss, allowing for use cases like dd if=/dev/mem to reset the TLB. Fix this up to make sure the reference is between __MEMORY_START (phys) and __pa(high_memory). This is coherent across all variants of sh/sh64 with and without MMU, though the PMB bug itself is only applicable to SH-4A parts. Reported-by: Hideo Saito <saito@densan.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>