diff options
Diffstat (limited to 'include/linux/platform_data')
-rw-r--r-- | include/linux/platform_data/asoc-ti-mcbsp.h | 62 | ||||
-rw-r--r-- | include/linux/platform_data/dsp-omap.h | 34 | ||||
-rw-r--r-- | include/linux/platform_data/gpio-omap.h | 217 | ||||
-rw-r--r-- | include/linux/platform_data/keypad-omap.h | 52 | ||||
-rw-r--r-- | include/linux/platform_data/lcd-mipid.h | 29 | ||||
-rw-r--r-- | include/linux/platform_data/mtd-nand-omap2.h | 43 | ||||
-rw-r--r-- | include/linux/platform_data/mtd-onenand-omap2.h | 53 | ||||
-rw-r--r-- | include/linux/platform_data/omap1_bl.h | 11 | ||||
-rw-r--r-- | include/linux/platform_data/pinctrl-coh901.h | 26 | ||||
-rw-r--r-- | include/linux/platform_data/remoteproc-omap.h | 57 | ||||
-rw-r--r-- | include/linux/platform_data/spi-omap2-mcspi.h | 23 | ||||
-rw-r--r-- | include/linux/platform_data/voltage-omap.h | 39 |
12 files changed, 646 insertions, 0 deletions
diff --git a/include/linux/platform_data/asoc-ti-mcbsp.h b/include/linux/platform_data/asoc-ti-mcbsp.h new file mode 100644 index 000000000000..18814127809a --- /dev/null +++ b/include/linux/platform_data/asoc-ti-mcbsp.h @@ -0,0 +1,62 @@ +/* + * arch/arm/plat-omap/include/mach/mcbsp.h + * + * Defines for Multi-Channel Buffered Serial Port + * + * Copyright (C) 2002 RidgeRun, Inc. + * Author: Steve Johnson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ +#ifndef __ASM_ARCH_OMAP_MCBSP_H +#define __ASM_ARCH_OMAP_MCBSP_H + +#include <linux/spinlock.h> +#include <linux/clk.h> + +#define MCBSP_CONFIG_TYPE2 0x2 +#define MCBSP_CONFIG_TYPE3 0x3 +#define MCBSP_CONFIG_TYPE4 0x4 + +/* Platform specific configuration */ +struct omap_mcbsp_ops { + void (*request)(unsigned int); + void (*free)(unsigned int); +}; + +struct omap_mcbsp_platform_data { + struct omap_mcbsp_ops *ops; + u16 buffer_size; + u8 reg_size; + u8 reg_step; + + /* McBSP platform and instance specific features */ + bool has_wakeup; /* Wakeup capability */ + bool has_ccr; /* Transceiver has configuration control registers */ + int (*enable_st_clock)(unsigned int, bool); + int (*set_clk_src)(struct device *dev, struct clk *clk, const char *src); + int (*mux_signal)(struct device *dev, const char *signal, const char *src); +}; + +/** + * omap_mcbsp_dev_attr - OMAP McBSP device attributes for omap_hwmod + * @sidetone: name of the sidetone device + */ +struct omap_mcbsp_dev_attr { + const char *sidetone; +}; + +#endif diff --git a/include/linux/platform_data/dsp-omap.h b/include/linux/platform_data/dsp-omap.h new file mode 100644 index 000000000000..5927709b1908 --- /dev/null +++ b/include/linux/platform_data/dsp-omap.h @@ -0,0 +1,34 @@ +#ifndef __OMAP_DSP_H__ +#define __OMAP_DSP_H__ + +#include <linux/types.h> + +struct omap_dsp_platform_data { + void (*dsp_set_min_opp) (u8 opp_id); + u8 (*dsp_get_opp) (void); + void (*cpu_set_freq) (unsigned long f); + unsigned long (*cpu_get_freq) (void); + unsigned long mpu_speed[6]; + + /* functions to write and read PRCM registers */ + void (*dsp_prm_write)(u32, s16 , u16); + u32 (*dsp_prm_read)(s16 , u16); + u32 (*dsp_prm_rmw_bits)(u32, u32, s16, s16); + void (*dsp_cm_write)(u32, s16 , u16); + u32 (*dsp_cm_read)(s16 , u16); + u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); + + void (*set_bootaddr)(u32); + void (*set_bootmode)(u8); + + phys_addr_t phys_mempool_base; + phys_addr_t phys_mempool_size; +}; + +#if defined(CONFIG_TIDSPBRIDGE) || defined(CONFIG_TIDSPBRIDGE_MODULE) +extern void omap_dsp_reserve_sdram_memblock(void); +#else +static inline void omap_dsp_reserve_sdram_memblock(void) { } +#endif + +#endif diff --git a/include/linux/platform_data/gpio-omap.h b/include/linux/platform_data/gpio-omap.h new file mode 100644 index 000000000000..e8741c2678d5 --- /dev/null +++ b/include/linux/platform_data/gpio-omap.h @@ -0,0 +1,217 @@ +/* + * OMAP GPIO handling defines and functions + * + * Copyright (C) 2003-2005 Nokia Corporation + * + * Written by Juha Yrjölä <juha.yrjola@nokia.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __ASM_ARCH_OMAP_GPIO_H +#define __ASM_ARCH_OMAP_GPIO_H + +#include <linux/io.h> +#include <linux/platform_device.h> +#include <mach/irqs.h> + +#define OMAP1_MPUIO_BASE 0xfffb5000 + +/* + * These are the omap15xx/16xx offsets. The omap7xx offset are + * OMAP_MPUIO_ / 2 offsets below. + */ +#define OMAP_MPUIO_INPUT_LATCH 0x00 +#define OMAP_MPUIO_OUTPUT 0x04 +#define OMAP_MPUIO_IO_CNTL 0x08 +#define OMAP_MPUIO_KBR_LATCH 0x10 +#define OMAP_MPUIO_KBC 0x14 +#define OMAP_MPUIO_GPIO_EVENT_MODE 0x18 +#define OMAP_MPUIO_GPIO_INT_EDGE 0x1c +#define OMAP_MPUIO_KBD_INT 0x20 +#define OMAP_MPUIO_GPIO_INT 0x24 +#define OMAP_MPUIO_KBD_MASKIT 0x28 +#define OMAP_MPUIO_GPIO_MASKIT 0x2c +#define OMAP_MPUIO_GPIO_DEBOUNCING 0x30 +#define OMAP_MPUIO_LATCH 0x34 + +#define OMAP34XX_NR_GPIOS 6 + +/* + * OMAP1510 GPIO registers + */ +#define OMAP1510_GPIO_DATA_INPUT 0x00 +#define OMAP1510_GPIO_DATA_OUTPUT 0x04 +#define OMAP1510_GPIO_DIR_CONTROL 0x08 +#define OMAP1510_GPIO_INT_CONTROL 0x0c +#define OMAP1510_GPIO_INT_MASK 0x10 +#define OMAP1510_GPIO_INT_STATUS 0x14 +#define OMAP1510_GPIO_PIN_CONTROL 0x18 + +#define OMAP1510_IH_GPIO_BASE 64 + +/* + * OMAP1610 specific GPIO registers + */ +#define OMAP1610_GPIO_REVISION 0x0000 +#define OMAP1610_GPIO_SYSCONFIG 0x0010 +#define OMAP1610_GPIO_SYSSTATUS 0x0014 +#define OMAP1610_GPIO_IRQSTATUS1 0x0018 +#define OMAP1610_GPIO_IRQENABLE1 0x001c +#define OMAP1610_GPIO_WAKEUPENABLE 0x0028 +#define OMAP1610_GPIO_DATAIN 0x002c +#define OMAP1610_GPIO_DATAOUT 0x0030 +#define OMAP1610_GPIO_DIRECTION 0x0034 +#define OMAP1610_GPIO_EDGE_CTRL1 0x0038 +#define OMAP1610_GPIO_EDGE_CTRL2 0x003c +#define OMAP1610_GPIO_CLEAR_IRQENABLE1 0x009c +#define OMAP1610_GPIO_CLEAR_WAKEUPENA 0x00a8 +#define OMAP1610_GPIO_CLEAR_DATAOUT 0x00b0 +#define OMAP1610_GPIO_SET_IRQENABLE1 0x00dc +#define OMAP1610_GPIO_SET_WAKEUPENA 0x00e8 +#define OMAP1610_GPIO_SET_DATAOUT 0x00f0 + +/* + * OMAP7XX specific GPIO registers + */ +#define OMAP7XX_GPIO_DATA_INPUT 0x00 +#define OMAP7XX_GPIO_DATA_OUTPUT 0x04 +#define OMAP7XX_GPIO_DIR_CONTROL 0x08 +#define OMAP7XX_GPIO_INT_CONTROL 0x0c +#define OMAP7XX_GPIO_INT_MASK 0x10 +#define OMAP7XX_GPIO_INT_STATUS 0x14 + +/* + * omap2+ specific GPIO registers + */ +#define OMAP24XX_GPIO_REVISION 0x0000 +#define OMAP24XX_GPIO_IRQSTATUS1 0x0018 +#define OMAP24XX_GPIO_IRQSTATUS2 0x0028 +#define OMAP24XX_GPIO_IRQENABLE2 0x002c +#define OMAP24XX_GPIO_IRQENABLE1 0x001c +#define OMAP24XX_GPIO_WAKE_EN 0x0020 +#define OMAP24XX_GPIO_CTRL 0x0030 +#define OMAP24XX_GPIO_OE 0x0034 +#define OMAP24XX_GPIO_DATAIN 0x0038 +#define OMAP24XX_GPIO_DATAOUT 0x003c +#define OMAP24XX_GPIO_LEVELDETECT0 0x0040 +#define OMAP24XX_GPIO_LEVELDETECT1 0x0044 +#define OMAP24XX_GPIO_RISINGDETECT 0x0048 +#define OMAP24XX_GPIO_FALLINGDETECT 0x004c +#define OMAP24XX_GPIO_DEBOUNCE_EN 0x0050 +#define OMAP24XX_GPIO_DEBOUNCE_VAL 0x0054 +#define OMAP24XX_GPIO_CLEARIRQENABLE1 0x0060 +#define OMAP24XX_GPIO_SETIRQENABLE1 0x0064 +#define OMAP24XX_GPIO_CLEARWKUENA 0x0080 +#define OMAP24XX_GPIO_SETWKUENA 0x0084 +#define OMAP24XX_GPIO_CLEARDATAOUT 0x0090 +#define OMAP24XX_GPIO_SETDATAOUT 0x0094 + +#define OMAP4_GPIO_REVISION 0x0000 +#define OMAP4_GPIO_EOI 0x0020 +#define OMAP4_GPIO_IRQSTATUSRAW0 0x0024 +#define OMAP4_GPIO_IRQSTATUSRAW1 0x0028 +#define OMAP4_GPIO_IRQSTATUS0 0x002c +#define OMAP4_GPIO_IRQSTATUS1 0x0030 +#define OMAP4_GPIO_IRQSTATUSSET0 0x0034 +#define OMAP4_GPIO_IRQSTATUSSET1 0x0038 +#define OMAP4_GPIO_IRQSTATUSCLR0 0x003c +#define OMAP4_GPIO_IRQSTATUSCLR1 0x0040 +#define OMAP4_GPIO_IRQWAKEN0 0x0044 +#define OMAP4_GPIO_IRQWAKEN1 0x0048 +#define OMAP4_GPIO_IRQENABLE1 0x011c +#define OMAP4_GPIO_WAKE_EN 0x0120 +#define OMAP4_GPIO_IRQSTATUS2 0x0128 +#define OMAP4_GPIO_IRQENABLE2 0x012c +#define OMAP4_GPIO_CTRL 0x0130 +#define OMAP4_GPIO_OE 0x0134 +#define OMAP4_GPIO_DATAIN 0x0138 +#define OMAP4_GPIO_DATAOUT 0x013c +#define OMAP4_GPIO_LEVELDETECT0 0x0140 +#define OMAP4_GPIO_LEVELDETECT1 0x0144 +#define OMAP4_GPIO_RISINGDETECT 0x0148 +#define OMAP4_GPIO_FALLINGDETECT 0x014c +#define OMAP4_GPIO_DEBOUNCENABLE 0x0150 +#define OMAP4_GPIO_DEBOUNCINGTIME 0x0154 +#define OMAP4_GPIO_CLEARIRQENABLE1 0x0160 +#define OMAP4_GPIO_SETIRQENABLE1 0x0164 +#define OMAP4_GPIO_CLEARWKUENA 0x0180 +#define OMAP4_GPIO_SETWKUENA 0x0184 +#define OMAP4_GPIO_CLEARDATAOUT 0x0190 +#define OMAP4_GPIO_SETDATAOUT 0x0194 + +#define OMAP_MAX_GPIO_LINES 192 + +#define OMAP_MPUIO(nr) (OMAP_MAX_GPIO_LINES + (nr)) +#define OMAP_GPIO_IS_MPUIO(nr) ((nr) >= OMAP_MAX_GPIO_LINES) + +struct omap_gpio_dev_attr { + int bank_width; /* GPIO bank width */ + bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ +}; + +struct omap_gpio_reg_offs { + u16 revision; + u16 direction; + u16 datain; + u16 dataout; + u16 set_dataout; + u16 clr_dataout; + u16 irqstatus; + u16 irqstatus2; + u16 irqstatus_raw0; + u16 irqstatus_raw1; + u16 irqenable; + u16 irqenable2; + u16 set_irqenable; + u16 clr_irqenable; + u16 debounce; + u16 debounce_en; + u16 ctrl; + u16 wkup_en; + u16 leveldetect0; + u16 leveldetect1; + u16 risingdetect; + u16 fallingdetect; + u16 irqctrl; + u16 edgectrl1; + u16 edgectrl2; + u16 pinctrl; + + bool irqenable_inv; +}; + +struct omap_gpio_platform_data { + int bank_type; + int bank_width; /* GPIO bank width */ + int bank_stride; /* Only needed for omap1 MPUIO */ + bool dbck_flag; /* dbck required or not - True for OMAP3&4 */ + bool loses_context; /* whether the bank would ever lose context */ + bool is_mpuio; /* whether the bank is of type MPUIO */ + u32 non_wakeup_gpios; + + struct omap_gpio_reg_offs *regs; + + /* Return context loss count due to PM states changing */ + int (*get_context_loss_count)(struct device *dev); +}; + +extern void omap2_gpio_prepare_for_idle(int off_mode); +extern void omap2_gpio_resume_after_idle(void); +extern void omap_set_gpio_debounce(int gpio, int enable); +extern void omap_set_gpio_debounce_time(int gpio, int enable); + +#endif diff --git a/include/linux/platform_data/keypad-omap.h b/include/linux/platform_data/keypad-omap.h new file mode 100644 index 000000000000..a6b21eddb212 --- /dev/null +++ b/include/linux/platform_data/keypad-omap.h @@ -0,0 +1,52 @@ +/* + * arch/arm/plat-omap/include/mach/keypad.h + * + * Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef ASMARM_ARCH_KEYPAD_H +#define ASMARM_ARCH_KEYPAD_H + +#ifndef CONFIG_ARCH_OMAP1 +#warning Please update the board to use matrix-keypad driver +#define omap_readw(reg) 0 +#define omap_writew(val, reg) do {} while (0) +#endif +#include <linux/input/matrix_keypad.h> + +struct omap_kp_platform_data { + int rows; + int cols; + const struct matrix_keymap_data *keymap_data; + bool rep; + unsigned long delay; + bool dbounce; + /* specific to OMAP242x*/ + unsigned int *row_gpios; + unsigned int *col_gpios; +}; + +/* Group (0..3) -- when multiple keys are pressed, only the + * keys pressed in the same group are considered as pressed. This is + * in order to workaround certain crappy HW designs that produce ghost + * keypresses. Two free bits, not used by neither row/col nor keynum, + * must be available for use as group bits. The below GROUP_SHIFT + * macro definition is based on some prior knowledge of the + * matrix_keypad defined KEY() macro internals. + */ +#define GROUP_SHIFT 14 +#define GROUP_0 (0 << GROUP_SHIFT) +#define GROUP_1 (1 << GROUP_SHIFT) +#define GROUP_2 (2 << GROUP_SHIFT) +#define GROUP_3 (3 << GROUP_SHIFT) +#define GROUP_MASK GROUP_3 +#if KEY_MAX & GROUP_MASK +#error Group bits in conflict with keynum bits +#endif + + +#endif + diff --git a/include/linux/platform_data/lcd-mipid.h b/include/linux/platform_data/lcd-mipid.h new file mode 100644 index 000000000000..8e52c6572281 --- /dev/null +++ b/include/linux/platform_data/lcd-mipid.h @@ -0,0 +1,29 @@ +#ifndef __LCD_MIPID_H +#define __LCD_MIPID_H + +enum mipid_test_num { + MIPID_TEST_RGB_LINES, +}; + +enum mipid_test_result { + MIPID_TEST_SUCCESS, + MIPID_TEST_INVALID, + MIPID_TEST_FAILED, +}; + +#ifdef __KERNEL__ + +struct mipid_platform_data { + int nreset_gpio; + int data_lines; + + void (*shutdown)(struct mipid_platform_data *pdata); + void (*set_bklight_level)(struct mipid_platform_data *pdata, + int level); + int (*get_bklight_level)(struct mipid_platform_data *pdata); + int (*get_bklight_max)(struct mipid_platform_data *pdata); +}; + +#endif + +#endif diff --git a/include/linux/platform_data/mtd-nand-omap2.h b/include/linux/platform_data/mtd-nand-omap2.h new file mode 100644 index 000000000000..1a68c1e5fe53 --- /dev/null +++ b/include/linux/platform_data/mtd-nand-omap2.h @@ -0,0 +1,43 @@ +/* + * arch/arm/plat-omap/include/mach/nand.h + * + * Copyright (C) 2006 Micron Technology Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <plat/gpmc.h> +#include <linux/mtd/partitions.h> + +enum nand_io { + NAND_OMAP_PREFETCH_POLLED = 0, /* prefetch polled mode, default */ + NAND_OMAP_POLLED, /* polled mode, without prefetch */ + NAND_OMAP_PREFETCH_DMA, /* prefetch enabled sDMA mode */ + NAND_OMAP_PREFETCH_IRQ /* prefetch enabled irq mode */ +}; + +struct omap_nand_platform_data { + int cs; + struct mtd_partition *parts; + struct gpmc_timings *gpmc_t; + int nr_parts; + bool dev_ready; + enum nand_io xfer_type; + int devsize; + enum omap_ecc ecc_opt; + struct gpmc_nand_regs reg; +}; + +/* minimum size for IO mapping */ +#define NAND_IO_SIZE 4 + +#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) +extern int gpmc_nand_init(struct omap_nand_platform_data *d); +#else +static inline int gpmc_nand_init(struct omap_nand_platform_data *d) +{ + return 0; +} +#endif diff --git a/include/linux/platform_data/mtd-onenand-omap2.h b/include/linux/platform_data/mtd-onenand-omap2.h new file mode 100644 index 000000000000..2858667d2e4f --- /dev/null +++ b/include/linux/platform_data/mtd-onenand-omap2.h @@ -0,0 +1,53 @@ +/* + * arch/arm/plat-omap/include/mach/onenand.h + * + * Copyright (C) 2006 Nokia Corporation + * Author: Juha Yrjola + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/mtd/mtd.h> +#include <linux/mtd/partitions.h> + +#define ONENAND_SYNC_READ (1 << 0) +#define ONENAND_SYNC_READWRITE (1 << 1) + +struct onenand_freq_info { + u16 maf_id; + u16 dev_id; + u16 ver_id; +}; + +struct omap_onenand_platform_data { + int cs; + int gpio_irq; + struct mtd_partition *parts; + int nr_parts; + int (*onenand_setup)(void __iomem *, int *freq_ptr); + int (*get_freq)(const struct onenand_freq_info *freq_info, + bool *clk_dep); + int dma_channel; + u8 flags; + u8 regulator_can_sleep; + u8 skip_initial_unlocking; +}; + +#define ONENAND_MAX_PARTITIONS 8 + +#if defined(CONFIG_MTD_ONENAND_OMAP2) || \ + defined(CONFIG_MTD_ONENAND_OMAP2_MODULE) + +extern void gpmc_onenand_init(struct omap_onenand_platform_data *d); + +#else + +#define board_onenand_data NULL + +static inline void gpmc_onenand_init(struct omap_onenand_platform_data *d) +{ +} + +#endif diff --git a/include/linux/platform_data/omap1_bl.h b/include/linux/platform_data/omap1_bl.h new file mode 100644 index 000000000000..881a8e92d605 --- /dev/null +++ b/include/linux/platform_data/omap1_bl.h @@ -0,0 +1,11 @@ +#ifndef __OMAP1_BL_H__ +#define __OMAP1_BL_H__ + +#include <linux/device.h> + +struct omap_backlight_config { + int default_intensity; + int (*set_power)(struct device *dev, int state); +}; + +#endif diff --git a/include/linux/platform_data/pinctrl-coh901.h b/include/linux/platform_data/pinctrl-coh901.h new file mode 100644 index 000000000000..30dea251b835 --- /dev/null +++ b/include/linux/platform_data/pinctrl-coh901.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2007-2012 ST-Ericsson AB + * License terms: GNU General Public License (GPL) version 2 + * GPIO block resgister definitions and inline macros for + * U300 GPIO COH 901 335 or COH 901 571/3 + * Author: Linus Walleij <linus.walleij@stericsson.com> + */ + +#ifndef __MACH_U300_GPIO_U300_H +#define __MACH_U300_GPIO_U300_H + +/** + * struct u300_gpio_platform - U300 GPIO platform data + * @ports: number of GPIO block ports + * @gpio_base: first GPIO number for this block (use a free range) + * @gpio_irq_base: first GPIO IRQ number for this block (use a free range) + * @pinctrl_device: pin control device to spawn as child + */ +struct u300_gpio_platform { + u8 ports; + int gpio_base; + int gpio_irq_base; + struct platform_device *pinctrl_device; +}; + +#endif /* __MACH_U300_GPIO_U300_H */ diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h new file mode 100644 index 000000000000..b10eac89e2e9 --- /dev/null +++ b/include/linux/platform_data/remoteproc-omap.h @@ -0,0 +1,57 @@ +/* + * Remote Processor - omap-specific bits + * + * Copyright (C) 2011 Texas Instruments, Inc. + * Copyright (C) 2011 Google, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _PLAT_REMOTEPROC_H +#define _PLAT_REMOTEPROC_H + +struct rproc_ops; +struct platform_device; + +/* + * struct omap_rproc_pdata - omap remoteproc's platform data + * @name: the remoteproc's name + * @oh_name: omap hwmod device + * @oh_name_opt: optional, secondary omap hwmod device + * @firmware: name of firmware file to load + * @mbox_name: name of omap mailbox device to use with this rproc + * @ops: start/stop rproc handlers + * @device_enable: omap-specific handler for enabling a device + * @device_shutdown: omap-specific handler for shutting down a device + */ +struct omap_rproc_pdata { + const char *name; + const char *oh_name; + const char *oh_name_opt; + const char *firmware; + const char *mbox_name; + const struct rproc_ops *ops; + int (*device_enable) (struct platform_device *pdev); + int (*device_shutdown) (struct platform_device *pdev); +}; + +#if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) + +void __init omap_rproc_reserve_cma(void); + +#else + +void __init omap_rproc_reserve_cma(void) +{ +} + +#endif + +#endif /* _PLAT_REMOTEPROC_H */ diff --git a/include/linux/platform_data/spi-omap2-mcspi.h b/include/linux/platform_data/spi-omap2-mcspi.h new file mode 100644 index 000000000000..a357eb26bd25 --- /dev/null +++ b/include/linux/platform_data/spi-omap2-mcspi.h @@ -0,0 +1,23 @@ +#ifndef _OMAP2_MCSPI_H +#define _OMAP2_MCSPI_H + +#define OMAP2_MCSPI_REV 0 +#define OMAP3_MCSPI_REV 1 +#define OMAP4_MCSPI_REV 2 + +#define OMAP4_MCSPI_REG_OFFSET 0x100 + +struct omap2_mcspi_platform_config { + unsigned short num_cs; + unsigned int regs_offset; +}; + +struct omap2_mcspi_dev_attr { + unsigned short num_chipselect; +}; + +struct omap2_mcspi_device_config { + unsigned turbo_mode:1; +}; + +#endif diff --git a/include/linux/platform_data/voltage-omap.h b/include/linux/platform_data/voltage-omap.h new file mode 100644 index 000000000000..5be4d5def427 --- /dev/null +++ b/include/linux/platform_data/voltage-omap.h @@ -0,0 +1,39 @@ +/* + * OMAP Voltage Management Routines + * + * Copyright (C) 2011, Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ARCH_ARM_OMAP_VOLTAGE_H +#define __ARCH_ARM_OMAP_VOLTAGE_H + +/** + * struct omap_volt_data - Omap voltage specific data. + * @voltage_nominal: The possible voltage value in uV + * @sr_efuse_offs: The offset of the efuse register(from system + * control module base address) from where to read + * the n-target value for the smartreflex module. + * @sr_errminlimit: Error min limit value for smartreflex. This value + * differs at differnet opp and thus is linked + * with voltage. + * @vp_errorgain: Error gain value for the voltage processor. This + * field also differs according to the voltage/opp. + */ +struct omap_volt_data { + u32 volt_nominal; + u32 sr_efuse_offs; + u8 sr_errminlimit; + u8 vp_errgain; +}; +struct voltagedomain; + +struct voltagedomain *voltdm_lookup(const char *name); +int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); +struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, + unsigned long volt); +#endif |