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authorChristoph Lameter <clameter@sgi.com>2007-12-18 16:22:46 -0800
committerTony Luck <tony.luck@intel.com>2007-12-18 16:22:46 -0800
commita3ebdb6c423dff420168a3faf25c76e9e5f59258 (patch)
tree397317fda83da7f745d802d5ba87735f163bf1c9 /include/asm-ia64/gcc_intrin.h
parentc63a1190368771b8207d86c4217ae4afdf1cbd5e (diff)
IA64: Slim down __clear_bit_unlock
__clear_bit_unlock does not need to perform atomic operations on the variable. Avoid a cmpxchg and simply do a store with release semantics. Add a barrier to be safe that the compiler does not do funky things. Tony: Use intrinsic rather than inline assembler Signed-off-by: Christoph Lameter <clameter@sgi.com> Acked-by: Nick Piggin <nickpiggin@yahoo.com.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'include/asm-ia64/gcc_intrin.h')
-rw-r--r--include/asm-ia64/gcc_intrin.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/asm-ia64/gcc_intrin.h b/include/asm-ia64/gcc_intrin.h
index 4fb4e439b05c..e58d3298fa10 100644
--- a/include/asm-ia64/gcc_intrin.h
+++ b/include/asm-ia64/gcc_intrin.h
@@ -191,6 +191,11 @@ register unsigned long ia64_r13 asm ("r13") __attribute_used__;
asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
})
+#define ia64_st4_rel_nta(m, val) \
+({ \
+ asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
+})
+
#define ia64_stfs(x, regnum) \
({ \
register double __f__ asm ("f"#regnum); \