diff options
author | Nabendu Maiti <nabendu.bikash.maiti@intel.com> | 2017-02-24 14:05:33 +0200 |
---|---|---|
committer | Tapani Pälli <tapani.palli@intel.com> | 2017-03-28 09:38:40 +0300 |
commit | f92c1bf608cd6d21340ee04d55f17eaad3d133c3 (patch) | |
tree | fb0ad67ad08f68ac1db5234c96d74d2d1be392ca | |
parent | 68ed0b8dcf272bc2f37460cd09a2b2ccb890307c (diff) |
drm/i915: Pipescaler destination size limit check on Gen9pipe_scaler_rebase_20170328
Pipe scaler on gen9 destination size may go out of adjusted modeset
size.This patch add limit check on user custom crtc destination size and
clamp it within modeset size.
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index de0d7b641d56..c02055164583 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -10942,6 +10942,17 @@ intel_gen9_pipe_scale(struct intel_crtc *intel_crtc, pipe_config->pipe_src_w)) goto done; + /* Out of boundary, clamping it */ + if ((pipe_config->pipe_dst_x + pipe_config->pipe_dst_w) > + adjusted_mode->hdisplay) + pipe_config->pipe_dst_w = + (adjusted_mode->hdisplay - pipe_config->pipe_dst_x); + + if ((pipe_config->pipe_dst_y + pipe_config->pipe_dst_h) > + adjusted_mode->vdisplay) + pipe_config->pipe_dst_h = + (adjusted_mode->vdisplay - pipe_config->pipe_dst_y); + x = pipe_config->pipe_dst_x; y = pipe_config->pipe_dst_y; width = pipe_config->pipe_dst_w; |