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authorJames Cloos <cloos@jhcloos.com>2007-09-03 06:08:13 -0400
committerJames Cloos <cloos@jhcloos.com>2007-09-03 06:08:13 -0400
commit53a2088c5590bb96ce9a7ad30d908c7ea1d54027 (patch)
treeba63050c81a1a8c9e4904976646019a2d24cdb4b
parent7da1a03d4b8b40483001b1f6e56dae655a1797f4 (diff)
parent0287432c65231460fadff7d8d7b332208e345a31 (diff)
Merge branch 'master' of ssh://git.freedesktop.org/git/xorg/driver/xf86-video-savage
-rw-r--r--configure.ac12
-rw-r--r--src/savage_dga.c2
-rw-r--r--src/savage_dri.c14
-rw-r--r--src/savage_driver.c406
-rw-r--r--src/savage_driver.h28
-rw-r--r--src/savage_hwmc.c2
6 files changed, 352 insertions, 112 deletions
diff --git a/configure.ac b/configure.ac
index 42d447a..d596b7a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -95,6 +95,18 @@ if test "$DRI" = yes; then
AC_DEFINE(XF86DRI_DEVEL,1,[Enable developmental DRI driver support])
fi
+save_CFLAGS="$CFLAGS"
+CFLAGS="$XORG_CFLAGS"
+AC_CHECK_DECL(XSERVER_LIBPCIACCESS,
+ [XSERVER_LIBPCIACCESS=yes], [XSERVER_LIBPCIACCESS=no],
+ [#include "xorg-server.h"])
+CFLAGS="$save_CFLAGS"
+
+if test "x$XSERVER_LIBPCIACCESS" = xyes; then
+ PKG_CHECK_MODULES([PCIACCESS], [pciaccess >= 0.10.0])
+fi
+AM_CONDITIONAL(XSERVER_LIBPCIACCESS, test "x$XSERVER_LIBPCIACCESS" = xyes)
+
AC_SUBST([DRI_CFLAGS])
AC_SUBST([XORG_CFLAGS])
AC_SUBST([moduledir])
diff --git a/src/savage_dga.c b/src/savage_dga.c
index 49c9a3c..fd26d78 100644
--- a/src/savage_dga.c
+++ b/src/savage_dga.c
@@ -391,7 +391,7 @@ Savage_OpenFramebuffer(
SavagePtr psav = SAVPTR(pScrn);
*name = NULL; /* no special device */
- *mem = (unsigned char*)psav->FrameBufferBase;
+ *mem = (unsigned char*)psav->FbRegion.base;
*size = psav->videoRambytes;
*offset = 0;
*flags = DGA_NEED_ROOT;
diff --git a/src/savage_dri.c b/src/savage_dri.c
index 6f79d94..211fef0 100644
--- a/src/savage_dri.c
+++ b/src/savage_dri.c
@@ -467,8 +467,8 @@ static Bool SAVAGEDRIAgpInit(ScreenPtr pScreen)
xf86DrvMsg( pScreen->myNum, X_INFO,
"[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n",
mode, vendor, device,
- psav->PciInfo->vendor,
- psav->PciInfo->chipType );
+ VENDOR_ID(psav->PciInfo),
+ DEVICE_ID(psav->PciInfo));
if ( drmAgpEnable( psav->drmFD, mode ) < 0 ) {
xf86DrvMsg( pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n" );
@@ -624,7 +624,7 @@ static Bool SAVAGEDRIMapInit( ScreenPtr pScreen )
pSAVAGEDRIServer->registers.size = SAVAGEIOMAPSIZE;
if ( drmAddMap( psav->drmFD,
- (drm_handle_t)psav->MmioBase,
+ (drm_handle_t)psav->MmioRegion.base,
pSAVAGEDRIServer->registers.size,
DRM_REGISTERS,0,
&pSAVAGEDRIServer->registers.handle ) < 0 ) {
@@ -636,7 +636,7 @@ static Bool SAVAGEDRIMapInit( ScreenPtr pScreen )
pSAVAGEDRIServer->aperture.size = 5 * 0x01000000;
if ( drmAddMap( psav->drmFD,
- (drm_handle_t)(psav->ApertureBase),
+ (drm_handle_t)(psav->ApertureRegion.base),
pSAVAGEDRIServer->aperture.size,
DRM_FRAME_BUFFER,0,
&pSAVAGEDRIServer->aperture.handle ) < 0 ) {
@@ -882,14 +882,18 @@ Bool SAVAGEDRIScreenInit( ScreenPtr pScreen )
sprintf(pDRIInfo->busIdString,
"PCI:%d:%d:%d",
psav->PciInfo->bus,
+#ifdef XSERVER_LIBPCIACCESS
+ psav->PciInfo->dev,
+#else
psav->PciInfo->device,
+#endif
psav->PciInfo->func);
}
pDRIInfo->ddxDriverMajorVersion = SAVAGE_VERSION_MAJOR;
pDRIInfo->ddxDriverMinorVersion = SAVAGE_VERSION_MINOR;
pDRIInfo->ddxDriverPatchVersion = SAVAGE_PATCHLEVEL;
- pDRIInfo->frameBufferPhysicalAddress = (pointer) psav->FrameBufferBase;
+ pDRIInfo->frameBufferPhysicalAddress = (pointer) psav->FbRegion.base;
pDRIInfo->frameBufferSize = psav->videoRambytes;
pDRIInfo->frameBufferStride = pScrn->displayWidth*(pScrn->bitsPerPixel/8);
pDRIInfo->ddxDrawableTableEntry = SAVAGE_MAX_DRAWABLES;
diff --git a/src/savage_driver.c b/src/savage_driver.c
index ab91bc4..a49f6a9 100644
--- a/src/savage_driver.c
+++ b/src/savage_driver.c
@@ -72,7 +72,13 @@ static void SavageDisableMMIO(ScrnInfoPtr pScrn);
static const OptionInfoRec * SavageAvailableOptions(int chipid, int busid);
static void SavageIdentify(int flags);
+#ifdef XSERVER_LIBPCIACCESS
+static Bool SavagePciProbe(DriverPtr drv, int entity_num,
+ struct pci_device *dev, intptr_t match_data);
+#else
static Bool SavageProbe(DriverPtr drv, int flags);
+static int LookupChipID(PciChipsets* pset, int ChipID);
+#endif
static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags);
static Bool SavageEnterVT(int scrnIndex, int flags);
@@ -132,18 +138,38 @@ extern ScrnInfoPtr gpScrn;
int gSavageEntityIndex = -1;
-_X_EXPORT DriverRec SAVAGE =
-{
- SAVAGE_VERSION,
- SAVAGE_DRIVER_NAME,
- SavageIdentify,
- SavageProbe,
- SavageAvailableOptions,
- NULL,
- 0,
- NULL
+#ifdef XSERVER_LIBPCIACCESS
+#define SAVAGE_DEVICE_MATCH(d, i) \
+ { 0x5333, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) }
+
+static const struct pci_id_match savage_device_match[] = {
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE4, S3_SAVAGE4),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE3D, S3_SAVAGE3D),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE3D_MV, S3_SAVAGE3D),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE2000, S3_SAVAGE2000),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_MX_MV, S3_SAVAGE_MX),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_MX, S3_SAVAGE_MX),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_IX_MV, S3_SAVAGE_MX),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SAVAGE_IX, S3_SAVAGE_MX),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_PM, S3_PROSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_KM, S3_PROSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_S3TWISTER_P, S3_TWISTER),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_S3TWISTER_K, S3_TWISTER),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_MX128, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_MX64, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_MX64C, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX128SDR, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX128DDR, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX64SDR, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IX64DDR, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IXCSDR, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_SUPSAV_IXCDDR, S3_SUPERSAVAGE),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_DDR, S3_PROSAVAGEDDR),
+ SAVAGE_DEVICE_MATCH(PCI_CHIP_PROSAVAGE_DDRK, S3_PROSAVAGEDDR),
+
+ { 0, 0, 0 },
};
-
+#endif
/* Supported chipsets */
@@ -186,6 +212,7 @@ static SymTabRec SavageChipsets[] = {
{ -1, NULL }
};
+#ifndef XSERVER_LIBPCIACCESS
/* This table maps a PCI device ID to a chipset family identifier. */
static PciChipsets SavagePciChipsets[] = {
@@ -214,6 +241,7 @@ static PciChipsets SavagePciChipsets[] = {
{ S3_SUPERSAVAGE, PCI_CHIP_SUPSAV_IXCDDR, RES_SHARED_VGA },
{ -1, -1, RES_UNDEFINED }
};
+#endif
typedef enum {
OPTION_PCI_BURST
@@ -285,6 +313,28 @@ static const OptionInfoRec SavageOptions[] =
{ -1, NULL, OPTV_NONE, {0}, FALSE }
};
+_X_EXPORT DriverRec SAVAGE =
+{
+ SAVAGE_VERSION,
+ SAVAGE_DRIVER_NAME,
+ SavageIdentify,
+#ifdef XSERVER_LIBPCIACCESS
+ NULL,
+#else
+ SavageProbe,
+#endif
+ SavageAvailableOptions,
+ NULL,
+ 0,
+ NULL,
+
+#ifdef XSERVER_LIBPCIACCESS
+ savage_device_match,
+ SavagePciProbe
+#endif
+};
+
+
static const char *vgaHWSymbols[] = {
"vgaHWBlankScreen",
@@ -788,6 +838,82 @@ static void SavageIdentify(int flags)
}
+#ifdef XSERVER_LIBPCIACCESS
+static Bool SavagePciProbe(DriverPtr drv, int entity_num,
+ struct pci_device *dev, intptr_t match_data)
+{
+ ScrnInfoPtr pScrn;
+
+
+ if ((match_data < S3_SAVAGE3D) || (match_data > S3_SAVAGE2000)) {
+ return FALSE;
+ }
+
+ pScrn = xf86ConfigPciEntity(NULL, 0, entity_num, NULL,
+ RES_SHARED_VGA, NULL, NULL, NULL, NULL);
+ if (pScrn != NULL) {
+ EntityInfoPtr pEnt;
+ SavagePtr psav;
+
+
+ pScrn->driverVersion = SAVAGE_VERSION;
+ pScrn->driverName = SAVAGE_DRIVER_NAME;
+ pScrn->name = "SAVAGE";
+ pScrn->Probe = NULL;
+ pScrn->PreInit = SavagePreInit;
+ pScrn->ScreenInit = SavageScreenInit;
+ pScrn->SwitchMode = SavageSwitchMode;
+ pScrn->AdjustFrame = SavageAdjustFrame;
+ pScrn->EnterVT = SavageEnterVT;
+ pScrn->LeaveVT = SavageLeaveVT;
+ pScrn->FreeScreen = NULL;
+ pScrn->ValidMode = SavageValidMode;
+
+ if (!SavageGetRec(pScrn))
+ return FALSE;
+
+ psav = SAVPTR(pScrn);
+
+ psav->PciInfo = dev;
+ psav->Chipset = match_data;
+
+ pEnt = xf86GetEntityInfo(entity_num);
+
+ /* MX, IX, SuperSavage cards support Dual-Head, mark the entity as
+ * sharable.
+ */
+ if (pEnt->chipset == S3_SAVAGE_MX || pEnt->chipset == S3_SUPERSAVAGE) {
+ DevUnion *pPriv;
+ SavageEntPtr pSavageEnt;
+
+ xf86SetEntitySharable(entity_num);
+
+ if (gSavageEntityIndex == -1)
+ gSavageEntityIndex = xf86AllocateEntityPrivateIndex();
+
+ pPriv = xf86GetEntityPrivate(pEnt->index, gSavageEntityIndex);
+ if (!pPriv->ptr) {
+ int j;
+ int instance = xf86GetNumEntityInstances(pEnt->index);
+
+ for (j = 0; j < instance; j++)
+ xf86SetEntityInstanceForScreen(pScrn, pEnt->index, j);
+
+ pPriv->ptr = xnfcalloc(sizeof(SavageEntRec), 1);
+ pSavageEnt = pPriv->ptr;
+ pSavageEnt->HasSecondary = FALSE;
+ } else {
+ pSavageEnt = pPriv->ptr;
+ pSavageEnt->HasSecondary = TRUE;
+ }
+ }
+ }
+
+ return (pScrn != NULL);
+}
+
+#else
+
static Bool SavageProbe(DriverPtr drv, int flags)
{
int i;
@@ -826,6 +952,8 @@ static Bool SavageProbe(DriverPtr drv, int flags)
NULL, NULL, NULL, NULL);
if (pScrn != NULL) {
+ SavagePtr psav;
+
pScrn->driverVersion = SAVAGE_VERSION;
pScrn->driverName = SAVAGE_DRIVER_NAME;
pScrn->name = "SAVAGE";
@@ -839,6 +967,23 @@ static Bool SavageProbe(DriverPtr drv, int flags)
pScrn->FreeScreen = NULL;
pScrn->ValidMode = SavageValidMode;
foundScreen = TRUE;
+
+ if (!SavageGetRec(pScrn))
+ return FALSE;
+
+ psav = SAVPTR(pScrn);
+
+ psav->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
+ if (pEnt->device->chipset && *pEnt->device->chipset) {
+ psav->Chipset = xf86StringToToken(SavageChipsets,
+ pEnt->device->chipset);
+ } else if (pEnt->device->chipID >= 0) {
+ psav->Chipset = LookupChipID(SavagePciChipsets,
+ pEnt->device->chipID);
+ } else {
+ psav->Chipset = LookupChipID(SavagePciChipsets,
+ psav->PciInfo->chipType);
+ }
}
pEnt = xf86GetEntityInfo(usedChips[i]);
@@ -892,6 +1037,7 @@ static int LookupChipID( PciChipsets* pset, int ChipID )
return -1;
}
+#endif
static void SavageDoDDC(ScrnInfoPtr pScrn)
{
@@ -1406,7 +1552,6 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
psav->pVbe = VBEInit(NULL, pEnt->index);
}
- psav->PciInfo = xf86GetPciInfoForEntity(pEnt->index);
xf86RegisterResources(pEnt->index, NULL, ResNone);
xf86SetOperatingState(resVgaIo, pEnt->index, ResUnusedOpr);
xf86SetOperatingState(resVgaMem, pEnt->index, ResDisableOpr);
@@ -1415,11 +1560,9 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
if (pEnt->device->chipset && *pEnt->device->chipset) {
pScrn->chipset = pEnt->device->chipset;
psav->ChipId = pEnt->device->chipID;
- psav->Chipset = xf86StringToToken(SavageChipsets, pScrn->chipset);
from = X_CONFIG;
} else if (pEnt->device->chipID >= 0) {
psav->ChipId = pEnt->device->chipID;
- psav->Chipset = LookupChipID(SavagePciChipsets, psav->ChipId);
pScrn->chipset = (char *)xf86TokenToString(SavageChipsets,
psav->Chipset);
from = X_CONFIG;
@@ -1427,8 +1570,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
pEnt->device->chipID);
} else {
from = X_PROBED;
- psav->ChipId = psav->PciInfo->chipType;
- psav->Chipset = LookupChipID(SavagePciChipsets, psav->ChipId);
+ psav->ChipId = DEVICE_ID(psav->PciInfo);
pScrn->chipset = (char *)xf86TokenToString(SavageChipsets,
psav->Chipset);
}
@@ -1441,7 +1583,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "ChipRev override: %d\n",
psav->ChipRev);
} else
- psav->ChipRev = psav->PciInfo->chipRev;
+ psav->ChipRev = CHIP_REVISION(psav->PciInfo);
xf86DrvMsg(pScrn->scrnIndex, from, "Engine: \"%s\"\n", pScrn->chipset);
@@ -1450,13 +1592,22 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
xfree(pEnt);
+#ifndef XSERVER_LIBPCIACCESS
psav->PciTag = pciTag(psav->PciInfo->bus, psav->PciInfo->device,
psav->PciInfo->func);
+#endif
/* Set AGP Mode from config */
/* We support 1X 2X and 4X */
#ifdef XF86DRI
+#ifdef XSERVER_LIBPCIACCESS
+ /* Try to read the AGP capabilty block from the device. If there is
+ * no AGP info, the device is PCI.
+ */
+
+ psav->IsPCI = (pci_device_get_agp_info(psav->PciInfo) == NULL);
+#else
/* AGP/PCI (FK: copied from radeon_driver.c) */
/* Proper autodetection of an AGP capable device requires examining
* PCI config registers to determine if the device implements extended
@@ -1515,6 +1666,7 @@ static Bool SavagePreInit(ScrnInfoPtr pScrn, int flags)
cap_ptr = (cap_id >> 8) & SAVAGE_CAP_PTR_MASK;
}
}
+#endif
xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "%s card detected\n",
(psav->IsPCI) ? "PCI" : "AGP");
@@ -2908,97 +3060,132 @@ static void SavageWriteMode(ScrnInfoPtr pScrn, vgaRegPtr vgaSavePtr,
static Bool SavageMapMem(ScrnInfoPtr pScrn)
{
SavagePtr psav = SAVPTR(pScrn);
- int mode;
- unsigned i;
+ int err;
TRACE(("SavageMapMem()\n"));
if( S3_SAVAGE3D_SERIES(psav->Chipset) ) {
- psav->MmioRegion.bar = 0;
- psav->MmioRegion.offset = SAVAGE_NEWMMIO_REGBASE_S3;
-
- psav->FbRegion.bar = 0;
- psav->FbRegion.offset = 0;
-
- psav->last_bar = 0;
+#ifdef XSERVER_LIBPCIACCESS
+ psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S3
+ + psav->PciInfo->regions[0].base_addr;
+ psav->FbRegion.base = psav->PciInfo->regions[0].base_addr;
+#else
+ psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S3
+ + psav->PciInfo->memBase[0];
+ psav->FbRegion.base = psav->PciInfo->memBase[0];
+#endif
} else {
- psav->MmioRegion.bar = 0;
- psav->MmioRegion.offset = SAVAGE_NEWMMIO_REGBASE_S4;
-
- psav->FbRegion.bar = 1;
- psav->FbRegion.offset = 0;
-
- psav->last_bar = 1;
+#ifdef XSERVER_LIBPCIACCESS
+ psav->MmioRegion.base = SAVAGE_NEWMMIO_REGBASE_S4
+ + psav->PciInfo->regions[0].base_addr;
+ psav->FbRegion.base = psav->PciInfo->regions[1].base_addr;
+#else
+ psav->MmioBase = SAVAGE_NEWMMIO_REGBASE_S4
+ + psav->PciInfo->memBase[0];
+ psav->FrameBufferBase = psav->PciInfo->memBase[1];
+#endif
}
+ psav->MmioRegion.size = SAVAGE_NEWMMIO_REGSIZE;
+ psav->FbRegion.size = psav->videoRambytes;
+
/* On Paramount and Savage 2000, aperture 0 is PCI base 2. On other
* chipsets it's in the same BAR as the framebuffer.
*/
if ((psav->Chipset == S3_SUPERSAVAGE)
- || (psav->Chipset == S3_SAVAGE2000)) {
- psav->ApertureRegion.bar = 2;
- psav->ApertureRegion.offset = 0;
-
- psav->last_bar = 2;
+ || (psav->Chipset == S3_SAVAGE2000)) {
+#ifdef XSERVER_LIBPCIACCESS
+ psav->ApertureRegion.base = psav->PciInfo->regions[2].base_addr;
+#else
+ psav->ApertureRegion.base = psav->PciInfo->memBase[2];
+#endif
} else {
- psav->ApertureRegion.bar = psav->FbRegion.bar;
- psav->ApertureRegion.offset = 0x02000000;
+ psav->ApertureRegion.base = psav->FbRegion.base + 0x02000000;
}
+ psav->ApertureRegion.size = (psav->IsPrimary || psav->IsSecondary)
+ ? (0x01000000 * 2) : (0x01000000 * 5);
- psav->MmioBase = psav->PciInfo->memBase[ psav->MmioRegion.bar ]
- + psav->MmioRegion.offset;
-
- psav->FrameBufferBase = psav->PciInfo->memBase[ psav->FbRegion.bar ]
- + psav->FbRegion.offset;
- psav->ApertureBase = psav->PciInfo->memBase[ psav->FbRegion.bar ]
- + psav->ApertureRegion.offset;
-
-
- /* FIXME: This seems fine even on Savage3D where the same BAR contains the
- * FIXME: MMIO space and the framebuffer. Write-combining gets fixed up
- * FIXME: later. Someone should investigate this, though. And kick S3
- * FIXME: for doing something so silly.
- */
- mode = VIDMEM_MMIO;
- for (i = 0; i <= psav->last_bar; i++) {
- psav->bar_mappings[i] = xf86MapPciMem(pScrn->scrnIndex, mode,
- psav->PciTag,
- psav->PciInfo->memBase[i],
- (1U << psav->PciInfo->size[i]));
- if (!psav->bar_mappings[i]) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Internal error: cound not map PCI region %u, last BAR = %u\n",
- i, psav->last_bar);
- return FALSE;
- }
+ if (psav->FbRegion.size != 0) {
+#ifdef XSERVER_LIBPCIACCESS
+ err = pci_device_map_range(psav->PciInfo, psav->FbRegion.base,
+ psav->FbRegion.size,
+ (PCI_DEV_MAP_FLAG_WRITABLE
+ | PCI_DEV_MAP_FLAG_WRITE_COMBINE),
+ & psav->FbRegion.memory);
+#else
+ psav->FbRegion.memory =
+ xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+ psav->PciTag, psav->FbRegion.base,
+ psav->FbRegion.size);
+ err = (psav->FbRegion.memory == NULL) ? errno : 0;
+#endif
+ if (err) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Internal error: cound not map framebuffer range (%d, %s).\n",
+ err, strerror(err));
+ return FALSE;
+ }
- mode = VIDMEM_FRAMEBUFFER;
+ psav->FBBase = psav->FbRegion.memory;
+ psav->FBStart = (psav->IsSecondary)
+ ? psav->FBBase + 0x1000000 : psav->FBBase;
}
- psav->MapBase = psav->bar_mappings[ psav->MmioRegion.bar ]
- + psav->MmioRegion.offset;
-
- psav->BciMem = psav->MapBase + 0x10000;
-
- SavageEnableMMIO(pScrn);
+ if (psav->ApertureRegion.memory == NULL) {
+#ifdef XSERVER_LIBPCIACCESS
+ err = pci_device_map_range(psav->PciInfo, psav->ApertureRegion.base,
+ psav->ApertureRegion.size,
+ (PCI_DEV_MAP_FLAG_WRITABLE
+ | PCI_DEV_MAP_FLAG_WRITE_COMBINE),
+ & psav->ApertureRegion.memory);
+#else
+ psav->ApertureRegion.memory =
+ xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+ psav->PciTag, psav->ApertureRegion.base,
+ psav->ApertureRegion.size);
+ err = (psav->ApertureRegion.memory == NULL) ? errno : 0;
+#endif
+ if (err) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Internal error: cound not map aperture range (%d, %s).\n",
+ err, strerror(err));
+ return FALSE;
+ }
- psav->FBBase = psav->bar_mappings[ psav->FbRegion.bar ]
- + psav->FbRegion.offset;
+ psav->ApertureMap = (psav->IsSecondary)
+ ? psav->ApertureRegion.memory
+ : psav->ApertureRegion.memory + 0x1000000;
+ }
- psav->FBStart = (psav->IsSecondary)
- ? psav->FBBase + 0x1000000 : psav->FBBase;
+ if (psav->MmioRegion.memory == NULL) {
+#ifdef XSERVER_LIBPCIACCESS
+ err = pci_device_map_range(psav->PciInfo, psav->MmioRegion.base,
+ psav->MmioRegion.size,
+ (PCI_DEV_MAP_FLAG_WRITABLE),
+ & psav->MmioRegion.memory);
+#else
+ psav->MmioRegion.memory =
+ xf86MapPciMem(pScrn->scrnIndex, VIDMEM_FRAMEBUFFER,
+ psav->PciTag, psav->MmioRegion.base,
+ psav->MmioRegion.size);
+ err = (psav->MmioRegion.memory == NULL) ? errno : 0;
+#endif
+ if (err) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Internal error: cound not map MMIO range (%d, %s).\n",
+ err, strerror(err));
+ return FALSE;
+ }
- psav->ApertureMap = psav->bar_mappings[ psav->ApertureRegion.bar ]
- + psav->ApertureRegion.offset;
+ psav->MapBase = psav->MmioRegion.memory;
+ psav->BciMem = psav->MapBase + 0x10000;
- if (psav->IsSecondary) {
- psav->ApertureMap += 0x1000000;
+ SavageEnableMMIO(pScrn);
}
- pScrn->memPhysBase = psav->PciInfo->memBase[0];
-
+ pScrn->memPhysBase = psav->FbRegion.base;
return TRUE;
}
@@ -3006,30 +3193,55 @@ static Bool SavageMapMem(ScrnInfoPtr pScrn)
static void SavageUnmapMem(ScrnInfoPtr pScrn, int All)
{
SavagePtr psav = SAVPTR(pScrn);
- unsigned i;
TRACE(("SavageUnmapMem(%x,%x)\n", psav->MapBase, psav->FBBase));
if (psav->PrimaryVidMapped) {
- vgaHWUnmapMem(pScrn);
- psav->PrimaryVidMapped = FALSE;
+ vgaHWUnmapMem(pScrn);
+ psav->PrimaryVidMapped = FALSE;
}
SavageDisableMMIO(pScrn);
- for (i = (All) ? 0 : 1; i <= psav->last_bar; i++) {
- if (psav->bar_mappings[i]) {
- xf86UnMapVidMem(pScrn->scrnIndex, psav->bar_mappings[i],
- (1U << psav->PciInfo->size[i]));
- psav->bar_mappings[i] = NULL;
- }
+ if (All && (psav->MmioRegion.memory != NULL)) {
+#ifdef XSERVER_LIBPCIACCESS
+ pci_device_unmap_range(psav->PciInfo,
+ psav->MmioRegion.memory,
+ psav->MmioRegion.size);
+#else
+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer)psav->MapBase,
+ SAVAGE_NEWMMIO_REGSIZE);
+#endif
+
+ psav->MmioRegion.memory = NULL;
+ psav->MapBase = 0;
+ psav->BciMem = 0;
}
- if (All) {
- psav->MapBase = 0;
- psav->BciMem = 0;
+ if (psav->FbRegion.memory != NULL) {
+#ifdef XSERVER_LIBPCIACCESS
+ pci_device_unmap_range(psav->PciInfo,
+ psav->FbRegion.memory,
+ psav->FbRegion.size);
+#else
+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer)psav->FbRegion.base,
+ psav->FbRegion.size);
+#endif
}
-
+
+ if (psav->ApertureRegion.memory != NULL) {
+#ifdef XSERVER_LIBPCIACCESS
+ pci_device_unmap_range(psav->PciInfo,
+ psav->ApertureRegion.memory,
+ psav->ApertureRegion.size);
+#else
+ xf86UnMapVidMem(pScrn->scrnIndex, (pointer)psav->ApertureRegion.base,
+ psav->ApertureRegion.size);
+#endif
+ }
+
+ psav->FbRegion.memory = NULL;
+ psav->ApertureRegion.memory = NULL;
psav->FBBase = 0;
psav->FBStart = 0;
psav->ApertureMap = 0;
@@ -3118,7 +3330,7 @@ static void SavageInitShadowStatus(ScrnInfoPtr pScrn)
if( psav->ShadowStatus ) {
psav->ShadowPhysical =
- psav->FrameBufferBase + psav->CursorKByte*1024 + 4096 - 32;
+ psav->FbRegion.base + psav->CursorKByte*1024 + 4096 - 32;
psav->ShadowVirtual = (CARD32 *)
(psav->FBBase + psav->CursorKByte*1024 + 4096 - 32);
diff --git a/src/savage_driver.h b/src/savage_driver.h
index 06b3689..a65b2d8 100644
--- a/src/savage_driver.h
+++ b/src/savage_driver.h
@@ -33,6 +33,19 @@
#include <string.h>
#include <math.h>
+#ifdef XSERVER_LIBPCIACCESS
+#include <pciaccess.h>
+#define VENDOR_ID(p) (p)->vendor_id
+#define DEVICE_ID(p) (p)->device_id
+#define SUBSYS_ID(p) (p)->subdevice_id
+#define CHIP_REVISION(p) (p)->revision
+#else
+#define VENDOR_ID(p) (p)->vendor
+#define DEVICE_ID(p) (p)->chipType
+#define SUBSYS_ID(p) (p)->subsysCard
+#define CHIP_REVISION(p) (p)->chipRev
+#endif
+
#define MODE_24 24
#include "compiler.h"
@@ -267,8 +280,9 @@ typedef struct _StatInfo {
} StatInfoRec,*StatInfoPtr;
struct savage_region {
- unsigned bar;
- unsigned long offset;
+ pciaddr_t base;
+ pciaddr_t size;
+ void * memory;
};
typedef struct _Savage {
@@ -292,18 +306,12 @@ typedef struct _Savage {
int endfb;
/* These are physical addresses. */
- unsigned long FrameBufferBase;
- unsigned long MmioBase;
- unsigned long ApertureBase;
unsigned long ShadowPhysical;
/* These are linear addresses. */
struct savage_region MmioRegion;
struct savage_region FbRegion;
struct savage_region ApertureRegion;
- unsigned last_bar;
-
- unsigned char* bar_mappings[3];
unsigned char* MapBase;
unsigned char* BciMem;
@@ -363,8 +371,12 @@ typedef struct _Savage {
int TVSizeY;
CloseScreenProcPtr CloseScreen;
+#ifdef XSERVER_LIBPCIACCESS
+ struct pci_device * PciInfo;
+#else
pciVideoPtr PciInfo;
PCITAG PciTag;
+#endif
int Chipset;
int ChipId;
int ChipRev;
diff --git a/src/savage_hwmc.c b/src/savage_hwmc.c
index 6a39754..43c9dfd 100644
--- a/src/savage_hwmc.c
+++ b/src/savage_hwmc.c
@@ -202,7 +202,7 @@ Bool SAVAGEInitMC(ScreenPtr pScreen)
return FALSE;
}
- offset = pSAVAGE->hwmcOffset + pSAVAGE->FrameBufferBase;
+ offset = pSAVAGE->hwmcOffset + pSAVAGE->FbRegion.base;
if(drmAddMap(pSAVAGE->drmFD, offset, pSAVAGE->hwmcSize,
DRM_FRAME_BUFFER, 0, &pSAVAGEDriPriv->xvmcSurfHandle) < 0)