From 21690934d93408bb7247943f886b960cf30ecd19 Mon Sep 17 00:00:00 2001 From: Borislav Petkov Date: Sat, 22 Nov 2014 11:22:35 +0100 Subject: EDAC, mce_amd_inj: Enable direct writes to MCE MSRs Normally, writing those causes a #GP but HWCR[McStatusWrEn] controls that. Provide a knob. Signed-off-by: Borislav Petkov --- drivers/edac/mce_amd_inj.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'drivers/edac') diff --git a/drivers/edac/mce_amd_inj.c b/drivers/edac/mce_amd_inj.c index 9b5023d6f553..9b5ca92737a2 100644 --- a/drivers/edac/mce_amd_inj.c +++ b/drivers/edac/mce_amd_inj.c @@ -54,6 +54,30 @@ DEFINE_SIMPLE_ATTRIBUTE(status_fops, inj_status_get, inj_status_set, "%llx\n"); DEFINE_SIMPLE_ATTRIBUTE(misc_fops, inj_misc_get, inj_misc_set, "%llx\n"); DEFINE_SIMPLE_ATTRIBUTE(addr_fops, inj_addr_get, inj_addr_set, "%llx\n"); +/* + * Caller needs to be make sure this cpu doesn't disappear + * from under us, i.e.: get_cpu/put_cpu. + */ +static int toggle_hw_mce_inject(unsigned int cpu, bool enable) +{ + u32 l, h; + int err; + + err = rdmsr_on_cpu(cpu, MSR_K7_HWCR, &l, &h); + if (err) { + pr_err("%s: error reading HWCR\n", __func__); + return err; + } + + enable ? (l |= BIT(18)) : (l &= ~BIT(18)); + + err = wrmsr_on_cpu(cpu, MSR_K7_HWCR, l, h); + if (err) + pr_err("%s: error writing HWCR\n", __func__); + + return err; +} + /* * This denotes into which bank we're injecting and triggers * the injection, at the same time. -- cgit v1.2.3