diff options
author | Thierry Reding <treding@nvidia.com> | 2018-05-24 15:13:25 +0200 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2019-08-23 18:13:50 +0200 |
commit | 0a2db04097d1696b6cf958da87fbc9201061f67b (patch) | |
tree | f43ae06f1e87ff3c1d8373d997ff67c99f1e0026 | |
parent | 91a9a3850a87e0a84a9f826e98e64f27083e5d0a (diff) |
Revert "WIP"
This reverts commit bb4aa281650434ac267157e56e842ad24e126977.
-rw-r--r-- | include/drm-uapi/tegra_drm.h | 468 | ||||
-rw-r--r-- | meson.build | 3 | ||||
-rw-r--r-- | src/gallium/auxiliary/util/u_debug_gallium.c | 82 | ||||
-rw-r--r-- | src/gallium/auxiliary/util/u_debug_gallium.h | 13 | ||||
-rw-r--r-- | src/gallium/include/pipe/p_defines.h | 37 | ||||
-rw-r--r-- | src/gallium/state_trackers/va/context.c | 1 | ||||
-rw-r--r-- | src/gallium/state_trackers/vdpau/device.c | 6 | ||||
-rw-r--r-- | src/gallium/state_trackers/vdpau/surface.c | 4 |
8 files changed, 122 insertions, 492 deletions
diff --git a/include/drm-uapi/tegra_drm.h b/include/drm-uapi/tegra_drm.h index 154b125b685d..0f952fe019d0 100644 --- a/include/drm-uapi/tegra_drm.h +++ b/include/drm-uapi/tegra_drm.h @@ -29,437 +29,181 @@ extern "C" { #endif -#define DRM_TEGRA_GEM_CONTIGUOUS (1 << 0) -#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_CONTIGUOUS) +#define DRM_TEGRA_GEM_CREATE_TILED (1 << 0) +#define DRM_TEGRA_GEM_CREATE_BOTTOM_UP (1 << 1) -/** - * struct drm_tegra_gem_create - parameters for the GEM object creation IOCTL - */ struct drm_tegra_gem_create { - /** - * @size: - * - * The size, in bytes, of the buffer object to be created. - */ __u64 size; - - /** - * @flags: - * - * A bitmask of flags that influence the creation of GEM objects: - * - * DRM_TEGRA_GEM_CONTIGUOUS - The buffer is to be backed by physically - * contiguous memory. - */ __u32 flags; - - /** - * @handle: - * - * Return location for the handle of the created GEM object. - */ __u32 handle; }; -/** - * struct drm_tegra_gem_mmap - parameters for the GEM mmap IOCTL - */ struct drm_tegra_gem_mmap { - /** - * @handle: - * - * Handle of the GEM object to obtain an mmap offset for. - */ __u32 handle; - - /** - * @pad: - * - * Structure padding that may be used in the future. Must be 0. - */ __u32 pad; - - /** - * @offset: - * - * Return location for the mmap offset for the given GEM object. - */ __u64 offset; }; -#define DRM_TEGRA_CHANNEL_FLAGS (0) - -/** - * struct drm_tegra_open_channel - parameters for the open channel IOCTL - */ -struct drm_tegra_open_channel { - /** - * @client: - * - * The client ID for this channel. - */ - __u32 client; +struct drm_tegra_syncpt_read { + __u32 id; + __u32 value; +}; - /** - * @flags: - * - * A bitmask of flags that influence the channel creation. Currently - * no flags are defined, so this must be 0. - */ - __u32 flags; +struct drm_tegra_syncpt_incr { + __u32 id; + __u32 pad; +}; - /** - * @syncpts: - * - * Return location for the number of syncpoints used by this channel. - */ - __u32 syncpts; +struct drm_tegra_syncpt_wait { + __u32 id; + __u32 thresh; + __u32 timeout; + __u32 value; +}; - /** - * @version: - * - * Return location for the implementation version of this channel. - */ - __u32 version; +#define DRM_TEGRA_NO_TIMEOUT (0xffffffff) - /** - * @context: - * - * Return location for the application context of this channel. This - * context needs to be passed to the DRM_TEGRA_CHANNEL_CLOSE or the - * DRM_TEGRA_SUBMIT IOCTLs. - */ +struct drm_tegra_open_channel { + __u32 client; + __u32 pad; __u64 context; - - /** - * @reserved: - * - * This field is reserved for future use. Must be 0. - */ - __u64 reserved; }; /** * struct drm_tegra_close_channel - parameters for the close channel IOCTL */ struct drm_tegra_close_channel { - /** - * @context: - * - * The application context of this channel. This is obtained from the - * DRM_TEGRA_OPEN_CHANNEL IOCTL. - */ __u64 context; }; -#define DRM_TEGRA_BUFFER_FLAGS (0) - -struct drm_tegra_buffer { - /** - * @handle: - * - * Handle of the buffer. - */ - __u32 handle; - - /** - * @flags: - * - * A bitmask of flags specifying the usage of the buffer. Currently no - * flags are defined, so this must be 0. - */ - __u32 flags; -}; - -#define DRM_TEGRA_FENCE_WAIT (1 << 0) -#define DRM_TEGRA_FENCE_EMIT (1 << 1) -#define DRM_TEGRA_FENCE_FD (1 << 2) -#define DRM_TEGRA_FENCE_FLAGS (DRM_TEGRA_FENCE_WAIT | \ - DRM_TEGRA_FENCE_EMIT | \ - DRM_TEGRA_FENCE_FD) - -struct drm_tegra_fence { - /** - * @handle: - * - * Handle (syncobj) or file descriptor (sync FD) of the fence. It is - * interpreted based on the DRM_TEGRA_FENCE_FD flag (see below). - */ - __u32 handle; - - /** - * @flags: - * - * A bitmask of flags that specify this fence. - * - * DRM_TEGRA_FENCE_WAIT - Wait for this fence before the new command - * buffer is submitted. - * DRM_TEGRA_FENCE_EMIT - Emit this fence when the command buffer is - * done being processed. - * DRM_TEGRA_FENCE_FD - This fence is a sync FD. If not specified, a - * syncobj will be used. - */ - __u32 flags; - - /** - * @offset: - * - * Offset in the command stream for this fence. This is used to patch - * the command stream with the resolved syncpoint ID. - */ - __u32 offset; - - /** - * @index: - * - * Syncpoint to use for this fence. This is an index into the list of - * syncpoints of the channel. It will be resolved to a real syncpoint - * ID upon job submission. - */ +struct drm_tegra_get_syncpt { + __u64 context; __u32 index; + __u32 id; +}; - /** - * @value: - * - * Number of times to increment the syncpoint. - */ - __u32 value; - - /** - * @reserved: - * - * This field is reserved for future use. Must be 0. - */ - __u32 reserved[3]; +struct drm_tegra_get_syncpt_base { + __u64 context; + __u32 syncpt; + __u32 id; }; -#define DRM_TEGRA_CMDBUF_FLAGS (0) +struct drm_tegra_syncpt { + __u32 id; + __u32 incrs; +}; -/** - * struct drm_tegra_cmdbuf - structure describing a command buffer - */ struct drm_tegra_cmdbuf { - /** - * @index: - * - * Index into the job's buffer handle list, pointing to the handle of - * the GEM object that contains this command buffer. - */ - __u32 index; - - /** - * @offset: - * - * Offset, in bytes, into the GEM object at which the command buffer - * starts. Needs to be a multiple of 4. - */ + __u32 handle; __u32 offset; - - /** - * @words: - * - * Number of 32-bit words in this command buffer. - */ __u32 words; - - /** - * @flags: - * - * A bitmask of flags that influence the processing of this command - * buffer. Currently no flags are defined, so this must be 0. - */ - __u32 flags; - - /** - * @pad: - * - * Structure padding that may be used in the future. Must be 0. - */ __u32 pad; - - /** - * @num_fences: - * - * The number of fences attached to this command buffer. - */ - __u32 num_fences; - - /** - * @fences: - * - * Pointer to an array of @num_fences &struct drm_tegra_fence objects. - */ - __u64 fences; }; -#define DRM_TEGRA_RELOC_FLAGS (0) - -/** - * struct drm_tegra_reloc - GEM object relocation structure - */ struct drm_tegra_reloc { struct { - /** - * @cmdbuf.index: - * - * Index into the job's buffer handle list pointing to the - * handle of the GEM object containing the command buffer for - * which to perform this GEM object relocation. - */ - __u32 index; - - /** - * @cmdbuf.offset: - * - * Offset into the command buffer at which to insert the the - * relocated address. - */ + __u32 handle; __u32 offset; } cmdbuf; - struct { - /** - * @target.index: - * - * Index into the job's buffer handle list pointing to the - * handle of the GEM object to be relocated. - */ - __u32 index; - - /** - * @target.offset: - * - * Offset into the target GEM object at which the relocated - * data starts. - */ + __u32 handle; __u32 offset; } target; - - /** - * @shift: - * - * The number of bits by which to shift relocated addresses. - */ __u32 shift; - - /** - * @flags: - * - * A bitmask of flags that determine how the GEM object should be - * relocated. - */ - __u32 flags; - - /** - * @reserved: - * - * This field is reserved for future use. Must be 0. - */ - __u64 reserved; + __u32 pad; }; -#define DRM_TEGRA_SUBMIT_FLAGS (0) +struct drm_tegra_waitchk { + __u32 handle; + __u32 offset; + __u32 syncpt; + __u32 thresh; +}; -/** - * struct drm_tegra_submit - job submission structure - */ struct drm_tegra_submit { - /** - * @context: - * - * The application context identifying the channel to use for the - * execution of this job. - */ __u64 context; - - /** - * @num_buffers: - * - * The number of GEM objects used during the execution of this job. - */ - __u32 num_buffers; - - /** - * @num_cmdbufs: - * - * The number of command buffers to execute as part of this job. - */ + __u32 num_syncpts; __u32 num_cmdbufs; - - /** - * @num_relocs: - * - * The number of relocations to perform before executing this job. - */ __u32 num_relocs; - - /** - * @timeout: - * - * The maximum amount of time, in milliseconds, to allow for the - * execution of this job. - */ + __u32 num_waitchks; + __u32 waitchk_mask; __u32 timeout; - - /** - * @buffers: - * - * A pointer to @num_buffers &struct drm_tegra_buffer structures that - * specify the GEM objects used during the execution of this job. - */ - __u64 buffers; - - /** - * @cmdbufs: - * - * A pointer to @num_cmdbufs &struct drm_tegra_cmdbuf structures that - * define the command buffers to execute as part of this job. - */ + __u64 syncpts; __u64 cmdbufs; - - /** - * @relocs: - * - * A pointer to @num_relocs &struct drm_tegra_reloc structures that - * specify the relocations that need to be performed before executing - * this job. - */ __u64 relocs; + __u64 waitchks; + __u32 fence; /* Return value */ - /** - * @flags: - * - * A bitmask of flags that specify how to execute this job. Currently - * no flags are defined, so this must be 0. - */ - __u32 flags; + __u32 reserved[5]; /* future expansion */ +}; + +#define DRM_TEGRA_GEM_TILING_MODE_PITCH 0 +#define DRM_TEGRA_GEM_TILING_MODE_TILED 1 +#define DRM_TEGRA_GEM_TILING_MODE_BLOCK 2 + +struct drm_tegra_gem_set_tiling { + /* input */ + __u32 handle; + __u32 mode; + __u32 value; + __u32 pad; +}; - /** - * @pad: - * - * Structure padding that may be used in the future. Must be 0. - */ +struct drm_tegra_gem_get_tiling { + /* input */ + __u32 handle; + /* output */ + __u32 mode; + __u32 value; __u32 pad; +}; + +#define DRM_TEGRA_GEM_BOTTOM_UP (1 << 0) +#define DRM_TEGRA_GEM_FLAGS (DRM_TEGRA_GEM_BOTTOM_UP) - /** - * @reserved: - * - * This field is reserved for future use. Must be 0. - */ - __u64 reserved[9]; /* future expansion */ +struct drm_tegra_gem_set_flags { + /* input */ + __u32 handle; + /* output */ + __u32 flags; +}; + +struct drm_tegra_gem_get_flags { + /* input */ + __u32 handle; + /* output */ + __u32 flags; }; #define DRM_TEGRA_GEM_CREATE 0x00 #define DRM_TEGRA_GEM_MMAP 0x01 -#define DRM_TEGRA_OPEN_CHANNEL 0x02 -#define DRM_TEGRA_CLOSE_CHANNEL 0x03 -#define DRM_TEGRA_SUBMIT 0x04 +#define DRM_TEGRA_SYNCPT_READ 0x02 +#define DRM_TEGRA_SYNCPT_INCR 0x03 +#define DRM_TEGRA_SYNCPT_WAIT 0x04 +#define DRM_TEGRA_OPEN_CHANNEL 0x05 +#define DRM_TEGRA_CLOSE_CHANNEL 0x06 +#define DRM_TEGRA_GET_SYNCPT 0x07 +#define DRM_TEGRA_SUBMIT 0x08 +#define DRM_TEGRA_GET_SYNCPT_BASE 0x09 +#define DRM_TEGRA_GEM_SET_TILING 0x0a +#define DRM_TEGRA_GEM_GET_TILING 0x0b +#define DRM_TEGRA_GEM_SET_FLAGS 0x0c +#define DRM_TEGRA_GEM_GET_FLAGS 0x0d #define DRM_IOCTL_TEGRA_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_CREATE, struct drm_tegra_gem_create) #define DRM_IOCTL_TEGRA_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_MMAP, struct drm_tegra_gem_mmap) +#define DRM_IOCTL_TEGRA_SYNCPT_READ DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_READ, struct drm_tegra_syncpt_read) +#define DRM_IOCTL_TEGRA_SYNCPT_INCR DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_INCR, struct drm_tegra_syncpt_incr) +#define DRM_IOCTL_TEGRA_SYNCPT_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SYNCPT_WAIT, struct drm_tegra_syncpt_wait) #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel) -#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_close_channel) +#define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel) +#define DRM_IOCTL_TEGRA_GET_SYNCPT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT, struct drm_tegra_get_syncpt) #define DRM_IOCTL_TEGRA_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SUBMIT, struct drm_tegra_submit) +#define DRM_IOCTL_TEGRA_GET_SYNCPT_BASE DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GET_SYNCPT_BASE, struct drm_tegra_get_syncpt_base) +#define DRM_IOCTL_TEGRA_GEM_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_TILING, struct drm_tegra_gem_set_tiling) +#define DRM_IOCTL_TEGRA_GEM_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_TILING, struct drm_tegra_gem_get_tiling) +#define DRM_IOCTL_TEGRA_GEM_SET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_SET_FLAGS, struct drm_tegra_gem_set_flags) +#define DRM_IOCTL_TEGRA_GEM_GET_FLAGS DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_GEM_GET_FLAGS, struct drm_tegra_gem_get_flags) #if defined(__cplusplus) } diff --git a/meson.build b/meson.build index 876c0e3b1688..501957e35e1a 100644 --- a/meson.build +++ b/meson.build @@ -1164,13 +1164,11 @@ dep_libdrm_amdgpu = null_dep dep_libdrm_radeon = null_dep dep_libdrm_nouveau = null_dep dep_libdrm_intel = null_dep -dep_libdrm_tegra = null_dep _drm_amdgpu_ver = '2.4.99' _drm_radeon_ver = '2.4.71' _drm_nouveau_ver = '2.4.66' _drm_intel_ver = '2.4.75' -_drm_tegra_ver = '2.4.75' # XXX _drm_ver = '2.4.81' _libdrm_checks = [ @@ -1179,7 +1177,6 @@ _libdrm_checks = [ ['radeon', (with_gallium_radeonsi or with_dri_r100 or with_dri_r200 or with_gallium_r300 or with_gallium_r600)], ['nouveau', (with_gallium_nouveau or with_dri_nouveau)], - ['tegra', with_gallium_tegra], ] # VC4 only needs core libdrm support of this version, not a libdrm_vc4 diff --git a/src/gallium/auxiliary/util/u_debug_gallium.c b/src/gallium/auxiliary/util/u_debug_gallium.c index 88d8e0829489..6ac84b556a0f 100644 --- a/src/gallium/auxiliary/util/u_debug_gallium.c +++ b/src/gallium/auxiliary/util/u_debug_gallium.c @@ -117,86 +117,4 @@ debug_print_flush_flags(const char *msg, enum pipe_flush_flags flags) debug_printf("%s: %s\n", msg, debug_dump_flags(names, flags)); } -void debug_print_video_format(const char *msg, enum pipe_video_format format) -{ - static const struct debug_named_value names[] = { - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_UNKNOWN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_MPEG12), - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_MPEG4), - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_VC1), - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_MPEG4_AVC), - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_HEVC), - DEBUG_NAMED_VALUE(PIPE_VIDEO_FORMAT_JPEG), - DEBUG_NAMED_VALUE_END - }; - - debug_printf("%s: %s\n", msg, debug_dump_enum(names, format)); -} - -void debug_print_video_profile(const char *msg, enum pipe_video_profile profile) -{ - static const struct debug_named_value names[] = { - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_UNKNOWN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG1), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG2_SIMPLE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG2_MAIN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_SIMPLE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_ADVANCED_SIMPLE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_VC1_SIMPLE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_VC1_MAIN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_VC1_ADVANCED), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_CONSTRAINED_BASELINE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_EXTENDED), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH10), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH422), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH444), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_HEVC_MAIN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_HEVC_MAIN_10), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_HEVC_MAIN_STILL), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_HEVC_MAIN_12), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_HEVC_MAIN_444), - DEBUG_NAMED_VALUE(PIPE_VIDEO_PROFILE_JPEG_BASELINE), - DEBUG_NAMED_VALUE_END - }; - - debug_printf("%s: %s\n", msg, debug_dump_enum(names, profile)); -} - -void debug_print_video_entrypoint(const char *msg, - enum pipe_video_entrypoint entrypoint) -{ - static const struct debug_named_value names[] = { - DEBUG_NAMED_VALUE(PIPE_VIDEO_ENTRYPOINT_UNKNOWN), - DEBUG_NAMED_VALUE(PIPE_VIDEO_ENTRYPOINT_BITSTREAM), - DEBUG_NAMED_VALUE(PIPE_VIDEO_ENTRYPOINT_IDCT), - DEBUG_NAMED_VALUE(PIPE_VIDEO_ENTRYPOINT_MC), - DEBUG_NAMED_VALUE(PIPE_VIDEO_ENTRYPOINT_ENCODE), - DEBUG_NAMED_VALUE_END - }; - - debug_printf("%s: %s\n", msg, debug_dump_enum(names, entrypoint)); -} - -void debug_print_video_cap(const char *msg, enum pipe_video_cap param) -{ - static const struct debug_named_value names[] = { - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_SUPPORTED), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_NPOT_TEXTURES), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_MAX_WIDTH), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_MAX_HEIGHT), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_PREFERED_FORMAT), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_PREFERS_INTERLACED), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_SUPPORTS_INTERLACED), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_MAX_LEVEL), - DEBUG_NAMED_VALUE(PIPE_VIDEO_CAP_STACKED_FRAMES), - DEBUG_NAMED_VALUE_END, - }; - - debug_printf("%s: %s\n", msg, debug_dump_enum(names, param)); -} - #endif diff --git a/src/gallium/auxiliary/util/u_debug_gallium.h b/src/gallium/auxiliary/util/u_debug_gallium.h index a9087b18e9e7..cb6523a2f24c 100644 --- a/src/gallium/auxiliary/util/u_debug_gallium.h +++ b/src/gallium/auxiliary/util/u_debug_gallium.h @@ -62,19 +62,6 @@ debug_print_usage_enum(const char *msg, enum pipe_resource_usage usage); void debug_print_flush_flags(const char *msg, enum pipe_flush_flags flags); -void -debug_print_video_format(const char *msg, enum pipe_video_format format); - -void -debug_print_video_profile(const char *msg, enum pipe_video_profile profile); - -void -debug_print_video_entrypoint(const char *msg, - enum pipe_video_entrypoint entrypoint); - -void -debug_print_video_cap(const char *msg, enum pipe_video_cap param); - #endif #ifdef __cplusplus diff --git a/src/gallium/include/pipe/p_defines.h b/src/gallium/include/pipe/p_defines.h index e3ed868266b6..808c2b8cfaf6 100644 --- a/src/gallium/include/pipe/p_defines.h +++ b/src/gallium/include/pipe/p_defines.h @@ -413,11 +413,6 @@ enum pipe_flush_flags #define PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET (1 << 6) /** - * Create a video decoding context. - */ -#define PIPE_CONTEXT_VIDEO_ONLY (1 << 6) - -/** * Flags for pipe_context::memory_barrier. */ #define PIPE_BARRIER_MAPPED_BUFFER (1 << 0) @@ -701,7 +696,7 @@ enum pipe_cap PIPE_CAP_TEXTURE_SWIZZLE, PIPE_CAP_MAX_TEXTURE_2D_SIZE, PIPE_CAP_MAX_TEXTURE_3D_LEVELS, - PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS, /* 10 */ + PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS, PIPE_CAP_TEXTURE_MIRROR_CLAMP, PIPE_CAP_BLEND_EQUATION_SEPARATE, PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS, @@ -712,7 +707,7 @@ enum pipe_cap PIPE_CAP_INDEP_BLEND_FUNC, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT, - PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT, /* 20 */ + PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER, PIPE_CAP_DEPTH_CLIP_DISABLE, @@ -723,7 +718,7 @@ enum pipe_cap PIPE_CAP_FRAGMENT_COLOR_CLAMPED, PIPE_CAP_MIXED_COLORBUFFER_FORMATS, PIPE_CAP_SEAMLESS_CUBE_MAP, - PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE, /* 30 */ + PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE, PIPE_CAP_MIN_TEXEL_OFFSET, PIPE_CAP_MAX_TEXEL_OFFSET, PIPE_CAP_CONDITIONAL_RENDER, @@ -733,7 +728,7 @@ enum pipe_cap PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME, PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS, PIPE_CAP_VERTEX_COLOR_UNCLAMPED, - PIPE_CAP_VERTEX_COLOR_CLAMPED, /* 40 */ + PIPE_CAP_VERTEX_COLOR_CLAMPED, PIPE_CAP_GLSL_FEATURE_LEVEL, PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY, PIPE_CAP_ESSL_FEATURE_LEVEL, @@ -745,7 +740,7 @@ enum pipe_cap PIPE_CAP_COMPUTE, PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT, PIPE_CAP_START_INSTANCE, - PIPE_CAP_QUERY_TIMESTAMP, /* 50 */ + PIPE_CAP_QUERY_TIMESTAMP, PIPE_CAP_TEXTURE_MULTISAMPLE, PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, PIPE_CAP_CUBE_MAP_ARRAY, @@ -755,7 +750,7 @@ enum pipe_cap PIPE_CAP_TGSI_TEXCOORD, PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER, PIPE_CAP_QUERY_PIPELINE_STATISTICS, - PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK, /* 60 */ + PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK, PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE, PIPE_CAP_MAX_VIEWPORTS, PIPE_CAP_ENDIANNESS, @@ -765,7 +760,7 @@ enum pipe_cap PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS, PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS, PIPE_CAP_TEXTURE_GATHER_SM5, - PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT, /* 70 */ + PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT, PIPE_CAP_FAKE_SW_MSAA, PIPE_CAP_TEXTURE_QUERY_LOD, PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET, @@ -775,7 +770,7 @@ enum pipe_cap PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION, PIPE_CAP_MAX_VERTEX_STREAMS, PIPE_CAP_DRAW_INDIRECT, - PIPE_CAP_TGSI_FS_FINE_DERIVATIVE, /* 80 */ + PIPE_CAP_TGSI_FS_FINE_DERIVATIVE, PIPE_CAP_VENDOR_ID, PIPE_CAP_DEVICE_ID, PIPE_CAP_ACCELERATED, @@ -785,7 +780,7 @@ enum pipe_cap PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE, PIPE_CAP_SAMPLER_VIEW_TARGET, PIPE_CAP_CLIP_HALFZ, - PIPE_CAP_VERTEXID_NOBASE, /* 90 */ + PIPE_CAP_VERTEXID_NOBASE, PIPE_CAP_POLYGON_OFFSET_CLAMP, PIPE_CAP_MULTISAMPLE_Z_RESOLVE, PIPE_CAP_RESOURCE_FROM_USER_MEMORY, @@ -795,7 +790,7 @@ enum pipe_cap PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR, PIPE_CAP_DEPTH_BOUNDS_TEST, PIPE_CAP_TGSI_TXQS, - PIPE_CAP_FORCE_PERSAMPLE_INTERP, /* 100 */ + PIPE_CAP_FORCE_PERSAMPLE_INTERP, PIPE_CAP_SHAREABLE_SHADERS, PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS, PIPE_CAP_CLEAR_TEXTURE, @@ -806,7 +801,7 @@ enum pipe_cap PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL, PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL, PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL, - PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT, /* 110 */ + PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT, PIPE_CAP_INVALIDATE_BUFFER, PIPE_CAP_GENERATE_MIPMAP, PIPE_CAP_STRING_MARKER, @@ -816,7 +811,7 @@ enum pipe_cap PIPE_CAP_PCI_GROUP, PIPE_CAP_PCI_BUS, PIPE_CAP_PCI_DEVICE, - PIPE_CAP_PCI_FUNCTION, /* 120 */ + PIPE_CAP_PCI_FUNCTION, PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT, PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR, PIPE_CAP_CULL_DISTANCE, @@ -827,7 +822,7 @@ enum pipe_cap PIPE_CAP_VIEWPORT_SUBPIXEL_BITS, PIPE_CAP_RASTERIZER_SUBPIXEL_BITS, PIPE_CAP_MIXED_COLOR_DEPTH_BITS, - PIPE_CAP_TGSI_ARRAY_COMPONENTS, /* 130 */ + PIPE_CAP_TGSI_ARRAY_COMPONENTS, PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS, PIPE_CAP_TGSI_CAN_READ_OUTPUTS, PIPE_CAP_NATIVE_FENCE_FD, @@ -838,7 +833,7 @@ enum pipe_cap PIPE_CAP_DOUBLES, PIPE_CAP_INT64, PIPE_CAP_INT64_DIVMOD, - PIPE_CAP_TGSI_TEX_TXF_LZ, /* 140 */ + PIPE_CAP_TGSI_TEX_TXF_LZ, PIPE_CAP_TGSI_CLOCK, PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE, PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE, @@ -848,7 +843,7 @@ enum pipe_cap PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION, PIPE_CAP_POST_DEPTH_COVERAGE, PIPE_CAP_BINDLESS_TEXTURE, - PIPE_CAP_NIR_SAMPLERS_AS_DEREF, /* 150 */ + PIPE_CAP_NIR_SAMPLERS_AS_DEREF, PIPE_CAP_QUERY_SO_OVERFLOW, PIPE_CAP_MEMOBJ, PIPE_CAP_LOAD_CONSTBUF, @@ -859,7 +854,7 @@ enum pipe_cap PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET, PIPE_CAP_CONTEXT_PRIORITY_MASK, PIPE_CAP_FENCE_SIGNAL, - PIPE_CAP_CONSTBUF0_FLAGS, /* 160 */ + PIPE_CAP_CONSTBUF0_FLAGS, PIPE_CAP_PACKED_UNIFORMS, PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES, PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES, diff --git a/src/gallium/state_trackers/va/context.c b/src/gallium/state_trackers/va/context.c index 9ddf1a8069f8..2cb3a6c92684 100644 --- a/src/gallium/state_trackers/va/context.c +++ b/src/gallium/state_trackers/va/context.c @@ -151,7 +151,6 @@ VA_DRIVER_INIT_FUNC(VADriverContextP ctx) if (!drv->vscreen) goto error_screen; - /* XXX PIPE_CONTEXT_VIDEO_ONLY */ drv->pipe = pipe_create_multimedia_context(drv->vscreen->pscreen); if (!drv->pipe) goto error_pipe; diff --git a/src/gallium/state_trackers/vdpau/device.c b/src/gallium/state_trackers/vdpau/device.c index 58ca35a807f4..c5a3eeb6b303 100644 --- a/src/gallium/state_trackers/vdpau/device.c +++ b/src/gallium/state_trackers/vdpau/device.c @@ -72,18 +72,12 @@ vdp_imp_device_create_x11(Display *display, int screen, VdpDevice *device, } pscreen = dev->vscreen->pscreen; - /* XXX PIPE_CONTEXT_VIDEO_ONLY */ dev->context = pipe_create_multimedia_context(pscreen); if (!dev->context) { ret = VDP_STATUS_RESOURCES; goto no_context; } - debug_printf(" context: %p\n", dev->context); - pscreen = dev->context->screen; - dev->vscreen->pscreen = pscreen; - debug_printf(" screen: %p\n", pscreen); - if (!pscreen->get_param(pscreen, PIPE_CAP_NPOT_TEXTURES)) { ret = VDP_STATUS_NO_IMPLEMENTATION; goto no_context; diff --git a/src/gallium/state_trackers/vdpau/surface.c b/src/gallium/state_trackers/vdpau/surface.c index 859cf0d3c15d..e9d55a282e21 100644 --- a/src/gallium/state_trackers/vdpau/surface.c +++ b/src/gallium/state_trackers/vdpau/surface.c @@ -447,20 +447,16 @@ vlVdpVideoSurfaceClear(vlVdpSurface *vlsurf) surfaces = vlsurf->video_buffer->get_surfaces(vlsurf->video_buffer); for (i = 0; i < VL_MAX_SURFACES; ++i) { union pipe_color_union c = {}; - struct pipe_context *pipe; if (!surfaces[i]) continue; - pipe = surfaces[i]->context; - if (i > !!vlsurf->templat.interlaced) c.f[0] = c.f[1] = c.f[2] = c.f[3] = 0.5f; pipe->clear_render_target(pipe, surfaces[i], &c, 0, 0, surfaces[i]->width, surfaces[i]->height, false); } - /* XXX do this on the same context as the ->clear_render_target() calls */ pipe->flush(pipe, NULL, 0); } |